summaryrefslogtreecommitdiff
path: root/drivers/clk/rockchip
AgeCommit message (Expand)Author
2024-06-27clk: rockchip: rk3188: Drop CLK_NR_CLKS usageJohan Jonker
2024-06-23clk: rockchip: Switch to use kmemdup_array()Andy Shevchenko
2024-06-23clk: rockchip: rk3128: Add HCLK_SFCAlex Bee
2024-06-08clk: rockchip: rk3128: Drop CLK_NR_CLKS usageAlex Bee
2024-05-28clk: rockchip: rk3128: Add hclk_vio_h2p to critical clocksAlex Bee
2024-05-28clk: rockchip: rk3128: Export PCLK_MIPIPHYAlex Bee
2024-05-04clk: rockchip: rk3568: Add PLL rate for 724 MHzLucas Stach
2024-05-04clk: rockchip: Remove an unused field in struct rockchip_mmc_clockChristophe JAILLET
2024-04-10clk: rockchip: rk3588: Add reset line for HDMI ReceiverShreeya Patel
2024-04-10clk: rockchip: rk3568: Add missing USB480M_PHY muxDavid Jander
2024-02-27clk: rockchip: rk3399: Allow to set rate of clk_i2s0_frac's parentOndrej Jirman
2024-02-27clk: rockchip: rk3588: use linked clock ID for GATE_LINKSebastian Reichel
2024-02-27clk: rockchip: rk3588: fix indentSebastian Reichel
2024-02-27clk: rockchip: rk3588: fix pclk_vo0grf and pclk_vo1grfSebastian Reichel
2024-02-27Merge branch 'v6.9-shared/clkids' into v6.9-clk/nextHeiko Stuebner
2024-02-27clk: rockchip: rk3588: fix CLK_NR_CLKS usageSebastian Reichel
2024-01-25clk: rockchip: rk3568: Add PLL rate for 128MHzChris Morgan
2024-01-12Merge tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/cl...Linus Torvalds
2023-12-05clk: rockchip: rk3568: Mark pclk_usb as criticalChris Morgan
2023-12-05clk: rockchip: rk3568: Add PLL rate for 126.4MHzChris Morgan
2023-11-28clk: rockchip: rk3128: Fix SCLK_SDMMC's clock nameAlex Bee
2023-11-28clk: rockchip: rk3128: Fix aclk_peri_src's parentFinley Xiao
2023-11-16clk: rockchip: rk3128: Fix HCLK_OTG gate registerWeihao Li
2023-11-16clk: rockchip: rk3568: Add PLL rate for 292.5MHzChris Morgan
2023-11-16clk: rockchip: rk3568: Add PLL rate for 115.2MHzChris Morgan
2023-10-23clk: Use device_get_match_data()Rob Herring
2023-08-30Merge branches 'clk-versa', 'clk-strdup', 'clk-amlogic', 'clk-allwinner' and ...Stephen Boyd
2023-08-10clk: rockchip: rv1126: Add PD_VO clock treeJagan Teki
2023-07-19clk: Explicitly include correct DT includesRob Herring
2023-07-10clk: rockchip: rk3568: Fix PLL rate setting for 78.75MHzAlibek Omarov
2023-07-10clk: rockchip: rk3568: Add PLL rate for 101MHzAlibek Omarov
2023-04-25Merge branches 'clk-of', 'clk-samsung', 'clk-rockchip' and 'clk-qcom' into cl...Stephen Boyd
2023-04-18clk: rockchip: rk3588: make gate linked clocks criticalSebastian Reichel
2023-04-05clk: rockchip: Remove values for mmask and nmask in struct clk_fractional_div...Christophe JAILLET
2023-03-07clk: rockchip: rk3399: allow clk_cifout to force clk_cifout_src to reparentQuentin Schulz
2022-12-12Merge branches 'clk-spear', 'clk-fract', 'clk-rockchip' and 'clk-imx' into cl...Stephen Boyd
2022-11-23clk: rockchip: Fix memory leak in rockchip_clk_register_pll()Xiu Jianfeng
2022-11-22clk: Remove a useless includeChristophe JAILLET
2022-11-15clk: rockchip: add clock controller for the RK3588Elaine Zhang
2022-11-14clk: rockchip: add lookup table supportSebastian Reichel
2022-11-14clk: rockchip: simplify rockchip_clk_add_lookupSebastian Reichel
2022-11-14clk: rockchip: allow additional mux options for cpu-clock frequency changesElaine Zhang
2022-11-14clk: rockchip: add pll type for RK3588Elaine Zhang
2022-11-14clk: rockchip: add register offset of the cores select parentElaine Zhang
2022-09-23clk: rockchip: Add clock controller support for RV1126 SoCJagan Teki
2022-09-13clk: rockchip: Add MUXTBL variantElaine Zhang
2022-05-03clk: rockchip: Mark hclk_vo as critical on rk3568Sascha Hauer
2022-02-24clk: rockchip: re-add rational best approximation algorithm to the fractional...Quentin Schulz
2022-02-23clk/rockchip: Use of_device_get_match_data()Minghao Chi (CGEL ZTE)
2022-02-08clk: rockchip: Add CLK_SET_RATE_PARENT to the HDMI reference clock on rk3568Sascha Hauer
generated by cgit (git 2.34.1) at 2025-06-01 10:27:25 +0000