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path: root/drivers/clk/sunxi-ng
AgeCommit message (Expand)Author
2017-05-10Merge tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/cl...Linus Torvalds
2017-04-28clk: sunxi-ng: always select CCU_GATEArnd Bergmann
2017-04-21Merge tag 'sunxi-clk-for-4.12-2' of https://git.kernel.org/pub/scm/linux/kern...Stephen Boyd
2017-04-19Merge tag 'sunxi-clk-for-4.12' of https://git.kernel.org/pub/scm/linux/kernel...Stephen Boyd
2017-04-13clk: sunxi-ng: a80: Fix audio PLL comment not matching actual codeChen-Yu Tsai
2017-04-13clk: sunxi-ng: Fix round_rate/set_rate multiplier minimum mismatchChen-Yu Tsai
2017-04-13clk: sunxi-ng: use 1 as fallback for minimum multiplierChen-Yu Tsai
2017-04-13clk: sunxi-ng: a33: gate then ungate PLL CPU clk after rate changeChen-Yu Tsai
2017-04-13clk: sunxi-ng: Add clk notifier to gate then ungate PLL clocksChen-Yu Tsai
2017-04-13clk: sunxi-ng: fix build failure in ccu-sun9i-a80 driverTobias Regnery
2017-04-13clk: sunxi-ng: fix build error without CONFIG_RESET_CONTROLLERTobias Regnery
2017-04-10clk: sunxi-ng: fix PRCM CCU CLK_NUMBER valueIcenowy Zheng
2017-04-10clk: sunxi-ng: fix PRCM CCU ir clk parentIcenowy Zheng
2017-04-06clk: sunxi-ng: Display index when clock registration failsPriit Laes
2017-04-05clk: sunxi-ng: a33: Add offset and minimum value for DDR1 PLL N factorChen-Yu Tsai
2017-04-05clk: sunxi-ng: a80: Remodel CPU cluster PLLs as N-type multiplier clocksChen-Yu Tsai
2017-04-05clk: sunxi-ng: mult: Support PLL lock detectionChen-Yu Tsai
2017-04-04clk: sunxi-ng: add support for PRCM CCUsIcenowy Zheng
2017-03-20clk: sunxi-ng: fix recalc_rate formula of NKMP clocksIcenowy Zheng
2017-03-20clk: sunxi-ng: Fix div/mult settings for osc12M on A64Philipp Tomsich
2017-03-06clk: sunxi-ng: sun5i: Fix mux width for csi clockPriit Laes
2017-03-06clk: sunxi-ng: tighten SoC deps on explicit AllWinner SoCsPeter Robinson
2017-03-06clk: sunxi-ng: add Allwinner H5 CCU support for H3 CCU driverIcenowy Zheng
2017-03-06clk: sunxi-ng: gate: Support common pre-dividersChen-Yu Tsai
2017-03-06clk: sunxi-ng: sun6i: Fix enable bit offset for hdmi-ddc module clockChen-Yu Tsai
2017-03-06clk: sunxi: ccu-sun5i needs nkmpArnd Bergmann
2017-03-06clk: sunxi-ng: mp: Adjust parent rate for pre-dividersChen-Yu Tsai
2017-02-06clk: sunxi-ng: sun9i-a80: Fix wrong pointer passed to PTR_ERR()Wei Yongjun
2017-02-06clk: sunxi-ng: select SUNXI_CCU_MULT for sun5iArnd Bergmann
2017-02-06clk: sunxi-ng: Check kzalloc() for errors and cleanup error pathStephen Boyd
2017-01-30clk: sunxi-ng: Add A80 Display Engine CCUChen-Yu Tsai
2017-01-30clk: sunxi-ng: Add A80 USB CCUChen-Yu Tsai
2017-01-30clk: sunxi-ng: Add A80 CCUChen-Yu Tsai
2017-01-30clk: sunxi-ng: Support separately grouped PLL lock status registerChen-Yu Tsai
2017-01-30clk: sunxi-ng: mux: Get closest parent rate possible with CLK_SET_RATE_PARENTChen-Yu Tsai
2017-01-30clk: sunxi-ng: mux: honor CLK_SET_RATE_NO_REPARENT flagChen-Yu Tsai
2017-01-30clk: sunxi-ng: mux: Fix determine_rate for mux clocks with pre-dividersChen-Yu Tsai
2017-01-27clk: sunxi-ng: a33: Set CLK_SET_RATE_PARENT for the GPUMaxime Ripard
2017-01-27clk: sunxi-ng: Call divider_round_rate if we only have a single parentMaxime Ripard
2017-01-23clk: sunxi-ng: Add sun5i CCU driverMaxime Ripard
2017-01-23clk: sunxi-ng: Implement global pre-dividerMaxime Ripard
2017-01-23clk: sunxi-ng: Implement multiplier maximumMaxime Ripard
2017-01-23clk: sunxi-ng: mult: Fix minimum in round rateMaxime Ripard
2017-01-23clk: sunxi-ng: Implement factors offsetsMaxime Ripard
2017-01-23clk: sunxi-ng: multiplier: Add fractional supportMaxime Ripard
2017-01-20clk: sunxi-ng: add support for V3s CCUIcenowy Zheng
2017-01-17clk: sunxi-ng: a33: Add CLK_SET_RATE_PARENT to ac-digMylène Josserand
2017-01-02clk: sunxi-ng: A31: Fix spdif clock registerMarcus Cooper
2017-01-02clk: sunxi-ng: set the parent rate when adjustin CPUX clock on A33Icenowy Zheng
2017-01-02clk: sunxi-ng: fix PLL_CPUX adjusting on A33Icenowy Zheng
generated by cgit (git 2.34.1) at 2025-04-14 04:07:26 +0000