summaryrefslogtreecommitdiff
path: root/drivers/clk/zynqmp/pll.c
AgeCommit message (Expand)Author
2021-06-28clk: zynqmp: Use firmware specific common clock flagsRajan Vaja
2021-06-25clk: zynqmp: pll: Remove some dead codeChristophe JAILLET
2021-06-25clk: zynqmp: fix compile testing without ZYNQMP_FIRMWAREMichal Simek
2021-04-07clk: zynqmp: pll: add set_pll_mode to check condition in zynqmp_pll_enableQuanyang Wang
2021-04-07clk: zynqmp: move zynqmp_pll_set_mode out of round_rate callbackQuanyang Wang
2020-04-28firmware: xilinx: Use APIs instead of IOCTLsRajan Vaja
2020-04-28firmware: xilinx: Remove eemi ops for clock_getdividerRajan Vaja
2020-04-28firmware: xilinx: Remove eemi ops for clock_setdividerRajan Vaja
2020-04-28firmware: xilinx: Remove eemi ops for clock_getstateRajan Vaja
2020-04-28firmware: xilinx: Remove eemi ops for clock_disableRajan Vaja
2020-04-28firmware: xilinx: Remove eemi ops for clock_enableRajan Vaja
2020-01-23clk: zynqmp: Warn user if clock user are more than allowedRajan Vaja
2018-10-09drivers: clk: Add ZynqMP clock driverJolly Shah
generated by cgit (git 2.34.1) at 2024-05-28 00:51:07 +0000