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path: root/drivers/clk
AgeCommit message (Expand)Author
2021-11-22clk: imx8mp: Fix the parent clk of the audio_root_clkHui Wang
2021-11-22clk: imx8mn: Fix imx8mn_clko1_selsAdam Ford
2021-11-22clk: imx: Use div64_ul instead of do_divChangcheng Deng
2021-11-22clk: imx: imx8ulp: set suppress_bind_attrs to truePeng Fan
2021-11-22clk: samsung: exynos850: Keep some crucial clocks runningSam Protsenko
2021-11-22clk: samsung: exynos850: Implement CMU_CMGP domainSam Protsenko
2021-11-22clk: samsung: exynos850: Implement CMU_APM domainSam Protsenko
2021-11-22clk: sunxi-ng: Allow drivers to be built as modulesSamuel Holland
2021-11-22clk: sunxi-ng: Export symbols used by CCU driversSamuel Holland
2021-11-20clk: samsung: Update CPU clk registrationWill McVicker
2021-11-19clk: samsung: Remove meaningless __init and extern from header filesSylwester Nawrocki
2021-11-19clk: samsung: remove __clk_lookup() usageMarek Szyprowski
2021-11-19clk: renesas: cpg-mssr: propagate return value of_genpd_add_provider_simple()Lad Prabhakar
2021-11-19clk: renesas: cpg-mssr: Check return value of pm_genpd_init()Lad Prabhakar
2021-11-19clk: renesas: rzg2l: propagate return value of_genpd_add_provider_simple()Lad Prabhakar
2021-11-19clk: renesas: rzg2l: Check return value of pm_genpd_init()Lad Prabhakar
2021-11-19clk: renesas: r9a07g044: Add RSPI clock and reset entriesLad Prabhakar
2021-11-19clk: renesas: r9a07g044: Change core clock "I" from DEF_FIXED->DEF_DIVBiju Das
2021-11-19clk: renesas: rzg2l: Add CPG_PL1_DDIV macroBiju Das
2021-11-19clk: renesas: rcar-gen3: Remove outdated SD_SKIP_FIRSTWolfram Sang
2021-11-19clk: renesas: rcar-gen3: Switch to new SD clock handlingWolfram Sang
2021-11-19clk: renesas: r8a779a0: Add SDnH clock to V3UWolfram Sang
2021-11-19clk: renesas: rcar-gen3: Add SDnH clockWolfram Sang
2021-11-19clk: renesas: rcar-gen3: Add dummy SDnH clockWolfram Sang
2021-11-18Merge drm/drm-next into drm-misc-nextThomas Zimmermann
2021-11-15clk: renesas: r9a07g044: Add OSTM clock and reset entriesBiju Das
2021-11-15clk: renesas: r9a07g044: Rename CLK_PLL2_DIV16 and CLK_PLL2_DIV20 macrosBiju Das
2021-11-15clk: renesas: r9a07g044: Add WDT clock and reset entriesBiju Das
2021-11-15clk: renesas: r9a07g044: Add clock and reset entry for SCI1Lad Prabhakar
2021-11-15clk: renesas: rzg2l: Add missing kerneldoc for resetsGeert Uytterhoeven
2021-11-14Merge tag 'devicetree-fixes-for-5.16-1' of git://git.kernel.org/pub/scm/linux...Linus Torvalds
2021-11-13Merge tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/cl...Linus Torvalds
2021-11-11clk: versatile: clk-icst: Ensure clock names are uniqueRob Herring
2021-11-11dt-bindings: Rename Ingenic CGU headers to ingenic,*.hPaul Cercueil
2021-11-08Merge tag 'mfd-next-5.16' of git://git.kernel.org/pub/scm/linux/kernel/git/le...Linus Torvalds
2021-11-05clk: qcom: gcc-msm8996: Drop (again) gcc_aggre1_pnoc_ahb_clkDmitry Baryshkov
2021-11-05clk: imx8m: Do not set IMX_COMPOSITE_CORE for non-regular compositesAlexander Stein
2021-11-03Merge tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/cl...Linus Torvalds
2021-11-03clk/ast2600: Fix soc revision for AHBJoel Stanley
2021-11-03clk: composite: Fix 'switching' to same clockAlexander Stein
2021-11-02clk: rockchip: drop module parts from rk3399 and rk3568 driversHeiko Stuebner
2021-11-02Revert "clk: rockchip: use module_platform_driver_probe"Heiko Stuebner
2021-11-02clk:mediatek: remove duplicate include in clk-mt8195-imp_iic_wrap.cRan Jianping
2021-11-02clk: uniphier: Add SoC-glue clock source selector support for Pro4Kunihiko Hayashi
2021-11-02clk: uniphier: Add NX1 clock supportKunihiko Hayashi
2021-11-02clk: uniphier: Add audio system and video input clock control for PXs3Kunihiko Hayashi
2021-11-02clk: si5351: Update datasheet referencesJens Renner
2021-11-02clk: vc5: Use i2c .probe_newLuca Ceresoli
2021-11-02clk/actions/owl-factor.c: remove superfluous headersMianhan Liu
2021-11-02clk: ingenic: Fix bugs with divided dividersPaul Cercueil
generated by cgit (git 2.34.1) at 2024-05-28 00:51:47 +0000