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path: root/drivers/clocksource/timer-riscv.c
AgeCommit message (Expand)Author
2020-08-20RISC-V: Remove CLINT related code from timer and archAnup Patel
2020-06-09clocksource/drivers/timer-riscv: Use per-CPU timer interruptAnup Patel
2020-01-04clocksource: riscv: add notrace to riscv_sched_clockZong Li
2019-11-13riscv: add support for MMIO access to the timer registersChristoph Hellwig
2019-11-05riscv: abstract out CSR names for supervisor vs machine modeChristoph Hellwig
2019-09-05riscv: don't use the rdtime(h) pseudo-instructionsChristoph Hellwig
2019-08-06RISC-V: Remove per cpu clocksourceAtish Patra
2019-03-23clocksource/drivers/riscv: Fix clocksource maskAtish Patra
2019-02-23clocksource/drivers/riscv: Add required checks during clock source initAtish Patra
2018-12-18clocksource/drivers/riscv: Change name riscv_timer to timer-riscvDaniel Lezcano