summaryrefslogtreecommitdiff
path: root/drivers/cpufreq/imx-cpufreq-dt.c
AgeCommit message (Collapse)Author
2020-04-28cpufreq: imx-cpufreq-dt: support i.MX7ULPPeng Fan
i.MX7ULP's ARM core clock design is totally different compared with i.MX7D/8M SoCs which supported by imx-cpufreq-dt. It needs get_intermediate and target_intermedate to configure clk MUX ready, before let OPP configure ARM core clk. |---FIRC |------RUN---...---SCS(MUX2) --------| ARM --(MUX1) |---SPLL_PFD0(CLK_SET_RATE_GATE) |------HSRUN--...--HSRUN_SCS(MUX3)---| |---SRIC FIRC is step clk, SPLL_PFD0 is the normal clk driving ARM core. MUX2 and MUX3 share same inputs. So if MUX2/MUX3 both sources from SPLL_PFD0, both MUXes will lose input when configure SPLL_PFD0. So the target_intermediate will configure MUX2/MUX3 to FIRC, to avoid ARM core lose clk when configure SPLL_PFD0. Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org>
2020-03-11cpufreq: imx-cpufreq-dt: Correct i.MX8MP's market segment fuse locationAnson Huang
i.MX8MP's market segment fuse field is bit[6:5], correct it. Fixes: 83fe39ad0a48 ("cpufreq: imx-cpufreq-dt: Add i.MX8MP support") Signed-off-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org>
2020-02-17cpufreq: imx-cpufreq-dt: Add "cpu-supply" property checkAnson Huang
The cpufreq-dt driver allows cpufreq driver enabled without valid regulator assigned, however, all i.MX platforms using cpufreq-dt driver now require valid regulator, add "cpu-supply" property check to avoid i.MX platforms' cpufreq enabled without valid regulator and lead to system unstable. Signed-off-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org>
2020-01-07cpufreq: imx-cpufreq-dt: Add i.MX8MP supportAnson Huang
Add i.MX8MP cpufreq DT support for speed grading and market segment check. Reviewed-by: Abel Vesa <abel.vesa@nxp.com> Signed-off-by: Anson Huang <Anson.Huang@nxp.com> [ Viresh: Minor formatting fixes ] Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org>
2019-10-22cpufreq: imx-cpufreq-dt: Correct i.MX8MN's default speed grade valueAnson Huang
i.MX8MN has different speed grade definition compared to i.MX8MQ/i.MX8MM, when fuses are NOT written, the default speed_grade should be set to minimum available OPP defined in DT which is 1.2GHz, the corresponding speed_grade value should be 0xb. Fixes: 5b8010ba70d5 ("cpufreq: imx-cpufreq-dt: Add i.MX8MN support") Signed-off-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org>
2019-08-22cpufreq: imx-cpufreq-dt: Add i.MX8MN supportAnson Huang
i.MX8MN has different speed grading definition as below, it has 4 bits to define speed grading, add support for it. SPEED_GRADE[3:0] MHz 0000 2300 0001 2200 0010 2100 0011 2000 0100 1900 0101 1800 0110 1700 0111 1600 1000 1500 1001 1400 1010 1300 1011 1200 1100 1100 1101 1000 1110 900 1111 800 Signed-off-by: Anson Huang <Anson.Huang@nxp.com> Reviewed-by: Leonard Crestez <leonard.crestez@nxp.com> Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org>
2019-07-08cpufreq: imx-cpufreq-dt: Add i.MX8MN supportAnson Huang
i.MX8MN is a new SoC of i.MX8M series, it also uses speed grading and market segment fuses for OPP definitions, add support for this SoC. Signed-off-by: Anson Huang <Anson.Huang@nxp.com> Acked-by: Viresh Kumar <viresh.kumar@linaro.org> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2019-06-06cpufreq: imx-cpufreq-dt: Remove global platform match listLeonard Crestez
This is not currently needed, instead a platform device is always created from SOC-specific code. We can use of_machine_is_compatible for per-SOC behavior instead. Suggested-by: Viresh Kumar <viresh.kumar@linaro.org> Signed-off-by: Leonard Crestez <leonard.crestez@nxp.com> Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org>
2019-06-03cpufreq: imx-cpufreq-dt: Fix no OPPs available on unfused partsLeonard Crestez
Early samples without fuses written report "0 0" which means consumer segment and minimum speed grading. According to datasheet the minimum speed grade is not supported for consumer parts so all OPPs are disabled which results in stack dumps later on. Fix by clamping minimum consumer speed grade to 1 on imx8mm and imx8mq. Fixes: 4d28ba1d62c4 ("cpufreq: Add imx-cpufreq-dt driver") Signed-off-by: Leonard Crestez <leonard.crestez@nxp.com> [ Viresh: s/minumum/minimum/ in patch and log ] Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org>
2019-05-20cpufreq: Add imx-cpufreq-dt driverLeonard Crestez
Right now in upstream imx8m cpufreq support just lists a common subset of OPPs because the higher ones should only be attempted after checking speed grading in fuses. Add a small driver which checks speed grading from nvmem cells before registering cpufreq-dt. This driver allows unlocking all frequencies for imx8mm and imx8mq and could be applied to other chips like imx7d Signed-off-by: Leonard Crestez <leonard.crestez@nxp.com> Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org>