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path: root/drivers/cxl/pci.c
AgeCommit message (Expand)Author
2021-09-07cxl/pci: Fix debug message in cxl_probe_regs()Li Qiang (Johnny Li)
2021-09-07cxl/pci: Fix lockdown levelDan Williams
2021-08-10cxl/mem: Adjust ram/pmem range to represent DPA rangesIra Weiny
2021-08-10cxl/mem: Account for partitionable space in ram/pmem rangesIra Weiny
2021-08-07cxl/pci: Store memory capacity valuesIra Weiny
2021-08-06cxl/pci: Simplify register setupBen Widawsky
2021-08-06cxl/pci: Ignore unknown register block typesBen Widawsky
2021-08-06cxl/core: Move memdev management to coreBen Widawsky
2021-08-06cxl/pci: Introduce cdevm_file_operationsDan Williams
2021-08-06cxl: Move cxl_core to new directoryBen Widawsky
2021-06-17cxl/pci: Rename CXL REGLOC IDBen Widawsky
2021-06-15cxl/pmem: Register 'pmem' / cxl_nvdimm devicesDan Williams
2021-06-14cxl/pci: Add media provisioning required commandsBen Widawsky
2021-06-05cxl/pci: Add HDM decoder capabilitiesBen Widawsky
2021-06-05cxl/pci: Reserve individual register block regionsIra Weiny
2021-06-05cxl/pci: Map registers based on capabilitiesIra Weiny
2021-06-05cxl/pci: Reserve all device regions at onceIra Weiny
2021-06-05cxl/pci: Introduce cxl_decode_register_block()Ira Weiny
2021-05-26cxl/mem: Get rid of @cxlm.baseBen Widawsky
2021-05-26cxl/mem: Move register locator logic into reg setupBen Widawsky
2021-05-26cxl/mem: Split creation from mapping in probeBen Widawsky
2021-05-26cxl/mem: Use dev instead of pdev->devBen Widawsky
2021-05-26cxl/pci.c: Add a 'label_storage_size' attribute to the memdevVishal Verma
2021-05-26cxl: Rename mem to pciBen Widawsky
generated by cgit (git 2.34.1) at 2024-06-17 23:06:24 +0000