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path: root/drivers/dma/dma-axi-dmac.c
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2016-07-01dmaengine: axi-dmac: Return IRQ_NONE if no IRQs are pendingLars-Peter Clausen
Return IRQ_NONE in the interrupt handler when it is called but no IRQs are pending. This allows the system to recover in case of an interrupt storm e.g. due to a wrong interrupt configuration setup. Signed-off-by: Lars-Peter Clausen <lars@metafoo.de> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2016-07-01dmaengine: axi-dmac: Propagate errors from platform_get_irq()Lars-Peter Clausen
Propagate errors returned by platform_get_irq() to the driver core. This will enable proper probe deferring for the driver in case the IRQ provider has not been registered yet. Signed-off-by: Lars-Peter Clausen <lars@metafoo.de> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2016-07-01dmaengine: axi-dmac: Add MODULE_DEVICE_TABLE()Lars-Peter Clausen
Add MODULE_DEVICE_TABLE() for the axi-dmac driver. This allows the driver to be loaded on demand when built as a module. Signed-off-by: Lars-Peter Clausen <lars@metafoo.de> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2015-11-16dmaengine: axi_dmac: Add synchronization supportLars-Peter Clausen
Implement the new device_synchronize() callback to allow proper synchronization when stopping a channel. Since the driver already makes sure that no new complete callbacks are scheduled after the device_terminate_all() callback has been called, all left to do in the device_synchronize() callback is to wait for all currently running complete callbacks to finish. Signed-off-by: Lars-Peter Clausen <lars@metafoo.de> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2015-08-23dmaengine: Add support for the Analog Devices AXI-DMAC DMA controllerLars-Peter Clausen
Add support for the Analog Devices AXI-DMAC DMA controller. This controller is a soft peripheral that can be instantiated in a FPGA and is often used in Analog Devices' reference designs for FPGA platforms. The peripheral has various configuration options that can be selected at synthesis time and influence the supported features of the instantiated peripheral, those options are represented as device-tree properties to allow the driver to behave accordingly. The peripheral has a zero latency architecture, which means it is possible to switch from one to the next descriptor without any delay. This is archived by having a internal queue which can hold multiple descriptors. The driver supports this, which means it will submit new descriptors directly to the hardware until the queue is full and not wait for a descriptor to complete before the next one is submitted. Interrupts are used for the descriptor queue flow control. Currently the driver supports SG, cyclic and interleaved slave DMA. Signed-off-by: Lars-Peter Clausen <lars@metafoo.de> Signed-off-by: Vinod Koul <vinod.koul@intel.com>