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path: root/drivers/gpio/gpio-mmio.c
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2017-03-23gpio: mmio: add support for NI 169445 NAND GPIONathan Sullivan
The GPIO-based NAND controller on National Instruments 169445 hardware exposes a set of simple lines for the control signals. Signed-off-by: Nathan Sullivan <nathan.sullivan@ni.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2016-08-11gpio: mmio: add brcm,bcm6345 supportChristian Lamparter
This patch adds support for the GPIO found in Broadcom's bcm63xx-gpio chips. This GPIO controller is used in the following Broadcom SoCs: BCM6338, BCM6345. It can be used in newer SoCs, without the capability of pin multiplexing. Signed-off-by: Christian Lamparter <chunkeey@googlemail.com> Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2016-06-08gpio: mmio: add MyBook Live GPIO supportChristian Lamparter
This patch adds support for the Western Digital's MyBook Live memory-mapped GPIO controllers. The GPIOs will be supported by the generic driver for memory-mapped GPIO controllers. Signed-off-by: Christian Lamparter <chunkeey@googlemail.com> Acked-by: Alexandre Courbot <acourbot@nvidia.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2016-06-08gpio: mmio: add DT support for memory-mapped GPIOsÁlvaro Fernández Rojas
This patch adds support for defining memory-mapped GPIOs which are compatible with the existing gpio-mmio interface. The generic library provides support for many memory-mapped GPIO controllers that are found in various on-board FPGA and ASIC solutions that are used to control board's switches, LEDs, chip-selects, Ethernet/USB PHY power, etc. For setting GPIOs there are three configurations: 1. single input/output register resource (named "dat"), 2. set/clear pair (named "set" and "clr"), 3. single output register resource and single input resource ("set" and dat"). The configuration is detected by which resources are present. For the single output register, this drives a 1 by setting a bit and a zero by clearing a bit. For the set clr pair, this drives a 1 by setting a bit in the set register and clears it by setting a bit in the clear register. For setting the GPIO direction, there are three configurations: a. simple bidirectional GPIOs that requires no configuration. b. an output direction register (named "dirout") where a 1 bit indicates the GPIO is an output. c. an input direction register (named "dirin") where a 1 bit indicates the GPIO is an input. Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com> Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com> Signed-off-by: Christian Lamparter <chunkeey@googlemail.com> Acked-by: Alexandre Courbot <acourbot@nvidia.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2016-04-29gpio: rename gpio-generic.c into gpio-mmio.cChristian Lamparter
This patch renames the gpio-generic.c into gpio-mmio.c. This is because currently the file only contains code for a memory-mapped GPIO driver. There isn't any support for ioports or other resource type. Signed-off-by: Christian Lamparter <chunkeey@googlemail.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>