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path: root/drivers/gpu/drm/amd/amdgpu/navi10_ih.c
AgeCommit message (Expand)Author
2020-09-03drm/amdgpu: enable ih1 ih2 for Arcturus onlyAlex Sierra
2020-07-21drm/amdgpu: add timeout flush mechanism to update wptr for self interrupt (v2)Chengming Gui
2020-07-15drm/amdgpu: add ih ip block for navy_flounderJiansong Chen
2020-06-03drm/amdgpu: add ih ip block for sienna_cichlidLikun Gao
2020-04-03amdgpu/drm: remove psp access on navi10 for sriovAlex Sierra
2020-04-01drm/amdgpu: reroute VMC and UMD to IH ring 1 for oss v5Alex Sierra
2020-04-01drm/amdgpu: call psp to program ih cntl in SR-IOV for NaviAlex Sierra
2020-04-01drm/amdgpu: enable IH ring 1 and ring 2 for naviAlex Sierra
2020-03-05drm/amdgpu: Rearm IRQ in Navi10 SR-IOV if IRQ lostSamir Dhume
2020-01-22drm/amdgpu: remove unnecessary conversion to boolNirmoy Das
2019-12-23drm/amdgpu: Remove unneeded variable 'ret' in navi10_ih.cMa Feng
2019-09-13drm/amdgpu: switch to new amdgpu_nbio structureHawking Zhang
2019-07-31drm/amdgpu: drop drmP.h from navi10_ih.cAlex Deucher
2019-06-20drm/amdgpu: add navi10 ih ip block (v3)Hawking Zhang
generated by cgit (git 2.34.1) at 2024-06-21 06:13:03 +0000