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path: root/drivers/gpu/drm/amd/amdgpu/nv.c
AgeCommit message (Expand)Author
2020-10-01drm/amdgpu: switch to indirect reg access helperHawking Zhang
2020-09-22drm/amdgpu: fix hdp register access errorStanley.Yang
2020-09-15drm/amdgpu: Fix consecutive DPC recovery failures.Andrey Grodzovsky
2020-08-26drm/amdgpu: use MODE1 reset for navy_flounder by defaultJiansong Chen
2020-08-26drm/amdgpu: add pre_asic_init callback for naviAlex Deucher
2020-08-14drm/amdgpu: note what type of reset we are usingAlex Deucher
2020-08-07drm/amdgpu: use mode1 reset by default for sienna_cichlidLikun Gao
2020-07-22drm/amdgpu: expand sienna chichlid reg access supportJohn Clements
2020-07-21drm/amdgpu: enable xgmi support for sienna cichlidJohn Clements
2020-07-15drm/amdgpu: enable ih CG for navy_flounderJiansong Chen
2020-07-15drm/amdgpu: enable hdp CG and LS for navy_flounderJiansong Chen
2020-07-15drm/amdgpu: enable mc CG and LS for navy_flounderJiansong Chen
2020-07-15drm/amdgpu: enable athub/mmhub PG for navy_flounderJiansong Chen
2020-07-15drm/amd/display: add DC support for navy flounderBhawanpreet Lakha
2020-07-15drm/amdgpu: enable GFX clock gating for navy_flounderJiansong Chen
2020-07-15drm/amdgpu: enable JPEG3.0 PG and CG for navy_flounderBoyuan Zhang
2020-07-15drm/amdgpu: enable VCN3.0 DPG for navy_flounderBoyuan Zhang
2020-07-15drm/amdgpu: enable VCN3.0 PG and CG for navy_flounderBoyuan Zhang
2020-07-15drm/amdgpu: add vcn ip block for navy_flounderBoyuan Zhang
2020-07-15drm/amdgpu: add psp block for navy_flounderJiansong Chen
2020-07-15drm/amdgpu: add smu block for navy_flounderJiansong Chen
2020-07-15drm/amdgpu: add virtual display support for navy_flounder.Jiansong Chen
2020-07-15drm/amdgpu: add sdma ip block for navy_flounderJiansong Chen
2020-07-15drm/amdgpu: add gfx ip block for navy_flounderJiansong Chen
2020-07-15drm/amdgpu: add ih ip block for navy_flounderJiansong Chen
2020-07-15drm/amdgpu: add gmc ip block for navy_flounderJiansong Chen
2020-07-15drm/amdgpu: add common ip block for navy_flounderJiansong Chen
2020-07-15drm/amdgpu: initialize IP offset for navy_flounderJiansong Chen
2020-07-15drm/amdgpu/soc15: add support for navy_flounderJiansong Chen
2020-07-15drm/amd/sriov skip jped ip block and close pgcg flagsJack Zhang
2020-07-15drm/amdgpu: add module parameter choose reset modeWenhui Sheng
2020-07-15drm/amdgpu: enable mode1 resetWenhui Sheng
2020-07-08drm/amdgpu: fix coding error of mmhub pg enablementLikun Gao
2020-07-02drm/amdgpu: request init data in virt detectionWenhui Sheng
2020-07-01drm/amdgpu: Enable DM block for DCN3Bhawanpreet Lakha
2020-07-01drm/amdgpu: enable DPG mode for VCN3.0Boyuan Zhang
2020-07-01drm/amd/powerplay: enable mmhub pgKenneth Feng
2020-07-01drm/amd/powerplay: enable athub pgKenneth Feng
2020-07-01drm/amdgpu: Sienna_Cichlid don't enable SMU for SRIOVshaoyunl
2020-07-01drm/amdgpu: Enable Multi Media Hub (MMHUB) Clock Gating for sienna_cichlid.Likun Gao
2020-07-01drm/amd/amdgpu: add athub ls supportKenneth Feng
2020-07-01drm/amd/amdgpu: add IH cg supportKenneth Feng
2020-07-01drm/amd/amdgpu: add HDP mgcg and ls supportKenneth Feng
2020-07-01drm/amd/amdgpu: fix the HDP LS/DS/SD programmingKenneth Feng
2020-07-01drm/amdgpu: open GFX clock gating for sienna_cichlidLikun Gao
2020-07-01drm/amdgpu: enable JPEG3.0 for Sienna_CichlidLeo Liu
2020-07-01drm/amdgpu: enable JPEG3.0 PG and CG for Sienna_CichlidLeo Liu
2020-07-01drm/amdgpu: enable VCN3.0 for Sienna_CichlidLeo Liu
2020-07-01drm/amdgpu: enable VCN3.0 PG and CG for Sienna_CichlidLeo Liu
2020-07-01drm/amdgpu: add mes block to sienna_cichlidJack Xiao
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