Age | Commit message (Collapse) | Author | |
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2018-08-27 | drm/amdgpu: enable ABGR and XBGR formats (v2) | Mauro Rossi | |
Add support for DRM_FORMAT_{A,X}BGR8888 in amdgpu with amd dc disabled (v2) Crossbar registers are defined and used to swap red and blue channels, keeping the existing coding style in each of the dce modules. After setting crossbar bits in fb_swap, use bitwise OR for big endian where required in DCE6 and DCE8 which do not rely on REG_SET_FIELD() Signed-off-by: Mauro Rossi <issor.oruam@gmail.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> | |||
2017-01-27 | drm/amdgpu: move misc si headers into amdgpu | Alex Deucher | |
Move these to the amdgpu directory to match what we do for other asics. Acked-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> |