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path: root/drivers/gpu/drm/amd/display/dc/dcn30/dcn30_resource.c
AgeCommit message (Expand)Author
2021-11-03drm/amd/display: Fix dummy p-state hang on monitors with extreme timingFelipe Clark
2021-10-28drm/amd/display: move FPU associated DCN301 code to DML folderQingqing Zhuo
2021-10-28drm/amd/display: Remove unused macrosAnson Jacob
2021-10-28drm/amd/display: allow windowed mpo + odmDmytro Laktyushkin
2021-09-14drm/amd/display: Fix multiple memory leaks reported by coverityAnson Jacob
2021-09-01drm/amd/display: Set min dcfclk if pipe count is 0Michael Strauss
2021-08-26drm/amd/display: Move AllowDRAMSelfRefreshOrDRAMClockChangeInVblank to boundi...Nicholas Kazlauskas
2021-08-26drm/amd/display: Remove duplicate dml initAurabindo Pillai
2021-08-26drm/amd/display: Update bounding box states (v2)Jerry (Fangzhi) Zuo
2021-08-26drm/amd/display: Update number of DCN3 clock statesAurabindo Pillai
2021-08-09drm/amd/display: Remove invalid assert for ODM + MPC caseEric Bernstein
2021-08-05drm/amd/display: Assume LTTPR interop for DCN31+Wesley Chalmers
2021-06-08drm/amd/display: Change default policy for MPO with multidisplayAric Cyr
2021-05-19drm/amd/display: Fix typo of format termination newlineJoe Perches
2021-05-19drm/amd/display: Use the correct max downscaling value for DCN3.x familyNikola Cornij
2021-04-28drm/amd/display: ddc resource data need to be initializedYu-ting Shen
2021-04-09drm/amd/display: revert max lb lines changeDmytro Laktyushkin
2021-03-23drm/amd/display: fix dcn3+ bw validation soc param update sequenceDmytro Laktyushkin
2021-03-23drm/amd/display: Separate caps for maximum RGB and YUV plane countsAtufa Khan
2021-03-23drm/amd/display: use max lb for latency hidingDmytro Laktyushkin
2021-03-23drm/amd/display: Enabled pipe harvesting in dcn30Dillon Varone
2021-02-18drm/amd/display: changing sr exit latencyMartin Leung
2021-02-02drm/amd/display: Better handling of dummy p-state tableJoshua Aberback
2021-02-02drm/amd/display: fix initial bounding box values for dcn3.02Samson Tam
2021-02-02drm/amd/display: Drop SOC bounding box hookup in DM/DCNicholas Kazlauskas
2021-01-05drm/amd/display: Update idle optimization handlingJoshua Aberback
2020-11-16drm/amd/display: Add I2C memory low power supportJacky Liao
2020-11-13drm/amdgpu/display: fix FP handling in DCN30Alex Deucher
2020-11-10drm/amd/display: force use sRGB for video TF is sRGB or BT709Jing Zhou
2020-11-10drm/amd/display: Prevent freesync power optimization during validationIsabel Zhang
2020-11-04drm/amdgpu/display: FP fixes for DCN3.x (v4)Alex Deucher
2020-10-30drm/amd/display: allow 18 bit dp output on DCN3Dmytro Laktyushkin
2020-10-26drm/amd/display: prevent null pointer accessDmytro Laktyushkin
2020-10-26drm/amd/display: Refactor ABM_MASK_SH_LIST_DCN301 namingRoman Li
2020-10-26drm/amd/display: adding reading OEM init_data to dcn3Martin Leung
2020-10-26drm/amd/display: Set WM set A to 0 if full pstate not supportedAlvin Lee
2020-10-26drm/amd/display: Source minimum HBlank supportAshley Thomas
2020-10-26drm/amd/display: enable odm + full screen mpo on dcn21Dmytro Laktyushkin
2020-10-23drm/amdgpu/display: add MALL support (v2)Bhawanpreet Lakha
2020-10-05drm/amd/display: Add i2c speed arbitration for dc_i2c and hdcp_i2cCharlene Liu
2020-09-30drm/amd/display: add pipe reassignment prevention code to dcn3Dmytro Laktyushkin
2020-09-29amd/drm/display: avoid dcn3 on flip opp change for slave pipesDmytro Laktyushkin
2020-09-29drm/amd/display: Calc DLG from dummy p-state if full p-state unsupportedJoshua Aberback
2020-09-15drm/amd/display: get socBB from VBIOSJun Lei
2020-09-15drm/amd/display: adding pathway to retrieve stutter periodMartin Leung
2020-09-15drm/amd/display: Enabling PSR on DCN30 on driver sideZhan Liu
2020-09-15drm/amd/display: Triplebuffering should not be used by defaultAric Cyr
2020-08-26drm/amd/display: Add DPCS regs for dcn3 link encoderBhawanpreet Lakha
2020-08-18drm/amd/display: Add dsc_to_stream_resource for dcn3Bhawanpreet Lakha
2020-08-17drm/amd/display: Reset scrambling on Test PatternChris Park
generated by cgit (git 2.34.1) at 2024-05-28 09:46:57 +0000