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path: root/drivers/gpu/drm/amd/include/arct_ip_offset.h
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2020-11-24drm/amd/include/arct_ip_offset: Mark top-level IP_BASE definition as ↵Lee Jones
__maybe_unused Fixes the following W=1 kernel build warning(s): In file included from drivers/gpu/drm/amd/amdgpu/arct_reg_init.c:27: drivers/gpu/drm/amd/amdgpu/../include/arct_ip_offset.h:227:29: warning: ‘DBGU_IO_BASE’ defined but not used [-Wunused-const-variable=] 227 | static const struct IP_BASE DBGU_IO_BASE ={ { { { 0x000001E0, 0x000125A0, 0x0040B400, 0, 0, 0 } }, | ^~~~~~~~~~~~ drivers/gpu/drm/amd/amdgpu/../include/arct_ip_offset.h:127:29: warning: ‘PCIE0_BASE’ defined but not used [-Wunused-const-variable=] 127 | static const struct IP_BASE PCIE0_BASE ={ { { { 0x000128C0, 0x00411800, 0x04440000, 0, 0, 0 } }, | ^~~~~~~~~~ In file included from drivers/gpu/drm/amd/amdgpu/arct_reg_init.c:27: drivers/gpu/drm/amd/amdgpu/../include/arct_ip_offset.h:63:29: warning: ‘FUSE_BASE’ defined but not used [-Wunused-const-variable=] 63 | static const struct IP_BASE FUSE_BASE ={ { { { 0x000120A0, 0x00017400, 0x00401400, 0, 0, 0 } }, | ^~~~~~~~~ Acked-by: Christian König <christian.koenig@amd.com> Cc: Alex Deucher <alexander.deucher@amd.com> Cc: "Christian König" <christian.koenig@amd.com> Cc: David Airlie <airlied@linux.ie> Cc: Daniel Vetter <daniel@ffwll.ch> Cc: amd-gfx@lists.freedesktop.org Cc: dri-devel@lists.freedesktop.org Signed-off-by: Lee Jones <lee.jones@linaro.org> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-07-30drm/amd/include: adjust base offset of SMUIO and THM for ArcturusLe Ma
Arcturus has different _BASE_IDX value in some HWIP_offset.h. To make source files like smu_v11_0.c and soc15.c that include HWIP_offset.h of Vega20 reusable for Arcturus, align this base offset with Vega20. Signed-off-by: Le Ma <le.ma@amd.com> Reviewed-by: Kenneth Feng <kenneth.feng@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-07-18drm/amdgpu: add Arcturus ip_offset header (v3)Le Ma
Provides the absolute offsets of the IP register blocks. v2: update chip name in source code v3: squash in MP offset updates (Alex) Signed-off-by: Le Ma <le.ma@amd.com> Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>