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path: root/drivers/gpu/drm/amd/include/asic_reg
AgeCommit message (Expand)Author
2020-09-17drm/amdgpu: add VCN 3.0 AV1 registersAlex Deucher
2020-09-17drm/amdgpu: add the GC 10.3 VRS registersAlex Deucher
2020-07-01drm amdgpu: SI UVD registersSonny Jiang
2020-07-01drm/amd/amdgpu: Fix offset for SQ_DEBUG_STS_GLOBAL on gfx10 (v2)Tom St Denis
2020-07-01drm/amd/amdgpu: Fix SQ_DEBUG_STS_GLOBAL* registersTom St Denis
2020-07-01drm/amd/amdgpu: Add SQ_DEBUG_STS_GLOBAL* registers/bitsTom St Denis
2020-07-01drm/amd/amdgpu: Add SQ debug registers to GFX9/GFX10 headers (v2)Tom St Denis
2020-06-03drm/amd/display: Add dcn30 Headers (v2)Jerry (Fangzhi) Zuo
2020-06-03drm/amdgpu: add VCN3.0 register headers (v2)Leo Liu
2020-06-03drm/amdgpu: Add ATHUB 2.1 header files (v2)Yong Zhao
2020-06-03drm/amdgpu: add GC 10.3 header files (v2)Likun Gao
2020-05-11drm/amd/amdgpu: Add missing GRBM bits for GFX 10.1Tom St Denis
2020-04-01drm/amd/amdgpu: Fix SMUIO/PWR Confusion (v2)Tom St Denis
2020-04-01drm/amd/amdgpu: Move PWR_MISC_CNTL_STATUS to its own headerTom St Denis
2020-04-01drm/amd/amdgpu: Add missing SMUIO v12 register to headersTom St Denis
2020-04-01drm/amdgpu: cleanup all virtualization detection routineMonk Liu
2020-04-01drm/amd/amdgpu: Add GFX9.1 PWR_MISC_CNTL_STATUS register to headersTom St Denis
2020-03-06drm/amdgpu: add wafl2 ip headersHawking Zhang
2020-03-06drm/amdgpu: add xgmi ip headersHawking Zhang
2020-02-25amdgpu/gmc_v9: save/restore sdpif regs during S3Shirish S
2020-01-30drm/amdgpu: Enable DISABLE_BARRIER_WAITCNT for ArcturusJoseph Greathouse
2020-01-22drm/amdgpu: add EDC counter registers of gc for ArcturusDennis Li
2020-01-22drm/amdgpu: update mmhub 9.4.1 header files for AcrturusDennis Li
2020-01-22drm/amdgpu: added support to get mGPU DRAM baseJohn Clements
2020-01-16drm/amd/include: Add OCSC registersRodrigo Siqueira
2020-01-14drm/amdgpu: add defines for DF and TCP HashingJoseph Greathouse
2020-01-14drm/amd/amdgpu: add missing umc_6_1_2_sh_mask.h header file (v2)Tom St Denis
2020-01-14drm/amdgpu: add MCUMC_ADDRT0 offset to ip header fileGuchun Chen
2019-12-23drm/amdgpu: Add mmCOMPUTE_STATIC_THREAD_MGMT_SE4-7 to support ArcturusJames Zhu
2019-12-23drm/amdgpu: add perfmons accessible during df c-statesJonathan Kim
2019-12-18drm/amdgpu: move umc offset to one new header file for ArcturusGuchun Chen
2019-12-18drm/amdgpu: add dpcs20 registersRoman Li
2019-12-18drm/amdgpu: move dpcs headers to dpcs includesRoman Li
2019-11-22drm/amdgpu: refine query function of mmhub EDC counter in vg20Dennis Li
2019-10-25drm/amdgpu: add VCN0 and VCN1 needed headersJane Jian
2019-10-17drm/amd/display: Add DP_DPHY_INTERNAL_CTR regsBhawanpreet Lakha
2019-10-15drm/amdgpu: add new SMU 7.1.3 registers for BACOAlex Deucher
2019-10-15drm/amdgpu: add new SMU 7.1.2 registers for BACOAlex Deucher
2019-10-15drm/amdgpu: add new SMU 7.0.1 registers for BACOAlex Deucher
2019-10-15drm/amdgpu: add new BIF 5.0 register for BACOAlex Deucher
2019-10-15drm/amdgpu: add new BIF 4.1 register for BACOAlex Deucher
2019-10-15drm/amd/include: add register define for VML2 and ATCL2Dennis Li
2019-10-03drm/amd/amdgpu: add IH cg support on soc15 projectKenneth Feng
2019-10-03drm/amdgpu: Add SMUIO values for other I2C controller v2Kent Russell
2019-09-16drm/amdgpu: add pcie bif ras related registersGuchun Chen
2019-09-13drm/amdgpu: update nbio v7_4 ip header filesHawking Zhang
2019-08-30drm/amdgpu: update IH_CHICKEN in oss 4.0 IP header for VG/RV seriesAaron Liu
2019-08-29drm/amd/display: Add Renoir registers (v3)Bhawanpreet Lakha
2019-08-27drm/amd: Import smuio_11_0 headers for EEPROM access on Vega20Andrey Grodzovsky
2019-08-15drm/amdgpu: implement querying ras error count for mmhubTao Zhou
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