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path: root/drivers/gpu/drm/amd/pm/swsmu/smu12/smu_v12_0.c
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2023-07-27drm/amd/pm: open brace '{' following function definitions go on the next lineRan Sun
ERROR: open brace '{' following function definitions go on the next line Signed-off-by: Ran Sun <sunran001@208suo.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2023-02-23drm/amd/pm: downgrade log level upon SMU IF version mismatchGuchun Chen
SMU IF version mismatch as a warning message exists widely after asic production, however, due to this log level setting, such mismatch warning will be caught by automation test like IGT and reported as a fake error after checking. As such mismatch does not break anything, to reduce confusion, downgrade it from dev_warn to dev_info. Signed-off-by: Guchun Chen <guchun.chen@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2022-01-25drm/amd: Fix MSB of SMU version printingMario Limonciello
Yellow carp has been outputting versions like `1093.24.0`, but this is supposed to be 69.24.0. That is the MSB is being interpreted incorrectly. The MSB is not part of the major version, but has generally been treated that way thus far. It's actually the program, and used to distinguish between two programs from a similar family but different codebase. Reviewed-by: Lijo Lazar <lijo.lazar@amd.com> Signed-off-by: Mario Limonciello <mario.limonciello@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2021-12-16drm/amd/pm: skip setting gfx cgpg in the s0ix suspend-resumePrike Liang
In the s0ix entry need retain gfx in the gfxoff state,so here need't set gfx cgpg in the S0ix suspend-resume process. Moreover move the S0ix check into SMU12 can simplify the code condition check. Signed-off-by: Prike Liang <Prike.Liang@amd.com> Reviewed-by: Evan Quan <evan.quan@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2021-12-14drm/amd/pm: fix a potential gpu_metrics_table memory leakLang Yu
Memory is allocated for gpu_metrics_table in renoir_init_smc_tables(), but not freed in int smu_v12_0_fini_smc_tables(). Free it! Fixes: 95868b85764a ("drm/amd/powerplay: add Renoir support for gpu metrics export") Signed-off-by: Lang Yu <lang.yu@amd.com> Reviewed-by: Lijo Lazar <lijo.lazar@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2021-04-15drm/amd/pm: add the callback to get the bootup values for renoirXiaojian Du
This patch is to add the callback to get the bootup values for renoir. Signed-off-by: Xiaojian Du <Xiaojian.Du@amd.com> Reviewed-by: Huang Rui <ray.huang@amd.com> Reviewed-by: Lijo Lazar <lijo.lazar@amd.com> Acked-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2021-02-09drm/amd/pm/swsmu: unify the init soft gpu metrics functionKevin Wang
the soft gpu metrics is not asic related data structure. unify them to reduce duplicate code. Signed-off-by: Kevin Wang <kevin1.wang@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2021-01-05drm/amd/pm: fix the failure when change power profile for renoirXiaojian Du
This patch is to fix the failure when change power profile to "profile_peak" for renoir. Signed-off-by: Xiaojian Du <Xiaojian.Du@amd.com> Reviewed-by: Huang Rui <ray.huang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-11-10drm/amdgpu/pm/smu12: cache smu firmware versionAlex Deucher
So we print the proper SMU firmware version in debugfs, ioctls, etc. for Renoir. Reviewed-by: Evan Quan <evan.quan@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-08-14drm/amd/pm: optimize the power related source code layoutEvan Quan
The target is to provide a clear entry point(for power routines). Also this can help to maintain a clear view about the frameworks used on different ASICs. Hopefully all these can make power part more friendly to play with. Signed-off-by: Evan Quan <evan.quan@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>