summaryrefslogtreecommitdiff
path: root/drivers/gpu/drm/amd
AgeCommit message (Collapse)Author
2016-05-11drm/amd/powerplay: rewrite pp_sw_init to make code readableHuang Rui
Actually, pp_sw_init executes pptable_init and backend_init orderly if they are initialized successfully. So rewrite it to make code more readable. Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Huang Rui <ray.huang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-05-11drm/amdgpu/dce11: fix audio offset for asics with >7 audio pinsAlex Deucher
Missing offset in the audio offset array. Reported-by: Dan Carpenter <dan.carpenter@oracle.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-05-11drm/amdgpu: fix and cleanup user fence handling v2Christian König
We leaked the BO in the error pass, additional to that we only have one user fence for all IBs in a job. v2: remove white space changes Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-05-11drm/amdgpu: move VM fields into jobChristian König
They are the same for all IBs. Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-05-11drm/amdgpu: move the context from the IBs into the jobChristian König
We only have one context for all IBs. Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-05-11drm/amdgpu: move context switch handling into common code v2Christian König
It was a source of bugs to repeat that in each IP version. v2: rename parameter Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-05-11drm/amdgpu: move preamble IB handling into common codeChristian König
This fixes the handling which was completely broken when you ad more than one preamble IB. Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-05-11drm/amdgpu/gfx7: fix pipeline syncChunming Zhou
Need to wait on the fence as well. Signed-off-by: Chunming Zhou <David1.Zhou@amd.com> Reviewed-by: Monk Liu <monk.liu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-05-11amdgpu/uvd: separate context buffer from DPBSonny Jiang
Updated to handle latest UVD ucode. Signed-off-by: Sonny Jiang <sonny.jiang@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-05-11drm/amdgpu: use fence_context to judge ctx switch v2Christian König
Use of the ctx pointer is not safe, because they are likely already be assigned to another ctx when doing comparing. v2: recreate from scratch, avoid all unnecessary changes. Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Monk.Liu <monk.liu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-05-11drm/amd/amdgpu: Added more named DRM info messages for debuggingTom St Denis
Signed-off-by: Tom St Denis <tom.stdenis@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-05-11drm/amd/amdgpu: Add name field to amd_ip_funcs (v2)Tom St Denis
Add name that we can print out in kernel messages to aid in debugging. v2: drop DAL changes for upstream Signed-off-by: Tom St Denis <tom.stdenis@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-05-11drm/amdgpu: Support DRM_MODE_PAGE_FLIP_ASYNC (v2)Alex Deucher
When this flag is set, we program the hardware to execute the flip during horizontal blank (i.e. for the next scanline) instead of during vertical blank (i.e. for the next frame). Ported from radeon commit: drm/radeon: Support DRM_MODE_PAGE_FLIP_ASYNC v2: drop DAL change for upstream Reviewed-by: Michel Dänzer <michel.daenzer@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-05-11drm/amdgpu/dce11: don't share PLLs on PolarisAlex Deucher
They are part of the phy so you can't share them. Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-05-11drm/amdgpu: Drop unused parameter for *get_sleep_divider_id_from_clockNils Wallménius
Signed-off-by: Nils Wallménius <nils.wallmenius@gmail.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-05-11drm/amdgpu: Simplify calculation in *get_sleep_divider_id_from_clockNils Wallménius
a / (1 << b) is equivalent to a >> b for unsigned values Signed-off-by: Nils Wallménius <nils.wallmenius@gmail.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-05-11drm/amdgpu: Use max macro in *get_sleep_divider_id_from_clockNils Wallménius
Signed-off-by: Nils Wallménius <nils.wallmenius@gmail.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-05-11drm/amd/powerplay: Use defined constants for minium engine clockNils Wallménius
Replacing magic numbers in calculation of sleep divider id for fiji and polaris. Signed-off-by: Nils Wallménius <nils.wallmenius@gmail.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-05-11drm/amdgpu: add missing licenses on a couple of filesAlex Deucher
Noticed by n1s on IRC. Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-05-11drm/amdgpu: fetch cu_info once at initAlex Deucher
Fetch this info once at init and just store the results for future requests. Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-05-11drm/amd: cleanup remaining spaces and tabs v2Christian König
This is the result of running the following commands: find drivers/gpu/drm/amd/ -name "*.h" -exec sed -i 's/[ \t]\+$//' {} \; find drivers/gpu/drm/amd/ -name "*.c" -exec sed -i 's/[ \t]\+$//' {} \; find drivers/gpu/drm/amd/ -name "*.h" -exec sed -i 's/ \+\t/\t/' {} \; find drivers/gpu/drm/amd/ -name "*.c" -exec sed -i 's/ \+\t/\t/' {} \; v2: drop changes to DAL and internal headers Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-05-11drm/amdgpu: remove define for reserved client IDChristian König
Just set it to zero instead. Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Chunming Zhou <david1.zhou@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-05-11drm/amdgpu: remove owner cleanup v2Christian König
The client ID is now unique, so no need to resert the owner fields any more. v2: remove unused variables as well Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Chunming Zhou <david1.zhou@amd.com> (v1) Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-05-11drm/amdgpu: make the VMID owner always 64bitChristian König
Otherwise we could (in theory) run into problems on 32bit systems. Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Chunming Zhou <david1.zhou@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-05-11drm/amdgpu: two minor 80 char fixesChristian König
Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Tom St Denis <tom.stdenis@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-05-11drm/amdgpu: hdp flush&inval should always doMonk Liu
This fixes Tonga vm-fault issue when running disaster (a multiple context GL heavy tests), We should always flush & invalidate hdp no matter vm used or not. Signed-off-by: Monk Liu <Monk.Liu@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Reviewed-by: Chunming Zhou <David1.Zhou@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Cc: stable@vger.kernel.org
2016-05-11drm/amd/amdgpu: Enable CG for UVD6 on CarrizoTom St Denis
Tested via vdpau/mpv. Signed-off-by: Tom St Denis <tom.stdenis@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-05-11drm/amdgpu: add pipeline sync for compute jobChunming Zhou
hardware ring is async processed, the job is executed in parallel. In some case, this will result vm fault, like jobs with different vmids. This works around a CPC hw issue which will eventually be fixed in fw. Signed-off-by: Chunming Zhou <David1.Zhou@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Reviewed-by: Monk Liu <monk.liu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-05-11drm/amdgpu: keep vm in job instead of ib (v2)Monk Liu
ib.vm is a legacy way to get vm, after scheduler implemented vm should be get from job, and all ibs from one job share the same vm, no need to keep ib.vm just move vm field to job. this patch as well add job as paramter to ib_schedule so it can get vm from job->vm. v2: agd: sqaush in: drm/amdgpu: check if ring emit_vm_flush exists in vm flush No vm flush on engines that don't support VM. bug: https://bugs.freedesktop.org/show_bug.cgi?id=95195 Signed-off-by: Monk Liu <Monk.Liu@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-05-11drm/amdgpu: make vmid owner be client_idChunming Zhou
Using the pointer is not adequate. Signed-off-by: Chunming Zhou <David1.Zhou@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: Monk Liu <monk.liu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-05-11drm/amdgpu: add client id for every vmChunming Zhou
This adds a unique id for each vm client so we can properly track them. Signed-off-by: Chunming Zhou <David1.Zhou@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: Monk Liu <monk.liu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-05-11drm/amdgpu: fix wrong release of vmid ownerChunming Zhou
The release of the vmid owner was not handled correctly. We need to take the lock and walk the lru list. Signed-off-by: Chunming Zhou <David1.Zhou@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: Monk Liu <monk.liu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-05-09Merge tag 'v4.6-rc7' into drm-nextDave Airlie
Merge this back as we've built up a fair few conflicts, and I have some newer trees to pull in.
2016-05-09drm/amdgpu: fix build on aarch64.Dave Airlie
Same fix went in previously for some other files. Signed-off-by: Dave Airlie <airlied@redhat.com>
2016-05-06Merge branch 'drm-next-4.7' of git://people.freedesktop.org/~agd5f/linux ↵Dave Airlie
into drm-next This is the first big radeon/amdgpu pull request for 4.7. Highlights: - Polaris support in amdgpu Current display stack on par with other asics, for advanced features DAL is required Power management support Support for GFX, Compute, SDMA, UVD, VCE - VCE and UVD init/fini cleanup in radeon - GPUVM improvements - Scheduler improvements - Clockgating improvements - Powerplay improvements - TTM changes to support driver specific LRU update mechanism - Radeon support for new Mesa features - ASYNC pageflip support for radeon - Lots of bug fixes and code cleanups * 'drm-next-4.7' of git://people.freedesktop.org/~agd5f/linux: (180 commits) drm/amdgpu: Replace rcu_assign_pointer() with RCU_INIT_POINTER() drm/amdgpu: use drm_mode_vrefresh() rather than mode->vrefresh drm/amdgpu/uvd6: add bypass support for fiji (v3) drm/amdgpu/fiji: set UVD CG state when enabling UVD DPM (v2) drm/powerplay: add missing clockgating callback for tonga drm/amdgpu: Constify some tables drm/amd/powerplay: Delete dead struct declaration drm/amd/powerplay/hwmgr: don't add invalid voltage drm/amd/powerplay/hwmgr: prevent VDDC from exceeding 2V MAINTAINERS: Remove unneded wildcard for the Radeon/AMDGPU drivers drm/radeon: add cayman VM support for append packet. drm/amd/amdgpu: Add debugfs entries for smc/didt/pcie drm/amd/amdgpu: Drop print_status callbacks. drm/amd/powerplay: revise reading/writing pptable on Polaris10 drm/amd/powerplay: revise reading/writing pptable on Tonga drm/amd/powerplay: revise reading/writing pptable on Fiji drm/amd/powerplay: revise caching the soft pptable and add it's size drm/amd/powerplay: add dpm force multiple levels on cz/tonga/fiji/polaris (v2) drm/amd/powerplay: fix fan speed percent setting error on Polaris10 drm/amd/powerplay: fix bug dpm can't work when resume back on Polaris ...
2016-05-04drm/amdgpu: Replace rcu_assign_pointer() with RCU_INIT_POINTER()Muhammad Falak R Wani
The rcu_assign_pointer() ensures that the initialization of a structure is carried out before storing a pointer to that structre. It is always safe to use RCU_INIT_POINTER() to NULL a pointer, instead of rcu_assign_pointer(). This results in slightly smaller/faster code. The following semantic patch was used: <smpl> @@ @@ - rcu_assign_pointer + RCU_INIT_POINTER (..., NULL) </smpl> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Muhammad Falak R Wani <falakreyaz@gmail.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-05-04drm/amdgpu: use drm_mode_vrefresh() rather than mode->vrefreshAlex Deucher
This is a port of radeon commit: 3d2d98ee1af0cf6eebfbd6bff4c17d3601ac1284 drm/radeon: use drm_mode_vrefresh() rather than mode->vrefresh to amdgpu. Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Cc: stable@vger.kernel.org
2016-05-04drm/amdgpu/uvd6: add bypass support for fiji (v3)Alex Deucher
Handle uvd clock bypass settings as part of clockgating setup. v2: fix gate logic v3: fix header include Reviewed-by: Eric Huang <JinHuiEric.Huang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-05-04drm/amdgpu/fiji: set UVD CG state when enabling UVD DPM (v2)Alex Deucher
Need to call the IP cg callbacks. v2: fix gate logic Reviewed-by: Eric Huang <JinHuiEric.Huang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-05-04drm/powerplay: add missing clockgating callback for tongaAlex Deucher
Without this clockgating is not enabled. Reviewed-by: Ken Wang <Qingqing.Wang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-05-04drm/amdgpu: Constify some tablesNils Wallménius
Some more tables with constant data were added with the polaris support v2: missed a few Signed-off-by: Nils Wallménius <nils.wallmenius@gmail.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-05-04drm/amd/powerplay: Delete dead struct declarationNils Wallménius
Signed-off-by: Nils Wallménius <nils.wallmenius@gmail.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-05-04drm/amd/powerplay/hwmgr: don't add invalid voltageMoritz Kühner
if atomctrl_get_voltage_evv_on_sclk returns non zero (fail) in the expansion of the PP_ASSERT_WITH_CODE macro the continue will actually do nothing (The macro uses a do ... while(0) as scope, which eats the continue). Based on the code I don't think this was the intent. Unfortunately fixing this requires rewriting the control flow and removing the macros. v2: added signed of by fixed error message print v3: agd: drop DRM_ERROR Signed-off-by: Moritz Kühner <kuehner.moritz@gmail.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-05-04drm/amd/powerplay/hwmgr: prevent VDDC from exceeding 2VMoritz Kühner
If the tonga gpu is controlled by SVID2 tonga_get_evv_voltage will only print an error if the voltage exceeds 2V although a comment clearly states that it needs be less than 2V. v2: added signed of by Signed-off-by: Moritz Kühner <kuehner.moritz@gmail.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-05-04drm/amd/amdgpu: Add debugfs entries for smc/didt/pcieTom St Denis
This adds 3 new files that can be read/written to access indirect GPU registers. Signed-off-by: Tom St Denis <tom.stdenis@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-05-04drm/amd/amdgpu: Drop print_status callbacks.Tom St Denis
First patch in series to move to user mode debug tools we're removing the print_status callbacks. These functions were unused at the moment anyway. Signed-off-by: Tom St Denis <tom.stdenis@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-05-04drm/amd/powerplay: revise reading/writing pptable on Polaris10Eric Huang
Change the way we store pptables in the driver to better facilitate eventual runtime updates for debugging. Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Eric Huang <JinHuiEric.Huang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-05-04drm/amd/powerplay: revise reading/writing pptable on TongaEric Huang
Change the way we store pptables in the driver to better facilitate eventual runtime updates for debugging. Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Eric Huang <JinHuiEric.Huang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-05-04drm/amd/powerplay: revise reading/writing pptable on FijiEric Huang
Change the way we store pptables in the driver to better facilitate eventual runtime updates for debugging. Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Eric Huang <JinHuiEric.Huang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-05-04drm/amd/powerplay: revise caching the soft pptable and add it's sizeEric Huang
This fixes a bug in the pptable access interface that could lead to a crash. Check the pointer before using it. Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Eric Huang <JinHuiEric.Huang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
generated by cgit (git 2.34.1) at 2025-05-29 08:21:52 +0000