summaryrefslogtreecommitdiff
path: root/drivers/gpu/drm/i915/display/intel_cdclk.c
AgeCommit message (Expand)Author
2021-10-27drm/i915/cdclk: put the cdclk vtables in const dataJani Nikula
2021-10-14drm/i915: split out intel_pcode.[ch] to separate fileJani Nikula
2021-10-14drm/i915: split out vlv sideband to a separate fileJani Nikula
2021-09-29drm/i915: constify the cdclk vtableDave Airlie
2021-09-29drm/i915: split cdclk functions from display vtable.Dave Airlie
2021-09-29drm/i915: add wrappers around cdclk vtable funcs.Dave Airlie
2021-09-28drm/i915/display: Fix the dsc check while selecting min_cdclkVandita Kulkarni
2021-09-08drm/i915: Get proper min cdclk if vDSC enabledLee Shawn C
2021-07-30drm/i915/display: remove explicit CNL handling from intel_cdclk.cLucas De Marchi
2021-07-22drm/i915/dg2: Add cdclk table and reference clockMatt Roper
2021-07-21drm/i915: Make display workaround upper bounds exclusiveMatt Roper
2021-07-13drm/i915/display: Settle on "adl-x" in WA commentsJosé Roberto de Souza
2021-07-08drm/i915: Handle cdclk crawling flag in standard mannerMatt Roper
2021-06-09drm/i915/adl_p: CDCLK crawl support for ADLStanislav Lisovskiy
2021-06-08drm/i915: Disable PSR around cdclk changesVille Syrjälä
2021-05-14drm/i915/display/adl_p: Implement Wa_22011320316José Roberto de Souza
2021-05-14drm/i915: Move intel_modeset_all_pipes()Ville Syrjälä
2021-05-14drm/i915/adl_p: Add cdclk support for ADL-PAnusha Srivatsa
2021-05-05drm/i915: Use intel_de_wait_for_*() in cnl+ cdclk programmingVille Syrjälä
2021-05-05drm/i915: Use intel_de_rmw() in bxt/glk/cnl+ cdclk programmingVille Syrjälä
2021-05-05drm/i915: Use intel_de_rmw() in skl cdclk programmingVille Syrjälä
2021-05-05drm/i915: Use intel_de_rmw() in bdw cdclk programmingVille Syrjälä
2021-05-05drm/i915: Extract some helpers to compute cdclk register valuesVille Syrjälä
2021-05-05drm/i915: Don't include intel_de.h from intel_display_types.hVille Syrjälä
2021-04-14drm/i915/display: rename display version macrosLucas De Marchi
2021-04-14drm/i915/display: Eliminate IS_GEN9_{BC,LP}Matt Roper
2021-03-23drm/i915/display: Simplify GLK display version testsMatt Roper
2021-03-23drm/i915/display: Eliminate most usage of INTEL_GEN()Matt Roper
2021-03-23drm/i915/display: Convert gen5/gen6 tests to IS_IRONLAKE/IS_SANDYBRIDGEMatt Roper
2021-02-05drm/i915: Index min_{cdclk,voltage_level}[] with pipeVille Syrjälä
2021-02-02drm/i915: Remove references to struct drm_device.pdevThomas Zimmermann
2020-12-04drm/i915: Add intel_atomic_add_affected_planes()Ville Syrjälä
2020-12-01drm/i915/cdclk: prefer intel_de_write() over I915_WRITE()Jani Nikula
2020-10-16drm/i915/rkl: Add new cdclk tableMatt Roper
2020-10-14drm/i915/jsl: Split EHL/JSL platform info and PCI idsTejas Upadhyay
2020-10-07drm/i915/dg1: Initialize RAWCLK properlyMatt Roper
2020-09-17drm/i915: Nuke force_min_cdclk_changedVille Syrjälä
2020-09-08Merge tag 'v5.9-rc4' into drm-nextDave Airlie
2020-08-23treewide: Use fallthrough pseudo-keywordGustavo A. R. Silva
2020-08-17drm/i915: Make i830 .get_cdclk() assignment less confusingVille Syrjälä
2020-08-17drm/i915: Fix some whitespaceVille Syrjälä
2020-07-03drm/i915/tgl: Clamp min_cdclk to max_cdclk_freq to unblock 8KStanislav Lisovskiy
2020-06-08Revert "drm/i915: Remove unneeded hack now for CDCLK"Stanislav Lisovskiy
2020-06-04drm/i915: Fix wrong CDCLK adjustment changesStanislav Lisovskiy
2020-05-22drm/i915: Fix includes and local vars orderStanislav Lisovskiy
2020-05-21drm/i915: Remove unneeded hack now for CDCLKStanislav Lisovskiy
2020-05-21drm/i915: Adjust CDCLK accordingly to our DBuf bw needsStanislav Lisovskiy
2020-05-19drm/i915: Read out hrawclk on all gen3+ platformsVille Syrjälä
2020-05-19drm/i915: Document our lackluster FSB frequency readoutVille Syrjälä
2020-05-19drm/i915: Fix 400 MHz FSB readout on elkVille Syrjälä
generated by cgit (git 2.34.1) at 2025-04-02 05:06:00 +0000