summaryrefslogtreecommitdiff
path: root/drivers/gpu/drm/i915/i915_reg.h
AgeCommit message (Expand)Author
2021-10-19drm/i915: Remove memory frequency calculationJosé Roberto de Souza
2021-10-05drm/i915: Extend the async flip VT-d w/a to skl/bxtVille Syrjälä
2021-09-01Merge tag 'drm-next-2021-08-31-1' of git://anongit.freedesktop.org/drm/drmLinus Torvalds
2021-08-12drm/i915/display: Fix the 12 BPC bits for PIPE_MISC regAnkit Nautiyal
2021-08-12Merge tag 'drm-intel-next-2021-08-10-1' of git://anongit.freedesktop.org/drm/...Dave Airlie
2021-08-12Merge tag 'drm-intel-gt-next-2021-08-06-1' of ssh://git.freedesktop.org/git/d...Dave Airlie
2021-08-05drm/i915/dg2: Add SQIDI steeringMatt Roper
2021-08-05drm/i915/xehp: handle new steering optionsDaniele Ceraolo Spurio
2021-08-03drm/i915/xehp: Changes to ss/eu definitionsMatthew Auld
2021-08-03drm/i915/guc/slpc: Sysfs hooks for SLPCVinay Belgaumkar
2021-08-03drm/i915/guc/slpc: Cache platform frequency limitsVinay Belgaumkar
2021-08-03drm/i915: Correct SFC_DONE register offsetMatt Roper
2021-08-02drm/i915: Correct SFC_DONE register offsetMatt Roper
2021-07-30drm/i915: rename/remove CNL registersLucas De Marchi
2021-07-30drm/i915: rename CNL references in intel_dram.cLucas De Marchi
2021-07-30drm/i915: remove explicit CNL handling from intel_pm.cLucas De Marchi
2021-07-30drm/i915: remove explicit CNL handling from i915_irq.cLucas De Marchi
2021-07-30drm/i915/display: rename CNL references in skl_scaler.cLucas De Marchi
2021-07-30drm/i915/display: remove explicit CNL handling from intel_display_power.cLucas De Marchi
2021-07-30drm/i915/display: remove explicit CNL handling from intel_dpll_mgr.cLucas De Marchi
2021-07-30drm/i915/display: remove explicit CNL handling from intel_cdclk.cLucas De Marchi
2021-07-29drm/i915/dg2: Update lane disable power state during PSRGwan-gyeong Mun
2021-07-29drm/i915/dg2: Wait for SNPS PHY calibration during display initMatt Roper
2021-07-29drm/i915/dg2: Add vswing programming for SNPS physMatt Roper
2021-07-29drm/i915/dg2: Add MPLLB programming for HDMIMatt Roper
2021-07-29drm/i915/dg2: Add MPLLB programming for SNPS PHYMatt Roper
2021-07-28drm/i915/adlp: Add workaround to disable CMTG clock gatingImre Deak
2021-07-27drm/i915/adl_p: Allow underrun recovery when possibleMatt Roper
2021-07-27drm/i915/guc: Provide mmio list to be saved/restored on engine resetJohn Harrison
2021-07-27drm/i915: Implement PSF GV point supportStanislav Lisovskiy
2021-07-27drm/i915: Extend QGV point restrict mask to 0x3Stanislav Lisovskiy
2021-07-26drm/i915/gt: nuke gen6_hw_idLucas De Marchi
2021-07-24drm/i915/xehp: Extra media engines - Part 3 (reset)John Harrison
2021-07-24drm/i915/xehp: Extra media engines - Part 2 (interrupts)John Harrison
2021-07-24drm/i915/xehp: Extra media engines - Part 1 (engine definitions)John Harrison
2021-07-23drm/i915: Program chicken bit during DP MST sequence on TGL+Matt Roper
2021-07-22drm/i915/gt: rename legacy engine->hw_id to engine->gen6_hw_idLucas De Marchi
2021-07-22drm/i915/guc: Implement GuC context operations for new intefaceMatthew Brost
2021-07-22drm/i915/xehp: Handle new device context ID formatStuart Summers
2021-07-22drm/i915: Fork DG1 interrupt handlerPaulo Zanoni
2021-07-20drm/i915/display/adl_p: Implement PSR changesJosé Roberto de Souza
2021-07-09drm/i915/dg1: Compute MEM Bandwidth using MCHBARClint Taylor
2021-07-06drm/i915/display/dg1: Correctly map DPLLs during state readoutJosé Roberto de Souza
2021-07-01drm/i915/display/dg1: Correctly map DPLLs during state readoutJosé Roberto de Souza
2021-07-01Merge drm/drm-next into drm-intel-nextJani Nikula
2021-06-24drm/i915/xelpd: Handle PSR2 SDP indication in the prior scanlineJosé Roberto de Souza
2021-06-24drm/i915/display/adl_p: Implement Wa_16011168373José Roberto de Souza
2021-06-24drm/i915/display/adl_p: Implement Wa_22012278275José Roberto de Souza
2021-06-21drm/i915/xelpd: Pipe A DMC pluggingAnusha Srivatsa
2021-06-16drm/i915/jsl: Add W/A 1409054076 for JSLTejas Upadhyay
generated by cgit (git 2.34.1) at 2025-04-14 01:34:22 +0000