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path: root/drivers/gpu/drm/i915/i915_reg.h
AgeCommit message (Expand)Author
2018-09-04drm/i915/icl: Fix context RPCS programmingTvrtko Ursulin
2018-08-28drm/i915/dsc: Fix PPS register definition macros for 2nd VDSC engineManasi Navare
2018-08-24drm/i915/icl: implement the tc/legacy HPD {dis,}connect flowsPaulo Zanoni
2018-08-22drm/i915: Rename PLANE_CTL_DECOMPRESSION_ENABLEDhinakaran Pandiyan
2018-08-20drm/i915/icl: Get DDI clock for ICL for MG PLL and TBT PLLManasi Navare
2018-08-20drm/i915/icl: Implement HSDIV_RATIO of MG_CLKTOP2_HSCLKCTL_PORT reg as separa...Manasi Navare
2018-08-16drm/i915: remove confusing GPIO vs PCH_GPIOLucas De Marchi
2018-08-16drm/i915: make PCH_GMBUS* definitions private to gvtLucas De Marchi
2018-08-14drm/i915: set DP Main Stream Attribute for color range on DDI platformsJani Nikula
2018-08-08drm/i915/icl: Add missing power gate enumsImre Deak
2018-08-08drm/i915: Use existing power well IDs where possibleImre Deak
2018-08-08drm/i915: Make power well ID names more uniformImre Deak
2018-08-08drm/i915: Remove redundant power well IDsImre Deak
2018-08-08drm/i915/ddi: Use power well CTL IDX instead of IDImre Deak
2018-08-08drm/i915/vlv: Use power well CTL IDX instead of IDImre Deak
2018-08-03drm/i915: Clear all residual RPS events on disabling interruptsChris Wilson
2018-08-01Revert "drm/i915/icl: WaEnableFloatBlendOptimization"Mika Kuoppala
2018-07-27drm/i915/icl: Set TBT IO in Aux transactionAnusha Srivatsa
2018-07-25drm/i915/icl: toggle PHY clock gating around link trainingPaulo Zanoni
2018-07-25drm/i915/icl: program MG_DP_MODEPaulo Zanoni
2018-07-25drm/i915/icl: Update FIA supported lane count for hpd.Animesh Manna
2018-07-25drm/i915/icl: implement icl_digital_port_connected()Paulo Zanoni
2018-07-24drm/i915/icl: Add remaining registers and bitfields for MG PHY DDIManasi Navare
2018-07-20drm/i915/dsc: Add missing _MMIO() from PPS registersAnusha Srivatsa
2018-07-18i915/dp/dsc: Add Rate Control Range Parameter RegistersAnusha Srivatsa
2018-07-18i915/dp/dsc: Add Rate Control Buffer Threshold RegistersAnusha Srivatsa
2018-07-18i915/dp/dsc: Add DSC PPS register definitionsAnusha Srivatsa
2018-07-18drm/i915/icl: Add VIDEO_DIP registersAnusha Srivatsa
2018-07-12drm/i915/gmbus: Enable burst readRamalingam C
2018-07-12drm/i915/gmbus: Increase the Bytes per Rd/Wr OpRamalingam C
2018-07-10drm/i915: use the ICL stolen memoryPaulo Zanoni
2018-07-06drm/i915/icl: Define AUX lane registers for Port A/BMadhav Chauhan
2018-07-06drm/i915/icl: Define PORT_CL_DW_10 registerMadhav Chauhan
2018-07-06drm/i915/icl: Define DSI mode ctl registerMadhav Chauhan
2018-07-06drm/i915/icl: Program DSI Escape clock DividerMadhav Chauhan
2018-07-05drm/i915/icl: Define register for DSI PLLMadhav Chauhan
2018-07-04drm/i915: Fix pre-ILK error interrupt ackVille Syrjälä
2018-07-02drm/i915/psr: Add psr1 live statusVathsala Nagaraju
2018-07-02drm/i915: abstract and document register picking macrosJani Nikula
2018-06-27drm/i915/icp: Add Interrupt SupportAnusha Srivatsa
2018-06-27drm/i915/icl: Add power well supportImre Deak
2018-06-26drm/i915/psr: Enable CRC check in the static frame on the sink sideJosé Roberto de Souza
2018-06-21drm/i915: Enable hw workaround to bypass alphaVandita Kulkarni
2018-06-21drm/i915/icl: Do read-modify-write as needed during MG PLL programmingImre Deak
2018-06-18drm/i915/icl: Handle hotplug interrupts for DP over TBTDhinakaran Pandiyan
2018-06-18drm/i915/icl: Support for TC North Display interruptsDhinakaran Pandiyan
2018-06-18drm/i915/icl: GSE interrupt moves from DE_MISC to GU_MISCDhinakaran Pandiyan
2018-06-18drm/i915/i915_reg.h: fix the checkpatch MACRO_ARG_PRECEDENCE issuesPaulo Zanoni
2018-06-18drm/i915/i915_reg.h: fix the checkpatch SPACE_BEFORE_TAB issuesPaulo Zanoni
2018-06-18drm/i915/i915_reg.h: fix the checkpatch SPACING issuesPaulo Zanoni
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