summaryrefslogtreecommitdiff
path: root/drivers/gpu/drm/i915/i915_reg.h
AgeCommit message (Expand)Author
2022-01-25drm/i915: Flush TLBs before releasing backing storeTvrtko Ursulin
2022-01-17drm/i915/display/adlp: Implement new step in the TC voltage swing prog sequenceJosé Roberto de Souza
2021-12-24Merge tag 'drm-intel-gt-next-2021-12-23' of git://anongit.freedesktop.org/drm...Dave Airlie
2021-12-21drm/i915/guc: Request RP0 before loading firmwareVinay Belgaumkar
2021-12-17Merge tag 'drm-intel-next-2021-12-14' of ssh://git.freedesktop.org/git/drm/dr...Dave Airlie
2021-12-10Merge tag 'drm-intel-gt-next-2021-12-09' of git://anongit.freedesktop.org/drm...Dave Airlie
2021-12-07drm/i915/display/dg2: Set CD clock squashing registersMika Kahola
2021-12-07drm/i915/snps: use div32 version of MPLLB word clock for UHBRJani Nikula
2021-12-03drm/i915: Rename PLANE_CUS_CTL Y plane bitsVille Syrjälä
2021-12-03drm/i915: Rename plane YUV order bitsVille Syrjälä
2021-12-03drm/i915: Get rid of the 64bit PLANE_CC_VAL mmioVille Syrjälä
2021-12-02drm/i915/dg2: Add Wa_14010547955Matt Roper
2021-11-24Revert "drm/i915/dg2: Tile 4 plane format support"Stanislav Lisovskiy
2021-11-23drm/i915/dg2: Tile 4 plane format supportStanislav Lisovskiy
2021-11-22Merge drm/drm-next into drm-intel-gt-nextTvrtko Ursulin
2021-11-19drm/i915: Clean up CRC register definesVille Syrjälä
2021-11-19drm/i915: Clean up DPINVGTT/VLV_DPFLIPSTAT bitsVille Syrjälä
2021-11-19drm/i915: Clean up FPGA_DBG/CLAIM_ER bitsVille Syrjälä
2021-11-17drm/i915/dsi/xelpd: Fix the bit mask for wakeup GBVandita Kulkarni
2021-11-15drm/i915/dsi/xelpd: Fix the bit mask for wakeup GBVandita Kulkarni
2021-11-11drm/i915/dg2: Program recommended HW settingsMatt Roper
2021-11-11drm/i915/dg2: Add initial gt/ctx/engine workaroundsMatt Roper
2021-11-11drm/i915/xehpsdv: Add initial workaroundsStuart Summers
2021-11-11drm/i915: Relocate FBC_LLC_READ_CTRLVille Syrjälä
2021-11-11drm/i915/fbc: Finish polishing FBC1 registersVille Syrjälä
2021-11-11drm/i915/fbc: Clean up all register definesVille Syrjälä
2021-11-11drm/i915/fbc: Nuke BDW_FBC_COMP_SEG_MASKVille Syrjälä
2021-11-02drm/i915/display: program audio CDCLK-TS for keepalivesKai Vehmanen
2021-10-29drm/i915/adlp: Implement workaround 16013190616José Roberto de Souza
2021-10-28drm/i915/pmu: Connect engine busyness stats from GuC to pmuUmesh Nerlige Ramappa
2021-10-26drm/i915/display: Wait PSR2 get out of deep sleep to update pipeJosé Roberto de Souza
2021-10-19drm/i915: Move LPT PCH readout codeVille Syrjälä
2021-10-18drm/i915: Don't propagate the gen split confusion furtherRodrigo Vivi
2021-10-14drm/i915: Remove memory frequency calculationJosé Roberto de Souza
2021-10-14drm/i915: Add all per-lane register definitions for icl combo phyVille Syrjälä
2021-10-14drm/i915: Remove dead DKL_TX_LOADGEN_SHARING_PMD_DISABLE stuffVille Syrjälä
2021-10-12Merge drm/drm-next into drm-intel-nextRodrigo Vivi
2021-10-11Merge tag 'drm-intel-gt-next-2021-10-08' of git://anongit.freedesktop.org/drm...Dave Airlie
2021-10-04drm/i915: Extend the async flip VT-d w/a to skl/bxtVille Syrjälä
2021-10-04drm/i915/pxp: black pixels on pxp disabledAnshuman Gupta
2021-10-04drm/i915/pxp: Add plane decryption supportAnshuman Gupta
2021-10-04drm/i915/pxp: Implement PXP irq handlerHuang, Sean Z
2021-10-04drm/i915/reg: add AUD_TCA_DP_2DOT0_CTRL registersJani Nikula
2021-09-29drm/i915/gen11: Disable cursor clock gating in HDR modeTejas Upadhyay
2021-09-24drm/i915/fbc: Align FBC segments to 512B on glk+Ville Syrjälä
2021-09-20drm/i915/xehp: Check new fuse bits for SFC availabilityMatt Roper
2021-09-20drm/i915/dg2: add DG2+ TRANS_DDI_FUNC_CTL DP 2.0 128b/132b modeJani Nikula
2021-09-17drm/i915/display/adlp: Add new PSR2 workaroundsJosé Roberto de Souza
2021-09-15Merge drm/drm-next into drm-intel-gt-nextJoonas Lahtinen
2021-09-03drm/i915/gt: Set BLIT_CCTL reg to un-cachedAyaz A Siddiqui
generated by cgit (git 2.34.1) at 2025-05-07 13:07:12 +0000