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path: root/drivers/gpu/drm/i915/i915_reg.h
AgeCommit message (Expand)Author
2022-02-02drm/i915: Move [more] GT registers to their own header fileMatt Roper
2022-02-02drm/i915: Only include i915_reg.h from .c filesMatt Roper
2022-02-02drm/i915: Move GT registers to their own header fileMatt Roper
2022-02-02drm/i915: Parameterize MI_PREDICATE registersMatt Roper
2022-02-02drm/i915: Parameterize R_PWR_CLK_STATE register definitionMatt Roper
2022-02-02drm/i915/perf: Move OA regs to their own headerMatt Roper
2022-02-02drm/i915: remove VGA register definitionsJani Nikula
2022-01-31Merge drm/drm-next into drm-intel-nextRodrigo Vivi
2022-01-28drm/i915: Clean up M/N register definesVille Syrjälä
2022-01-26drm/i915: Clean up PIPESRC definesVille Syrjälä
2022-01-26drm/i915: Clean up PCH_TRANSCONF/TRANS_DP_CTL bit definesVille Syrjälä
2022-01-26drm/i915: Clean up PIPECONF bit definesVille Syrjälä
2022-01-26drm/i915: Clean up SKL_BOTTOM_COLOR definesVille Syrjälä
2022-01-26drm/i915: Clean up PIPEMISC register definesVille Syrjälä
2022-01-26drm/i915: Bump DSL linemask to 20 bitsVille Syrjälä
2022-01-25drm/i915: Flush TLBs before releasing backing storeTvrtko Ursulin
2022-01-24drm/i915: Clean up pre-skl primary plane registersVille Syrjälä
2022-01-20drm/i915: Clean up vlv/chv sprite plane registersVille Syrjälä
2022-01-18drm/i915: Clean up cursor registersVille Syrjälä
2022-01-18drm/i915: Clean up g4x+ sprite plane registersVille Syrjälä
2022-01-18drm/i915: Clean up ivb+ sprite plane registersVille Syrjälä
2022-01-18drm/i915: Use REG_BIT() & co. for universal plane bitsVille Syrjälä
2022-01-18drm/i915: Sipmplify PLANE_STRIDE maskingVille Syrjälä
2022-01-17drm/i915/display/adlp: Implement new step in the TC voltage swing prog sequenceJosé Roberto de Souza
2022-01-13drm/i915/display/adlp: Implement new step in the TC voltage swing prog sequenceJosé Roberto de Souza
2022-01-11drm/i915: Move TC PHY registers to their own headerMatt Roper
2022-01-11drm/i915: Move combo PHY registers to their own headerMatt Roper
2022-01-11drm/i915: Move SNPS PHY registers to their own headerMatt Roper
2022-01-11drm/i915/gt: Move engine registers to their own headerMatt Roper
2022-01-11drm/i915: Introduce i915_reg_defs.hMatt Roper
2022-01-11drm/i915: Replace GFX_MODE_GEN7 with RING_MODE_GEN7Matt Roper
2022-01-11drm/i915: Use RING_PSMI_CTL rather than per-engine macrosMatt Roper
2022-01-11drm/i915: Parameterize ECOSKPDMatt Roper
2022-01-11drm/i915: Parameterize PWRCTX_MAXCNTMatt Roper
2022-01-11drm/i915: Use parameterized GPR register definitions everywhereMatt Roper
2022-01-10drm/i915: split out vlv sideband registers from i915_reg.hJani Nikula
2022-01-10drm/i915: split out PCI config space registers from i915_reg.hJani Nikula
2021-12-24Merge tag 'drm-intel-gt-next-2021-12-23' of git://anongit.freedesktop.org/drm...Dave Airlie
2021-12-21drm/i915/guc: Request RP0 before loading firmwareVinay Belgaumkar
2021-12-17Merge tag 'drm-intel-next-2021-12-14' of ssh://git.freedesktop.org/git/drm/dr...Dave Airlie
2021-12-16drm/i915/dg1: Read OPROM via SPI controllerClint Taylor
2021-12-15drm/i915/fbc: Parametrize FBC register offsetsVille Syrjälä
2021-12-10Merge tag 'drm-intel-gt-next-2021-12-09' of git://anongit.freedesktop.org/drm...Dave Airlie
2021-12-07drm/i915/display/dg2: Set CD clock squashing registersMika Kahola
2021-12-07drm/i915/snps: use div32 version of MPLLB word clock for UHBRJani Nikula
2021-12-03drm/i915: Rename PLANE_CUS_CTL Y plane bitsVille Syrjälä
2021-12-03drm/i915: Rename plane YUV order bitsVille Syrjälä
2021-12-03drm/i915: Get rid of the 64bit PLANE_CC_VAL mmioVille Syrjälä
2021-12-02drm/i915/dg2: Add Wa_14010547955Matt Roper
2021-11-24Revert "drm/i915/dg2: Tile 4 plane format support"Stanislav Lisovskiy
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