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path: root/drivers/gpu/drm/i915/i915_reg.h
AgeCommit message (Expand)Author
2022-04-26drm/i915: Fix SEL_FETCH_PLANE_*(PIPE_B+) register addressesImre Deak
2022-04-25drm/i915: Fix DISP_POS_Y and DISP_HEIGHT definesHans de Goede
2022-03-24Merge tag 'drm-next-2022-03-24' of git://anongit.freedesktop.org/drm/drmLinus Torvalds
2022-03-07drm/i915/psr: Set "SF Partial Frame Enable" also on full updateJouni Högander
2022-03-02drm/i915/xehp: Define compute class and engineMatt Roper
2022-02-25Merge drm/drm-next into drm-intel-gt-nextTvrtko Ursulin
2022-02-23Merge tag 'drm-intel-gt-next-2022-02-17' of git://anongit.freedesktop.org/drm...Rodrigo Vivi
2022-02-23drm/i915/tgl: Simply subplatform detectionJosé Roberto de Souza
2022-02-21drm/i915/adlp: Add TypeC PHY TBT->DP-alt/legacy mode switch workaroundImre Deak
2022-02-21drm/i915/reg: split out icl_dsi_regs.hJani Nikula
2022-02-21drm/i915/reg: split out vlv_dsi_regs.h and vlv_dsi_pll_regs.hJani Nikula
2022-02-21drm/i915/dsi: add separate init timer mask definition for ICL DSIJani Nikula
2022-02-19drm/i915/lmem: Enable lmem for platforms with Flat CCSAbdiel Janulgue
2022-02-18drm/i915/dg2: Enable 5th portMatt Roper
2022-02-18drm/i915: Fix for PHY_MISC_TC1 offsetJouni Högander
2022-02-18drm/i915/display: Implement Wa_16013835468José Roberto de Souza
2022-02-18drm/i915/display/tgl+: Implement new PLL programming stepJosé Roberto de Souza
2022-02-18drm/i915: Polish ilk+ wm register bitsVille Syrjälä
2022-02-18drm/i915: Clean up SSKPD/MLTR definesVille Syrjälä
2022-02-16drm/i915: Move MCHBAR registers to their own headerMatt Roper
2022-02-16drm/i915: Define MCH registers relative to MCHBAR_MIRROR_BASEMatt Roper
2022-02-14drm/i915/dg1: Update DMC_DEBUG3 registerChuansheng Liu
2022-02-11drm/i915/dg2: Add Wa_22011450934Ramalingam C
2022-02-03Merge drm/drm-next into drm-intel-gt-nextJoonas Lahtinen
2022-02-02drm/i915: Move [more] GT registers to their own header fileMatt Roper
2022-02-02drm/i915: Only include i915_reg.h from .c filesMatt Roper
2022-02-02drm/i915: Move GT registers to their own header fileMatt Roper
2022-02-02drm/i915: Parameterize MI_PREDICATE registersMatt Roper
2022-02-02drm/i915: Parameterize R_PWR_CLK_STATE register definitionMatt Roper
2022-02-02drm/i915/perf: Move OA regs to their own headerMatt Roper
2022-02-02drm/i915: remove VGA register definitionsJani Nikula
2022-01-31Merge drm/drm-next into drm-intel-nextRodrigo Vivi
2022-01-31drm/i915/pmu: Use PM timestamp instead of RING TIMESTAMP for referenceUmesh Nerlige Ramappa
2022-01-28drm/i915/dg2: Add Wa_14015227452Matt Roper
2022-01-28drm/i915: Clean up M/N register definesVille Syrjälä
2022-01-26drm/i915: Clean up PIPESRC definesVille Syrjälä
2022-01-26drm/i915: Clean up PCH_TRANSCONF/TRANS_DP_CTL bit definesVille Syrjälä
2022-01-26drm/i915: Clean up PIPECONF bit definesVille Syrjälä
2022-01-26drm/i915: Clean up SKL_BOTTOM_COLOR definesVille Syrjälä
2022-01-26drm/i915: Clean up PIPEMISC register definesVille Syrjälä
2022-01-26drm/i915: Bump DSL linemask to 20 bitsVille Syrjälä
2022-01-25drm/i915/pmu: Use PM timestamp instead of RING TIMESTAMP for referenceUmesh Nerlige Ramappa
2022-01-25drm/i915: Flush TLBs before releasing backing storeTvrtko Ursulin
2022-01-24drm/i915/dg2: Add Wa_18018781329Matt Roper
2022-01-24drm/i915: Clean up pre-skl primary plane registersVille Syrjälä
2022-01-20drm/i915: Clean up vlv/chv sprite plane registersVille Syrjälä
2022-01-18drm/i915: Clean up cursor registersVille Syrjälä
2022-01-18drm/i915: Clean up g4x+ sprite plane registersVille Syrjälä
2022-01-18drm/i915: Clean up ivb+ sprite plane registersVille Syrjälä
2022-01-18drm/i915: Use REG_BIT() & co. for universal plane bitsVille Syrjälä
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