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path: root/drivers/gpu/drm/i915/intel_pm.c
AgeCommit message (Expand)Author
2013-12-13drm/i915: get a PC8 reference when enabling the power wellPaulo Zanoni
2013-12-12Merge tag 'drm-intel-fixes-2013-12-11' of git://people.freedesktop.org/~danve...Dave Airlie
2013-12-12Merge branch 'bdw-fixes' of git://people.freedesktop.org/~danvet/drm-intel in...Dave Airlie
2013-12-06drm/i915: fix pm init orderingDaniel Vetter
2013-11-27drm/i915: use crtc_htotal in watermark calculations to match fastboot v2Jesse Barnes
2013-11-20drm/i915: Fix gen3 self-refresh watermarksDaniel Vetter
2013-11-16Partially revert "drm/i915: tune the RC6 threshold for stability"Daniel Vetter
2013-11-14drm/i915/bdw: PIPE_[BC] I[ME]R moved to powerwellBen Widawsky
2013-11-08drm/i915/bdw: WaSingleSubspanDispatchOnAALinesAndPointsBen Widawsky
2013-11-08drm/i915/bdw: conservative SBE VUE cache modeBen Widawsky
2013-11-08drm/i915/bdw: Limit SDE poly depth FIFO to 2Ben Widawsky
2013-11-08drm/i915/bdw: Sampler power bypass disableBen Widawsky
2013-11-08ddrm/i915/bdw: Disable centroid pixel perf optimizationBen Widawsky
2013-11-08drm/i915/bdw: BWGTLB clock gate disableBen Widawsky
2013-11-08drm/i915/bdw: Implement edp PSR workaroundsBen Widawsky
2013-11-08drm/i915/bdw: Create a separate BDW rps enableBen Widawsky
2013-11-08drm/i915/bdw: Use HSW formula for ring freq scalingBen Widawsky
2013-11-08drm/i915/bdw: Add Broadwell display FIFO limitsVille Syrjälä
2013-11-08drm/i915/bdw: Implement WaSwitchSolVfFArbitrationPriorityBen Widawsky
2013-11-08drm/i915/bdw: Broadwell also has the "power down well"Paulo Zanoni
2013-11-08drm/i915/bdw: Clock gating initBen Widawsky
2013-11-04Merge tag 'v3.12' into drm-intel-nextDaniel Vetter
2013-10-31drm/i915: add back checking for i915_disable_power_wellImre Deak
2013-10-29drm/i915: rename i915_init_power_well to init_power_domains_initImre Deak
2013-10-27drm/i915: remove device field from struct power_wellImre Deak
2013-10-27drm/i915: use power get/put instead of set for power on after initImre Deak
2013-10-27drm/i915: prepare for multiple power wellsImre Deak
2013-10-27drm/i915: Remove WaFbcDisableDpfcClockGating on HSWBen Widawsky
2013-10-27drm/i915: Remove WaFbcDisableDpfcClockGating on IVBBen Widawsky
2013-10-27drm/i915: Convert straggling MCHBAR registersBen Widawsky
2013-10-21drm/i915: change power_well->lock to be mutexImre Deak
2013-10-21drm/i915: factor out is_always_on_domainImre Deak
2013-10-21drm/i915: Print RC6 info less oftenBen Widawsky
2013-10-15drm/i915: Check 5/6 DDB split only when sprites are enabledVille Syrjälä
2013-10-15drm/i915: Rename ilk_check_wm to ilk_validate_wm_levelVille Syrjälä
2013-10-15drm/i915: Rename ilk_wm_max to ilk_compute_wm_maximumsVille Syrjälä
2013-10-15drm/i915: Remove a somewhat silly debug print from watermark codeVille Syrjälä
2013-10-15drm/i915: Init HSW watermark tracking in intel_modeset_setup_hw_state()Ville Syrjälä
2013-10-15drm/i915: Improve watermark dirtyness checksVille Syrjälä
2013-10-15drm/i915: Store current watermark state in dev_priv->wmVille Syrjälä
2013-10-15drm/i915: Kill fbc_wm_enabled from intel_wm_configVille Syrjälä
2013-10-15drm/i915: Refactor wm_lp to level calculationVille Syrjälä
2013-10-15drm/i915: Check 5/6 DDB split only when sprites are enabledVille Syrjälä
2013-10-15drm/i915: Move some computations out from hsw_compute_wm_parameters()Ville Syrjälä
2013-10-15drm/i915: Use intel_pipe_wm in hsw_find_best_resultsVille Syrjälä
2013-10-15drm/i915: Move LP1+ watermark merging out from hsw_compute_wm_results()Ville Syrjälä
2013-10-15drm/i915: Don't re-compute pipe watermarks except for the affected pipeVille Syrjälä
2013-10-15drm/i915: Add intel_pipe_wm and prepare for watermark pre-computeVille Syrjälä
2013-10-15drm/i915: disable LVDS clock gating on CPT v2Jesse Barnes
2013-10-10drm/i915: Avoid tweaking RPS before it is enabledChris Wilson
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