summaryrefslogtreecommitdiff
path: root/drivers/gpu/drm/msm
AgeCommit message (Collapse)Author
2023-06-15drm/msm/dsi: Use MSM and DRM DSC helper methodsJessica Zhang
Use MSM and DRM DSC helper methods to configure DSC for DSI. Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Reviewed-by: Marijn Suijten <marijn.suijten@somainline.org> Signed-off-by: Jessica Zhang <quic_jesszhan@quicinc.com> Patchwork: https://patchwork.freedesktop.org/patch/539274/ Link: https://lore.kernel.org/r/20230329-rfc-msm-dsc-helper-v14-8-bafc7be95691@quicinc.com Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
2023-06-15drm/msm/dpu: Fix slice_last_group_size calculationJessica Zhang
Correct the math for slice_last_group_size so that it matches the calculations downstream. Fixes: c110cfd1753e ("drm/msm/disp/dpu1: Add support for DSC") Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Reviewed-by: Marijn Suijten <marijn.suijten@somainline.org> Signed-off-by: Jessica Zhang <quic_jesszhan@quicinc.com> Patchwork: https://patchwork.freedesktop.org/patch/539269/ Link: https://lore.kernel.org/r/20230329-rfc-msm-dsc-helper-v14-7-bafc7be95691@quicinc.com Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
2023-06-15drm/msm/dpu: Use fixed DRM DSC helper for det_thresh_flatnessJessica Zhang
The current dpu_hw_dsc calculation for det_thresh_flatness does not match the downstream calculation or the DSC spec. Use the DRM DSC helper for det_thresh_flatness to match downstream implementation and the DSC spec. Fixes: c110cfd1753e ("drm/msm/disp/dpu1: Add support for DSC") Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Reviewed-by: Marijn Suijten <marijn.suijten@somainline.org> Signed-off-by: Jessica Zhang <quic_jesszhan@quicinc.com> Patchwork: https://patchwork.freedesktop.org/patch/539275/ Link: https://lore.kernel.org/r/20230329-rfc-msm-dsc-helper-v14-6-bafc7be95691@quicinc.com Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
2023-06-15drm/msm: Add MSM-specific DSC helper methodsJessica Zhang
Introduce MSM-specific DSC helper methods, as some calculations are common between DP and DSC. Reviewed-by: Marijn Suijten <marijn.suijten@somainline.org> Signed-off-by: Jessica Zhang <quic_jesszhan@quicinc.com> Patchwork: https://patchwork.freedesktop.org/patch/539272/ Link: https://lore.kernel.org/r/20230329-rfc-msm-dsc-helper-v14-5-bafc7be95691@quicinc.com Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
2023-06-15drm/msm/dsi: use DRM DSC helpers for DSC setupDmitry Baryshkov
Use new DRM DSC helpers to setup DSI DSC configuration. The initial_scale_value needs to be adjusted according to the standard, but this is a separate change. Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Reviewed-by: Abhinav Kumar <quic_abhinavk@quicinc.com> Reviewed-by: Marijn Suijten <marijn.suijten@somainline.org> Signed-off-by: Jessica Zhang <quic_jesszhan@quicinc.com> Patchwork: https://patchwork.freedesktop.org/patch/539276/ Link: https://lore.kernel.org/r/20230329-rfc-msm-dsc-helper-v14-4-bafc7be95691@quicinc.com Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
2023-06-15drm/msm/dpu/catalog: define DSPP blocks found on sdm845Dmitry Baryshkov
Add definitions of DSPP blocks present on the sdm845 platform. This should enable color-management on sdm845-bassed devices. Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Reviewed-by: Abhinav Kumar <quic_abhinavk@quicinc.com> Reviewed-by: Marijn Suijten <marijn.suijten@somainline.org> Reviewed-by: Sumit Semwal <sumit.semwal@linaro.org> Patchwork: https://patchwork.freedesktop.org/patch/542142/ Link: https://lore.kernel.org/r/20230612182534.3345805-2-dmitry.baryshkov@linaro.org
2023-06-15drm/msm/dpu: do not enable color-management if DSPPs are not availableDmitry Baryshkov
We can not support color management without DSPP blocks being provided in the HW catalog. Do not enable color management for CRTCs if num_dspps is 0. Fixes: 4259ff7ae509 ("drm/msm/dpu: add support for pcc color block in dpu driver") Reported-by: Yongqin Liu <yongqin.liu@linaro.org> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Reviewed-by: Abhinav Kumar <quic_abhinavk@quicinc.com> Reviewed-by: Marijn Suijten <marijn.suijten@somainline.org> Reviewed-by: Sumit Semwal <sumit.semwal@linaro.org> Tested-by: Yongqin Liu <yongqin.liu@linaro.org> Patchwork: https://patchwork.freedesktop.org/patch/542141/ Link: https://lore.kernel.org/r/20230612182534.3345805-1-dmitry.baryshkov@linaro.org
2023-06-15drm/msm/adreno: make adreno_is_a690()'s argument constDmitry Baryshkov
Change adreno_is_a690() prototype to accept the const struct adreno_gpu pointer instead of a non-const one. This fixes the following warning: In file included from drivers/gpu/drm/msm/msm_drv.c:33: drivers/gpu/drm/msm/adreno/adreno_gpu.h: In function ‘adreno_is_a660_family’: drivers/gpu/drm/msm/adreno/adreno_gpu.h:303:54: warning: passing argument 1 of ‘adreno_is_a690’ discards ‘const’ qualifier from pointer target type [-Wdiscarded-qualifiers] 303 | return adreno_is_a660(gpu) || adreno_is_a690(gpu) || adreno_is_7c3(gpu); Fixes: 1b90e8f8879c ("drm/msm/adreno: change adreno_is_* functions to accept const argument") Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Reviewed-by: Rob Clark <robdclark@gmail.com> Reviewed-by: Douglas Anderson <dianders@chromium.org> Patchwork: https://patchwork.freedesktop.org/patch/542138/ Link: https://lore.kernel.org/r/20230612182527.3345786-1-dmitry.baryshkov@linaro.org
2023-06-13Merge branch 'drm-next' of git://anongit.freedesktop.org/drm/drm into ↵Dmitry Baryshkov
msm-next-lumag-base Merge the drm-next tree to pick up the DRM DSC helpers (merged via drm-intel-next tree). MSM DSC v1.2 patches depend on these helpers. Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
2023-06-10drm/msm/adreno: change adreno_is_* functions to accept const argumentDmitry Baryshkov
All adreno_is_*() functions do not modify their argument in any way, so they can be changed to accept const struct adreno_gpu pointer. Suggested-by: Stephen Boyd <swboyd@chromium.org> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Reviewed-by: Stephen Boyd <swboyd@chromium.org> Patchwork: https://patchwork.freedesktop.org/patch/531706/ Signed-off-by: Rob Clark <robdclark@chromium.org>
2023-06-10drm/msm/adreno: warn if chip revn is verified before being setDmitry Baryshkov
The commit 010c8bbad2cb ("drm: msm: adreno: Disable preemption on Adreno 510") tried to check GPU's revn before revn being set. Add WARN_ON_ONCE to prevent such bugs from happening again. A separate helper is necessary so that the warning is displayed really just once instead of being displayed for each of comparisons. Suggested-by: Stephen Boyd <swboyd@chromium.org> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Reviewed-by: Stephen Boyd <swboyd@chromium.org> Patchwork: https://patchwork.freedesktop.org/patch/531705/ Signed-off-by: Rob Clark <robdclark@chromium.org>
2023-06-10drm/msm/a5xx: really check for A510 in a5xx_gpu_initDmitry Baryshkov
The commit 010c8bbad2cb ("drm: msm: adreno: Disable preemption on Adreno 510") added special handling for a510 (this SKU doesn't seem to support preemption, so the driver should clamp nr_rings to 1). However the gpu->revn is not yet set (it is set later, in adreno_gpu_init()) and thus the condition is always false. Check config->rev instead. Fixes: 010c8bbad2cb ("drm: msm: adreno: Disable preemption on Adreno 510") Reported-by: Adam Skladowski <a39.skl@gmail.com> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Tested-by: Adam Skladowski <a39.skl@gmail.com> Patchwork: https://patchwork.freedesktop.org/patch/531511/ Signed-off-by: Rob Clark <robdclark@chromium.org>
2023-06-10drm/msm/a6xx: Fix a690 CP_PROTECT settingsRob Clark
Allow access to CP_PERFCTR_CP_SEL[n] and RB_PERFCTR_RB_SEL which are used by fdperf and pps-provider (perfetto). Signed-off-by: Rob Clark <robdclark@chromium.org>
2023-06-10drm/msm/adreno: Add Adreno A690 supportBjorn Andersson
Introduce support for the Adreno A690, found in Qualcomm SC8280XP. Tested-by: Steev Klimaszewski <steev@kali.org> Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Signed-off-by: Bjorn Andersson <quic_bjorande@quicinc.com> Patchwork: https://patchwork.freedesktop.org/patch/540335/ Signed-off-by: Rob Clark <robdclark@chromium.org>
2023-06-10drm/msm: Move cmdstream dumping out of sched kthreadRob Clark
This is something that can block for arbitrary amounts of time as userspace consumes from the FIFO. So we don't really want this to be in the fence signaling path. Signed-off-by: Rob Clark <robdclark@chromium.org> Patchwork: https://patchwork.freedesktop.org/patch/532617/
2023-06-10drm/msm/a6xx: don't set IO_PGTABLE_QUIRK_ARM_OUTER_WBWA with coherent SMMUDmitry Baryshkov
If the Adreno SMMU is dma-coherent, allocation will fail unless we disable IO_PGTABLE_QUIRK_ARM_OUTER_WBWA. Skip setting this quirk for the coherent SMMUs (like we have on sm8350 platform). Fixes: 54af0ceb7595 ("arm64: dts: qcom: sm8350: add GPU, GMU, GPU CC and SMMU nodes") Reported-by: David Heidelberg <david@ixit.cz> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Tested-by: David Heidelberg <david@ixit.cz> Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Tested-by: Konrad Dybcio <konrad.dybcio@linaro.org> # SM8450 HDK Patchwork: https://patchwork.freedesktop.org/patch/531562/ Signed-off-by: Rob Clark <robdclark@chromium.org>
2023-06-10drm/msm: drop unused ring variable in msm_ioctl_gem_submit()Dmitry Baryshkov
The variable ring is not used by msm_parse_deps() and msm_ioctl_gem_submit() and thus can be dropped. Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Patchwork: https://patchwork.freedesktop.org/patch/529340/ Signed-off-by: Rob Clark <robdclark@chromium.org>
2023-06-10drm/msm/adreno: fix sparse warnings in a6xx codeDmitry Baryshkov
Sparse reports plenty of warnings against the a6xx code because of a6xx_gmu::mmio and a6xx_gmu::rscc members. For some reason they were defined as __iomem pointers rather than pointers to __iomem memory. Correct the __iomem attribute. Fixes: 02ef80c54e7c ("drm/msm/a6xx: update pdc/rscc GMU registers for A640/A650") Reported-by: kernel test robot <lkp@intel.com> Link: https://lore.kernel.org/oe-kbuild-all/202304070550.NrbhJCvP-lkp@intel.com/ Reviewed-by: Javier Martinez Canillas <javierm@redhat.com> Reviewed-by: Stephen Boyd <swboyd@chromium.org> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Patchwork: https://patchwork.freedesktop.org/patch/531583/ Signed-off-by: Rob Clark <robdclark@chromium.org>
2023-06-10Merge branches 'msm-next-lumag-core', 'msm-next-lumag-dpu', ↵Dmitry Baryshkov
'msm-next-lumag-dp', 'msm-next-lumag-dsi' and 'msm-next-lumag-mdp5' into msm-next-lumag Core: - Add Marijn Suijten as drm/msm reviewer - Adreno A660 bindings - SM8350 MDSS bindings fix DP: - Removed obsolete USB-PD remains - Documented DP compatible string for sm8550 platform DPU: - Added support for DPU on sm6350 and sm6375 platforms - Implemented tearcheck support to support vsync on SM150 and newer platforms - Enabled missing features (DSPP, DSC, split display) on sc8180x, sc8280xp, sm8450 - Enabled writeback on sc7280 - Enabled DSC on msm8998 - Native HDMI output support - Dropped unused features: regdma, GC, IGC - Fixed the DSC flush operations - Simplified QoS handling, removing obsolete and unused features and merging SSPP and WB code paths - Reworked dpu_encoder initialisation path DSI: - Added support for DSI and 28nm DSI PHY on MSM8226 platform - Added support for DSI on sm6350 and sm6375 platforms - Dropped powerup quirks in favour of using pre_enable_prev_first for downstream bridges - Fixed 14nm DSI PHY programming MDP5: - Added support for display controller on MSM8226 platform Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
2023-06-08drm/msm/a6xx: initialize GMU mutex earlierDmitry Baryshkov
Move GMU mutex initialization earlier to make sure that it is always initialized. a6xx_destroy can be called from ther failure path before GMU initialization. This fixes the following backtrace: ------------[ cut here ]------------ DEBUG_LOCKS_WARN_ON(lock->magic != lock) WARNING: CPU: 0 PID: 58 at kernel/locking/mutex.c:582 __mutex_lock+0x1ec/0x3d0 Modules linked in: CPU: 0 PID: 58 Comm: kworker/u16:1 Not tainted 6.3.0-rc5-00155-g187c06436519 #565 Hardware name: Qualcomm Technologies, Inc. SM8350 HDK (DT) Workqueue: events_unbound deferred_probe_work_func pstate: 60400005 (nZCv daif +PAN -UAO -TCO -DIT -SSBS BTYPE=--) pc : __mutex_lock+0x1ec/0x3d0 lr : __mutex_lock+0x1ec/0x3d0 sp : ffff800008993620 x29: ffff800008993620 x28: 0000000000000002 x27: ffff47b253c52800 x26: 0000000001000606 x25: ffff47b240bb2810 x24: fffffffffffffff4 x23: 0000000000000000 x22: ffffc38bba15ac14 x21: 0000000000000002 x20: ffff800008993690 x19: ffff47b2430cc668 x18: fffffffffffe98f0 x17: 6f74616c75676572 x16: 20796d6d75642067 x15: 0000000000000038 x14: 0000000000000000 x13: ffffc38bbba050b8 x12: 0000000000000666 x11: 0000000000000222 x10: ffffc38bbba603e8 x9 : ffffc38bbba050b8 x8 : 00000000ffffefff x7 : ffffc38bbba5d0b8 x6 : 0000000000000222 x5 : 000000000000bff4 x4 : 40000000fffff222 x3 : 0000000000000000 x2 : 0000000000000000 x1 : 0000000000000000 x0 : ffff47b240cb1880 Call trace: __mutex_lock+0x1ec/0x3d0 mutex_lock_nested+0x2c/0x38 a6xx_destroy+0xa0/0x138 a6xx_gpu_init+0x41c/0x618 adreno_bind+0x188/0x290 component_bind_all+0x118/0x248 msm_drm_bind+0x1c0/0x670 try_to_bring_up_aggregate_device+0x164/0x1d0 __component_add+0xa8/0x16c component_add+0x14/0x20 dsi_dev_attach+0x20/0x2c dsi_host_attach+0x9c/0x144 devm_mipi_dsi_attach+0x34/0xac lt9611uxc_attach_dsi.isra.0+0x84/0xfc lt9611uxc_probe+0x5b8/0x67c i2c_device_probe+0x1ac/0x358 really_probe+0x148/0x2ac __driver_probe_device+0x78/0xe0 driver_probe_device+0x3c/0x160 __device_attach_driver+0xb8/0x138 bus_for_each_drv+0x84/0xe0 __device_attach+0x9c/0x188 device_initial_probe+0x14/0x20 bus_probe_device+0xac/0xb0 deferred_probe_work_func+0x8c/0xc8 process_one_work+0x2bc/0x594 worker_thread+0x228/0x438 kthread+0x108/0x10c ret_from_fork+0x10/0x20 irq event stamp: 299345 hardirqs last enabled at (299345): [<ffffc38bb9ba61e4>] put_cpu_partial+0x1c8/0x22c hardirqs last disabled at (299344): [<ffffc38bb9ba61dc>] put_cpu_partial+0x1c0/0x22c softirqs last enabled at (296752): [<ffffc38bb9890434>] _stext+0x434/0x4e8 softirqs last disabled at (296741): [<ffffc38bb989669c>] ____do_softirq+0x10/0x1c ---[ end trace 0000000000000000 ]--- Fixes: 4cd15a3e8b36 ("drm/msm/a6xx: Make GPU destroy a bit safer") Cc: Douglas Anderson <dianders@chromium.org> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Reviewed-by: Douglas Anderson <dianders@chromium.org> Patchwork: https://patchwork.freedesktop.org/patch/531540/ Signed-off-by: Rob Clark <robdclark@chromium.org>
2023-06-08drm/msm/dp: enable HDP plugin/unplugged interrupts at hpd_enable/disableKuogee Hsieh
The internal_hpd flag is set to true by dp_bridge_hpd_enable() and set to false by dp_bridge_hpd_disable() to handle GPIO pinmuxed into DP controller case. HDP related interrupts can not be enabled until internal_hpd is set to true. At current implementation dp_display_config_hpd() will initialize DP host controller first followed by enabling HDP related interrupts if internal_hpd was true at that time. Enable HDP related interrupts depends on internal_hpd status may leave system with DP driver host is in running state but without HDP related interrupts being enabled. This will prevent external display from being detected. Eliminated this dependency by moving HDP related interrupts enable/disable be done at dp_bridge_hpd_enable/disable() directly regardless of internal_hpd status. Changes in V3: -- dp_catalog_ctrl_hpd_enable() and dp_catalog_ctrl_hpd_disable() -- rewording ocmmit text Changes in V4: -- replace dp_display_config_hpd() with dp_display_host_start() -- move enable_irq() at dp_display_host_start(); Changes in V5: -- replace dp_display_host_start() with dp_display_host_init() Changes in V6: -- squash remove enable_irq() and disable_irq() Fixes: cd198caddea7 ("drm/msm/dp: Rely on hpd_enable/disable callbacks") Signed-off-by: Kuogee Hsieh <quic_khsieh@quicinc.com> Tested-by: Leonard Lausen <leonard@lausen.nl> # on sc7180 lazor Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Reviewed-by: Bjorn Andersson <andersson@kernel.org> Tested-by: Bjorn Andersson <andersson@kernel.org> Reviewed-by: Abhinav Kumar <quic_abhinavk@quicinc.com> Link: https://lore.kernel.org/r/1684878756-17830-1-git-send-email-quic_khsieh@quicinc.com Signed-off-by: Rob Clark <robdclark@chromium.org>
2023-06-08drm/msm/dpu: tidy up some error checkingDan Carpenter
The "vsync_hz" variable is unsigned int so it can't be less than zero. The dpu_kms_get_clk_rate() function used to return a u64 but I previously changed it to return an unsigned long and zero on error so it matches clk_get_rate(). Change the "vsync_hz" type to unsigned long as well and change the error checking to check for zero instead of negatives. This change does not affect runtime at all. It's just a clean up. Signed-off-by: Dan Carpenter <dan.carpenter@linaro.org> Reviewed-by: Abhinav Kumar <quic_abhinavk@quicinc.com> Reviewed-by: Marijn Suijten <marijn.suijten@somainline.org> Patchwork: https://patchwork.freedesktop.org/patch/541225/ Link: https://lore.kernel.org/r/ZH7vP2Swu8CYpgUL@moroto [DB: fixed debug message] Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
2023-06-08drm/msm/dpu: add DSC blocks to the catalog of MSM8998Abhinav Kumar
MSM8998 doesn't have DSC blocks declared in the catalog. Complete DSC 1.1 support for all platforms by adding the missing blocks to MSM8998. Changes in v9: -- add MSM8998 and SC8180x to commit title Changes in v10: -- fix grammar at commit text Changes in v12: -- fix "titil" with "title" at changes in v9 Changes in v14: -- "dsc" tp "DSC" at commit title Changes in v15: -- fix merge conflicts at dpu_5_1_sc8180x.h Changes in v16 -- fix cherry-pick error by deleting both redundant .dsc and .dsc_count assignment from dpu_5_1_sc8180x.h Changes in v17 -- remove sc8180x from both commit title and text -- remove Reviewed-by Signed-off-by: Abhinav Kumar <quic_abhinavk@quicinc.com> Reviewed-by: Marijn Suijten <marijn.suijten@somainline.org> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Patchwork: https://patchwork.freedesktop.org/patch/541371/ Link: https://lore.kernel.org/r/1686082272-22191-1-git-send-email-quic_khsieh@quicinc.com [DB: fixed commit message as agreed in the email discussion] Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
2023-06-08drm/msm: mdss: Add SM6375 supportKonrad Dybcio
Add support for MDSS on SM6375. Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Reviewed-by: Marijn Suijten <marijn.suijten@somainline.org> Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org> Patchwork: https://patchwork.freedesktop.org/patch/541295/ Link: https://lore.kernel.org/r/20230411-topic-straitlagoon_mdss-v6-9-dee6a882571b@linaro.org Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
2023-06-08drm/msm: mdss: Add SM6350 supportKonrad Dybcio
Add support for MDSS on SM6350. Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Reviewed-by: Marijn Suijten <marijn.suijten@somainline.org> Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org> Patchwork: https://patchwork.freedesktop.org/patch/541291/ Link: https://lore.kernel.org/r/20230411-topic-straitlagoon_mdss-v6-7-dee6a882571b@linaro.org Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
2023-06-08drm/msm/dpu: Add SM6375 supportKonrad Dybcio
Add basic SM6375 support to the DPU1 driver to enable display output. Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Reviewed-by: Marijn Suijten <marijn.suijten@somainline.org> Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org> Patchwork: https://patchwork.freedesktop.org/patch/541293/ Link: https://lore.kernel.org/r/20230411-topic-straitlagoon_mdss-v6-8-dee6a882571b@linaro.org Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
2023-06-08drm/msm/dpu: Add SM6350 supportKonrad Dybcio
Add SM6350 support to the DPU1 driver to enable display output. It's worth noting that one entry dpu_qos_lut_entry was trimmed off: {.fl = 0, .lut = 0x0011223344556677 }, due to the lack of support for selecting between portrait and landscape LUT settings (for danger and safe LUTs) and no full support for qseed/non-qseed usescases (for QoS LUT). Signed-off-by: Konrad Dybcio <konrad.dybcio@somainline.org> Reviewed-by: Marijn Suijten <marijn.suijten@somainline.org> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org> Patchwork: https://patchwork.freedesktop.org/patch/541287/ Link: https://lore.kernel.org/r/20230411-topic-straitlagoon_mdss-v6-6-dee6a882571b@linaro.org Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
2023-06-08drm/msm/dpu: use PINGPONG_NONE to unbind WB from PPDmitry Baryshkov
Currently the driver passes the PINGPONG index to dpu_hw_wb_ops::bind_pingpong_blk() callback and uses separate boolean flag to tell whether WB should be bound or unbound. Simplify this by passing PINGPONG_NONE in case of unbinding and drop the flag completely. Suggested-by: Marijn Suijten <marijn.suijten@somainline.org> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Reviewed-by: Marijn Suijten <marijn.suijten@somainline.org> Patchwork: https://patchwork.freedesktop.org/patch/540969/ Link: https://lore.kernel.org/r/20230604031308.894274-2-dmitry.baryshkov@linaro.org Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
2023-06-08drm/msm/dpu: use PINGPONG_NONE to unbind INTF from PPDmitry Baryshkov
Currently the driver passes the PINGPONG index to dpu_hw_intf_ops::bind_pingpong_blk() callback and uses separate boolean flag to tell whether INTF should be bound or unbound. Simplify this by passing PINGPONG_NONE in case of unbinding and drop the flag completely. Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Reviewed-by: Marijn Suijten <marijn.suijten@somainline.org> Patchwork: https://patchwork.freedesktop.org/patch/540968/ Link: https://lore.kernel.org/r/20230604031308.894274-1-dmitry.baryshkov@linaro.org Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
2023-06-04drm/msm/dp: Clean up pdev/dev duplication in dp_powerBjorn Andersson
The dp_power module keeps track of both the DP controller's struct platform_device and struct device - with the prior pulled out of the dp_parser module. Clean up the duplication by dropping the platform_device reference and just track the passed struct device. Signed-off-by: Bjorn Andersson <quic_bjorande@quicinc.com> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Patchwork: https://patchwork.freedesktop.org/patch/536939/ Link: https://lore.kernel.org/r/20230515030256.300104-3-quic_bjorande@quicinc.com Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
2023-06-04drm/msm/dp: Clean up logs dp_power moduleBjorn Andersson
The clk_bulk API already provides error messages indicating which specific clock in the request for which the operation failed, further more these errors are associated with the specific DisplayPort controller (rather than the shared drm_device). The additional error messages int he dp_power module does thereby not provide any benefit. While at it, none of the dp_power handles passed to these functions are dynamic in nature, so there should not be any need for runtime checking them. Drop these as well. Signed-off-by: Bjorn Andersson <quic_bjorande@quicinc.com> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Patchwork: https://patchwork.freedesktop.org/patch/536938/ Link: https://lore.kernel.org/r/20230515030256.300104-2-quic_bjorande@quicinc.com Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
2023-06-04drm/msm/dp: remove most of usbpd-related remainsDmitry Baryshkov
Remove most of remains of downstream usbpd code. Mainline kernel uses different approach for managing Type-C / USB-PD, so this remains unused. Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Reviewed-by: Bjorn Andersson <andersson@kernel.org> Patchwork: https://patchwork.freedesktop.org/patch/538270/ Link: https://lore.kernel.org/r/20230520182050.4014143-1-dmitry.baryshkov@linaro.org Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
2023-06-04drm/msm/dpu: simplify dpu_encoder_phys_wb_init()Dmitry Baryshkov
There is no need to assign a result to temp varable just to return it after a goto. Drop the temporary variable and goto and return the result directly. Reviewed-by: Abhinav Kumar <quic_abhinavk@quicinc.com> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Tested-by: Abhinav Kumar <quic_abhinavk@quicinc.com> # sc7280 Patchwork: https://patchwork.freedesktop.org/patch/540639/ Link: https://lore.kernel.org/r/20230601172236.564445-8-dmitry.baryshkov@linaro.org Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
2023-06-04drm/msm/dpu: drop temp variable from dpu_encoder_phys_cmd_init()Dmitry Baryshkov
There is no need to assign a result to temp varable just to return it two lines below. Drop the temporary variable. Reviewed-by: Abhinav Kumar <quic_abhinavk@quicinc.com> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Tested-by: Abhinav Kumar <quic_abhinavk@quicinc.com> # sc7280 Patchwork: https://patchwork.freedesktop.org/patch/540637/ Link: https://lore.kernel.org/r/20230601172236.564445-7-dmitry.baryshkov@linaro.org Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
2023-06-04drm/msm/dpu: call dpu_rm_get_intf() from dpu_encoder_get_intf()Dmitry Baryshkov
There is little sense to get intf index just to call dpu_rm_get_intf() on it. Move dpu_rm_get_intf() call to dpu_encoder_get_intf() function. Reviewed-by: Abhinav Kumar <quic_abhinavk@quicinc.com> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Tested-by: Abhinav Kumar <quic_abhinavk@quicinc.com> # sc7280 Patchwork: https://patchwork.freedesktop.org/patch/540632/ Link: https://lore.kernel.org/r/20230601172236.564445-6-dmitry.baryshkov@linaro.org Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
2023-06-04drm/msm/dpu: inline dpu_encoder_get_wb()Dmitry Baryshkov
The function dpu_encoder_get_wb() returns controller_id if the corresponding WB is present in the catalog. We can inline this function and rely on dpu_rm_get_wb() returning NULL for indices for which the WB is not present on the device. Reviewed-by: Abhinav Kumar <quic_abhinavk@quicinc.com> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Tested-by: Abhinav Kumar <quic_abhinavk@quicinc.com> # sc7280 Patchwork: https://patchwork.freedesktop.org/patch/540634/ Link: https://lore.kernel.org/r/20230601172236.564445-5-dmitry.baryshkov@linaro.org Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
2023-06-04drm/msm/dpu: drop duplicated intf/wb indices from encoder structsDmitry Baryshkov
Remove intf_idx and wb_idx fields from struct dpu_encoder_phys and struct dpu_enc_phys_init_params. Set the hw_intf and hw_wb directly and use them to get the instance index. Reviewed-by: Abhinav Kumar <quic_abhinavk@quicinc.com> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Tested-by: Abhinav Kumar <quic_abhinavk@quicinc.com> # sc7280 Patchwork: https://patchwork.freedesktop.org/patch/540635/ Link: https://lore.kernel.org/r/20230601172236.564445-4-dmitry.baryshkov@linaro.org Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
2023-06-04drm/msm/dpu: separate common function to init physical encoderDmitry Baryshkov
Move common DPU physical encoder initialization code to the new function dpu_encoder_phys_init(). Reviewed-by: Abhinav Kumar <quic_abhinavk@quicinc.com> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Tested-by: Abhinav Kumar <quic_abhinavk@quicinc.com> # sc7280 Patchwork: https://patchwork.freedesktop.org/patch/540630/ Link: https://lore.kernel.org/r/20230601172236.564445-3-dmitry.baryshkov@linaro.org Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
2023-06-04drm/msm/dpu: merge dpu_encoder_init() and dpu_encoder_setup()Dmitry Baryshkov
There is no reason to split the dpu_encoder interface into separate _init() and _setup() phases. Merge them into a single function. Reviewed-by: Abhinav Kumar <quic_abhinavk@quicinc.com> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Tested-by: Abhinav Kumar <quic_abhinavk@quicinc.com> # sc7280 Patchwork: https://patchwork.freedesktop.org/patch/540628/ Link: https://lore.kernel.org/r/20230601172236.564445-2-dmitry.baryshkov@linaro.org Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
2023-06-04drm/msm/mdp5: Add MDP5 configuration for MSM8226Luca Weiss
Add the required config for the v1.1 MDP5 found on MSM8226. Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Signed-off-by: Luca Weiss <luca@z3ntu.xyz> Patchwork: https://patchwork.freedesktop.org/patch/540612/ Link: https://lore.kernel.org/r/20230308-msm8226-mdp-v3-4-b6284145d67a@z3ntu.xyz Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
2023-06-04drm/msm/dsi: Add phy configuration for MSM8226Luca Weiss
MSM8226 uses a modified PLL lock sequence compared to MSM8974, which is based on the function dsi_pll_enable_seq_m in the msm-3.10 kernel. Worth noting that the msm-3.10 downstream kernel also will try other sequences in case this one doesn't work, but during testing it has shown that the _m sequence succeeds first time also: .pll_enable_seqs[0] = dsi_pll_enable_seq_m, .pll_enable_seqs[1] = dsi_pll_enable_seq_m, .pll_enable_seqs[2] = dsi_pll_enable_seq_d, .pll_enable_seqs[3] = dsi_pll_enable_seq_d, .pll_enable_seqs[4] = dsi_pll_enable_seq_f1, .pll_enable_seqs[5] = dsi_pll_enable_seq_c, .pll_enable_seqs[6] = dsi_pll_enable_seq_e, We may need to expand this in the future. Signed-off-by: Luca Weiss <luca@z3ntu.xyz> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Patchwork: https://patchwork.freedesktop.org/patch/540618/ Link: https://lore.kernel.org/r/20230308-msm8226-mdp-v3-6-b6284145d67a@z3ntu.xyz Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
2023-06-04drm/msm/dsi: Add configuration for MSM8226Luca Weiss
Add the config for the v1.0.2 DSI found on MSM8226. We can reuse existing bits from other revisions that are identical for v1.0.2. Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Signed-off-by: Luca Weiss <luca@z3ntu.xyz> Patchwork: https://patchwork.freedesktop.org/patch/540616/ Link: https://lore.kernel.org/r/20230308-msm8226-mdp-v3-5-b6284145d67a@z3ntu.xyz Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
2023-06-04drm/msm: Remove unnecessary (void*) conversionsSu Hui
Pointer variables of (void*) type do not require type cast. Signed-off-by: Su Hui <suhui@nfschina.com> Reviewed-by: Abhinav Kumar <quic_abhinavk@quicinc.com> Patchwork: https://patchwork.freedesktop.org/patch/540599/ Link: https://lore.kernel.org/r/20230522013213.25876-1-suhui@nfschina.com Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
2023-06-04drm/msm/dpu: clean up dpu_kms_get_clk_rate() returnsDan Carpenter
Static analysis tools complain about the -EINVAL error code being stored in an unsigned variable. Let's change this to match the clk_get_rate() function which is type unsigned long and returns zero on error. Fixes: 25fdd5933e4c ("drm/msm: Add SDM845 DPU support") Signed-off-by: Dan Carpenter <dan.carpenter@linaro.org> Reviewed-by: Abhinav Kumar <quic_abhinavk@quicinc.com> Patchwork: https://patchwork.freedesktop.org/patch/539626/ Link: https://lore.kernel.org/r/28644c5e-950e-41cd-8389-67f37b067bdc@kili.mountain Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
2023-06-04drm/msm/dpu: Tear down DSC datapath on encoder cleanupKuogee Hsieh
Unset DSC_ACTIVE bit at dpu_hw_ctl_reset_intf_cfg_v1(), dpu_encoder_unprep_dsc() and dpu_encoder_dsc_pipe_clr() functions to tear down DSC data path if DSC data path was setup previous. Changes in V10: -- pass ctl directly instead of dpu_enc to dsc_pipe_cfg() -- move both dpu_encoder_unprep_dsc() and dpu_encoder_dsc_pipe_clr() to above phys_cleanup() Signed-off-by: Kuogee Hsieh <quic_khsieh@quicinc.com> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Reviewed-by: Marijn Suijten <marijn.suijten@somainline.org> Patchwork: https://patchwork.freedesktop.org/patch/539515/ Link: https://lore.kernel.org/r/1685036458-22683-11-git-send-email-quic_khsieh@quicinc.com Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
2023-06-04drm/msm/dpu: separate DSC flush update out of interfaceKuogee Hsieh
Currently DSC flushing happens during interface configuration at dpu_hw_ctl_intf_cfg_v1(). Separate DSC flush away from dpu_hw_ctl_intf_cfg_v1() by adding dpu_hw_ctl_update_pending_flush_dsc_v1() to handle both per-DSC engine and DSC flush bits at same time to make it consistent with the location of flush programming of other DPU sub-blocks. Changes in v10: -- rewording commit text -- pass ctl directly instead of dpu_enc to dsc_pipe_cfg() -- ctx->pending_dsc_flush_mask = 0; Changes in v11: -- add Fixes tag Changes in v12: -- move dsc parameter to next line at dpu_encoder_dsc_pipe_cfg() Changes in v14: -- Fixes tag had been move to 1st patch of this series Signed-off-by: Kuogee Hsieh <quic_khsieh@quicinc.com> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Reviewed-by: Marijn Suijten <marijn.suijten@somainline.org> Patchwork: https://patchwork.freedesktop.org/patch/539506/ Link: https://lore.kernel.org/r/1685036458-22683-9-git-send-email-quic_khsieh@quicinc.com Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
2023-06-04drm/msm/dpu: always clear every individual pending flush maskKuogee Hsieh
There are two tiers of pending flush control, top level and individual hardware block. Currently only the top level of flush mask is reset to 0 but the individual pending flush masks of particular hardware blocks are left at their previous values, eventually accumulating all possible bit values and typically flushing more than necessary. Reset all individual hardware block flush masks to 0 to avoid accidentally flushing them. Changes in V13: -- rewording commit text -- add an empty space line as suggested Changes in V14: -- add Fixes tag Fixes: 73bfb790ac78 ("msm:disp:dpu1: setup display datapath for SC7180 target") Signed-off-by: Kuogee Hsieh <quic_khsieh@quicinc.com> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Reviewed-by: Marijn Suijten <marijn.suijten@somainline.org> Patchwork: https://patchwork.freedesktop.org/patch/539508/ Link: https://lore.kernel.org/r/1685036458-22683-8-git-send-email-quic_khsieh@quicinc.com Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
2023-06-04drm/msm/dpu: Introduce PINGPONG_NONE to disconnect DSC from PINGPONGKuogee Hsieh
Disabling the crossbar mux between DSC and PINGPONG currently requires a bogus enum dpu_pingpong value to be passed when calling dsc_bind_pingpong_blk() with enable=false, even though the register value written is independent of the current PINGPONG block. Replace that `bool enable` parameter with a new PINGPONG_NONE dpu_pingpong flag that triggers the write of the "special" 0xF "crossbar disabled" value to the register instead. Changes in v4: -- more details to commit text Changes in v5: -- rewording commit text suggested by Marijn -- add DRM_DEBUG_KMS for DSC unbinding case Changes in v8: -- fix checkpatch warning Signed-off-by: Kuogee Hsieh <quic_khsieh@quicinc.com> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Reviewed-by: Marijn Suijten <marijn.suijten@somainline.org> Patchwork: https://patchwork.freedesktop.org/patch/539505/ Link: https://lore.kernel.org/r/1685036458-22683-6-git-send-email-quic_khsieh@quicinc.com Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
2023-06-04drm/msm/dpu: Guard PINGPONG DSC ops behind DPU_PINGPONG_DSC bitKuogee Hsieh
DPU < 7.0.0 has DPU_PINGPONG_DSC feature bit set to indicate it requires both dpu_hw_pp_setup_dsc() and dpu_hw_pp_dsc_{enable,disable}() to be executed to complete DSC configuration if DSC hardware block is present. Hence test DPU_PINGPONG_DSC feature bit and assign DSC related functions to the ops of PINGPONG block accordingly if DPU_PINGPONG_DSC bit is set. Changes in v6: -- split patches, this patch has function handles DPU_PINGPONG_DSC bit Changes in v9: -- the original code of assigning dsc related functions to the ops of pingpong block without testing the DPU_PINGPONG_DSC feature bit was restored back due to rebase error which defeat the purpose of this patch. Remove those error code. Changes in v10: -- change commit title -- correct texts at changes in v9 Changes in v12: -- fixed length too long at Changes in v9 Signed-off-by: Kuogee Hsieh <quic_khsieh@quicinc.com> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Reviewed-by: Marijn Suijten <marijn.suijten@somainline.org> Patchwork: https://patchwork.freedesktop.org/patch/539504/ Link: https://lore.kernel.org/r/1685036458-22683-5-git-send-email-quic_khsieh@quicinc.com Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
2023-06-04drm/msm/dpu: add DPU_PINGPONG_DSC feature bit for DPU < 7.0.0Kuogee Hsieh
DPU < 7.0.0 requires the PINGPONG block to be involved during DSC setting up. Since DPU >= 7.0.0, enabling and starting the DSC encoder engine was moved to INTF with the help of the flush mechanism. Add a DPU_PINGPONG_DSC feature bit to restrict the availability of dpu_hw_pp_setup_dsc() and dpu_hw_pp_dsc_{enable,disable}() on the PINGPONG block to DPU < 7.0.0 hardware, as the registers are not available on DPU 7.0.0 and higher anymore. Add DPU_PINGPONG_DSC to PINGPONG_SDM845_MASK, PINGPONG_SDM845_TE2_MASK and PINGPONG_SM8150_MASK which is used for all DPU < 7.0 chipsets. changes in v6: -- split patches and rearrange to keep catalog related files at this patch changes in v7: -- rewording commit text as suggested at review comments changes in v9: -- delete BIT(DPU_PINGPONG_DSC) from PINGPONG_SDM845_TE2_MASK changes in v10: -- correct order of commit text Signed-off-by: Kuogee Hsieh <quic_khsieh@quicinc.com> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Reviewed-by: Marijn Suijten <marijn.suijten@somainline.org> Patchwork: https://patchwork.freedesktop.org/patch/539502/ Link: https://lore.kernel.org/r/1685036458-22683-4-git-send-email-quic_khsieh@quicinc.com Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
generated by cgit (git 2.34.1) at 2025-09-23 16:31:25 +0000