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path: root/drivers/gpu/drm
AgeCommit message (Expand)Author
2015-09-02drm/i915: Also record time difference if vblank evasion fails, v2.Maarten Lankhorst
2015-09-02drm/i915: Remove start frame argument to pipe_update_begin/end.Maarten Lankhorst
2015-09-02drm/i915: guest i915 notification for Intel GVT-gZhiyuan Lv
2015-09-02drm/i915: Update PV INFO page definition for Intel GVT-gZhiyuan Lv
2015-09-02drm/i915: Always enable execlists on BDW for vgpuZhiyuan Lv
2015-09-02drm/i915: preallocate pdps for 32 bit vgpuZhiyuan Lv
2015-09-02drm/i915: add yesno utility functionJani Nikula
2015-09-02drm/i915: move intel_hrawclk() to intel_display.cJani Nikula
2015-09-02drm/i915: Notify GuC rc6 stateAlex Dai
2015-09-02drm/i915/guc: Support GuC version 4.3Alex Dai
2015-09-02drm/i915: Fix module initialisation, v2.Maarten Lankhorst
2015-09-01drm/i915: Factor out intel_crtc_has_encoders()Ville Syrjälä
2015-09-01drm/i915: Fix clock readout when pipes are enabled w/o portsVille Syrjälä
2015-09-01drm/i915: Add CHV PHY LDO power sanity checksVille Syrjälä
2015-09-01drm/i915: Add some CHV DPIO lane power state assertsVille Syrjälä
2015-09-01drm/i915: Clean up CHV lane soft reset programmingVille Syrjälä
2015-09-01drm/i915: Bump command parser version number.Francisco Jerez
2015-09-01drm/i915/dp: use the drm dp helper for determining sink tps3 supportJani Nikula
2015-08-28drm/i915: Update DRIVER_DATE to 20150828Daniel Vetter
2015-08-26Partially revert "drm/i915: Use full atomic modeset."Maarten Lankhorst
2015-08-26drm/i915: gen 9 can check for unclaimed registers tooPaulo Zanoni
2015-08-26drm/i915: Force CL2 off in CHV x1 PHYVille Syrjälä
2015-08-26drm/i915: Enable DPIO SUS clock gating on CHVVille Syrjälä
2015-08-26drm/i915: Force common lane on for the PPS kick on CHVVille Syrjälä
2015-08-26drm/i915: Trick CL2 into life on CHV when using pipe B with port BVille Syrjälä
2015-08-26drm/i915: Implement PHY lane power gating for CHVVille Syrjälä
2015-08-26drm/i915: Move DPLL ref/cri/VGA mode frobbing to the disp2d well enableVille Syrjälä
2015-08-26drm/i915: Make some string arrays constVille Syrjälä
2015-08-26drm/i915: Use ARRAY_SIZE() instead of hand rolling itVille Syrjälä
2015-08-26drm/i915: Fix some gcc warningsVille Syrjälä
2015-08-26drm/i915/bxt: Use correct live status register for BXT platformJani Nikula
2015-08-26drm/i915: split g4x_digital_port_connected to g4x and vlv variantsJani Nikula
2015-08-26drm/i915: split ibx_digital_port_connected to ibx and cpt variantsJani Nikula
2015-08-26drm/i915: add common intel_digital_port_connected functionJani Nikula
2015-08-26drm/i915: add MISSING_CASE annotation to ibx_digital_port_connectedJani Nikula
2015-08-26drm/i915: make g4x_digital_port_connected return boolean statusJani Nikula
2015-08-26drm/i915: move ibx_digital_port_connected to intel_dp.cJani Nikula
2015-08-26drm/i915: DVO pixel clock checkMika Kahola
2015-08-26drm/i915: DSI pixel clock checkMika Kahola
2015-08-26drm/i915: LVDS pixel clock checkMika Kahola
2015-08-26drm/i915: Store max dotclockMika Kahola
2015-08-26drm/i915: Add vlv_dport_to_phy()Ville Syrjälä
2015-08-26drm/i915: Move VLV/CHV prepare_pll laterVille Syrjälä
2015-08-26drm/i915: Add locking around chv_phy_control_init()Ville Syrjälä
2015-08-26drm/i915: Move DPIO port init earlierVille Syrjälä
2015-08-26drm/i915: Add encoder->post_pll_disable() hooks and move CHV clock buffer dis...Ville Syrjälä
2015-08-26drm/i915: Always program unique transition scale for CHVVille Syrjälä
2015-08-26drm/i915: Always program m2 fractional value on CHVVille Syrjälä
2015-08-26drm/i915: fix driver's versions of WARN_ON & WARN_ON_ONCEDave Gordon
2015-08-26drm/i915: Put back lane_count into intel_dp and add link_rate tooVille Syrjälä
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