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path: root/drivers/gpu/drm
AgeCommit message (Expand)Author
2016-04-19drm/i915: call kunmap_px on pt_vaddrMatthew Auld
2016-04-19drm/i915: Wait for power cycle delay after turning off DSI panel powerVille Syrjälä
2016-04-19drm/i915: Define HSW/BDW display power domains the right way upVille Syrjälä
2016-04-19drm/i915: Define VLV/CHV display power well domains properlyVille Syrjälä
2016-04-19drm/i915: Set .domains=POWER_DOMAIN_MASK for the always-on wellVille Syrjälä
2016-04-19drm/i915: Fix oops in vlv_force_pll_on()Ville Syrjälä
2016-04-19drm/i915/gen9: Fix runtime PM refcounting in case DMC firmware isn't loadedImre Deak
2016-04-19drm/i915/ddi: Fix eDP VDD handling during booting and suspend/resumeImre Deak
2016-04-19drm/i915: Fix system resume if PCI device remained enabledImre Deak
2016-04-19drm/i915: Fix error path in i915_drm_resume_earlyImre Deak
2016-04-18drm/i915/kbl: Reset secondary power well requests left on by DMC/KVMRImre Deak
2016-04-18drm/i915: Replace nondescript 'WARN_ON(!lret)' with a sensible error messageVille Syrjälä
2016-04-18drm/i915: Avoid stalling on pending flips for legacy cursor updatesChris Wilson
2016-04-18drm/i915/dsi: fix CHV dsi encoder hardware state readout on port CJani Nikula
2016-04-15drm/i915: Show pin mapped counts and sizes in debugfsTvrtko Ursulin
2016-04-15drm/i915: Show pin mapped status in describe_objTvrtko Ursulin
2016-04-15drm/i915: Reject 'Center' scaling mode for eDP/DSI on GMCH platformsVille Syrjälä
2016-04-15drm/i915: Hook up pfit for DSIVille Syrjälä
2016-04-15drm/i915: Eliminate {vlv,bxt}_configure_dsi_pll()Ville Syrjälä
2016-04-15drm/i915: Compute DSI PLL parameters during .compute_config()Ville Syrjälä
2016-04-15drm/i915: Setup DPLL/DPLLMD for DSI too on VLV/CHVVille Syrjälä
2016-04-15drm/i915/bxt: PORT_PLL_REF_SEL bit should be set for all BXT variationsDongwon Kim
2016-04-15drm/i915/bxt: Enable runtime PMImre Deak
2016-04-15Revert "drm/i915/bxt: Disable power well support"Imre Deak
2016-04-15drm/i915/bxt: Add HW state verification for DDI PHY and CDCLKImre Deak
2016-04-15drm/i915/bxt: Don't reprogram an already enabled DDI PHYImre Deak
2016-04-15drm/i915/bxt: Sanitize the DBUF HW state together with CDCLKImre Deak
2016-04-15drm/i915/bxt: Don't toggle power well 1 on-demandImre Deak
2016-04-15drm/i915/bxt: Power down DDI PHYs separately during the per PHY uninitImre Deak
2016-04-15drm/i915/bxt: Pass drm_i915_private to DDI PHY, CDCLK helpersImre Deak
2016-04-15drm/i915/skl: Unexport skl_pw1_misc_io_initImre Deak
2016-04-15drm/i915/bxt: Suspend power domains during suspend-to-idleImre Deak
2016-04-15drm/i915/gen9: Fix DMC/DC state assertsImre Deak
2016-04-15drm/i915/gen9: Make power well disabling synchronousImre Deak
2016-04-15drm/i915/gen9: Reset secondary power well requests left on by DMC/KVMRImre Deak
2016-04-15drm/i915/bxt: Add a note about BXT_PORT_CL1CM_DW30 being read-onlyImre Deak
2016-04-15drm/i915/bxt: Fix GRC code register field definitionsImre Deak
2016-04-15drm/i915/bxt: Reject DMC firmware versions with known bugsImre Deak
2016-04-15drm/i915: use drm_crtc_send_vblank_event()Gustavo Padovan
2016-04-14drm/i915: Use fw_domains_put_with_fifo() on HSWVille Syrjälä
2016-04-14drm/i915: Split gen8_gt_irq_handler into ack+handleVille Syrjälä
2016-04-14drm/i915: Eliminate passing dev+dev_priv to {snb,ilk}_gt_irq_handler()Ville Syrjälä
2016-04-14drm/i915: Move gt/pm irq handling out from irq disabled section on VLVVille Syrjälä
2016-04-14drm/i915: Split VLV/CVH PIPESTAT handling into ack+handlerVille Syrjälä
2016-04-14drm/i915: Split PORT_HOTPLUG_STAT ack out from i9xx_hpd_irq_handler()Ville Syrjälä
2016-04-14drm/i915: Move variables to narrower scope in VLV/CHV irq handlersVille Syrjälä
2016-04-14drm/i915: Eliminate loop from VLV irq handlerVille Syrjälä
2016-04-14drm/i915: Clear VLV_IER around irq processingVille Syrjälä
2016-04-14drm/i915: Clear VLV_MASTER_IER around irq processingVille Syrjälä
2016-04-14drm/i915: Clear VLV_IIR after PIPESTATVille Syrjälä
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