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path: root/drivers/gpu
AgeCommit message (Expand)Author
2015-08-26drm/i915: Fix some gcc warningsVille Syrjälä
2015-08-26drm/i915/bxt: Use correct live status register for BXT platformJani Nikula
2015-08-26drm/i915: split g4x_digital_port_connected to g4x and vlv variantsJani Nikula
2015-08-26drm/i915: split ibx_digital_port_connected to ibx and cpt variantsJani Nikula
2015-08-26drm/i915: add common intel_digital_port_connected functionJani Nikula
2015-08-26drm/i915: add MISSING_CASE annotation to ibx_digital_port_connectedJani Nikula
2015-08-26drm/i915: make g4x_digital_port_connected return boolean statusJani Nikula
2015-08-26drm/i915: move ibx_digital_port_connected to intel_dp.cJani Nikula
2015-08-26drm/i915: DVO pixel clock checkMika Kahola
2015-08-26drm/i915: DSI pixel clock checkMika Kahola
2015-08-26drm/i915: LVDS pixel clock checkMika Kahola
2015-08-26drm/i915: Store max dotclockMika Kahola
2015-08-26drm/i915: Add vlv_dport_to_phy()Ville Syrjälä
2015-08-26drm/i915: Move VLV/CHV prepare_pll laterVille Syrjälä
2015-08-26drm/i915: Add locking around chv_phy_control_init()Ville Syrjälä
2015-08-26drm/i915: Move DPIO port init earlierVille Syrjälä
2015-08-26drm/i915: Add encoder->post_pll_disable() hooks and move CHV clock buffer dis...Ville Syrjälä
2015-08-26drm/i915: Always program unique transition scale for CHVVille Syrjälä
2015-08-26drm/i915: Always program m2 fractional value on CHVVille Syrjälä
2015-08-26drm/i915: fix driver's versions of WARN_ON & WARN_ON_ONCEDave Gordon
2015-08-26drm/i915: Put back lane_count into intel_dp and add link_rate tooVille Syrjälä
2015-08-26drm/i915/bxt: don't allow cached GEM mappings on A steppingImre Deak
2015-08-26drm/i915/bxt: work around HW coherency issue when accessing GPU seqnoImre Deak
2015-08-26drm/i915: Also call frontbuffer flip when disabling planes.Rodrigo Vivi
2015-08-26drm/i915: Change SRM, LRM instructions to use correct lengthArun Siluvery
2015-08-14drm/i915: remove excessive scaler debugging messagesJani Nikula
2015-08-14drm/i915: Debugfs interface for GuC submission statisticsDave Gordon
2015-08-14drm/i915: Integrate GuC-based command submissionAlex Dai
2015-08-14drm/i915: Interrupt routing for GuC submissionDave Gordon
2015-08-14drm/i915: Implementation of GuC submission clientDave Gordon
2015-08-14drm/i915: Enable GuC firmware logAlex Dai
2015-08-14drm/i915: Prepare for GuC-based command submissionAlex Dai
2015-08-14drm/i915: Expose one LRC function for GuC submission modeDave Gordon
2015-08-14drm/i915: Debugfs interface to read GuC load statusAlex Dai
2015-08-14drm/i915: GuC-specific firmware loaderAlex Dai
2015-08-14drm/i915: Kill intel_dp->{link_bw, rate_select}Ville Syrjälä
2015-08-14drm/i915: Don't use link_bw to select between TP1 and TP3Ville Syrjälä
2015-08-14drm/i915: Move intel_dp->lane_count into pipe_configVille Syrjälä
2015-08-14drm/i915: Avoid confusion between DP and TRANS_DP_CTL in DP .get_config()Ville Syrjälä
2015-08-14drm/i915: Don't pass clock to DDI PLL select functionsVille Syrjälä
2015-08-14drm/i915: Don't use link_bw for PLL setupVille Syrjälä
2015-08-14drm/i915: Clean up DP/HDMI limited color range handlingVille Syrjälä
2015-08-14drm/i915: Do not check or a stalled pageflip prior to it being queuedChris Wilson
2015-08-14drm/i915: clflush on pin_to_display after pwrite to UC bo in LLCVille Syrjälä
2015-08-14drm/i915/bxt: WA for swapped HPD pins in A steppingSonika Jindal
2015-08-14drm/i915/bxt: Add HPD support for DDIASonika Jindal
2015-08-14drm/i915: Always pass dev pointer in pdp_initMichel Thierry
2015-08-14drm/i915: Use complete virtual address range on 32-bit platformsMichel Thierry
2015-08-14drm/i915/gtt: Allow >= 4GB offsets in X86_32Michel Thierry
2015-08-14drm/i915: Dont -ETIMEDOUT on identical new and previous (count, crc).Rodrigo Vivi
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