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path: root/drivers/gpu
AgeCommit message (Expand)Author
2021-08-13drm/i915/dg2: add SNPS PHY translations for UHBR link ratesJani Nikula
2021-08-13drm/i915/dg2: use existing mechanisms for SNPS PHY translationsJani Nikula
2021-08-13drm/i915/dp: pass crtc_state to intel_ddi_dp_level()Jani Nikula
2021-08-13drm/i915/mst: use intel_de_rmw() to simplify VC payload alloc set/clearJani Nikula
2021-08-13drm/i915/edp: fix eDP MSO pipe sanity checks for ADL-PJani Nikula
2021-08-12drm/i915: Tweaked Wa_14010685332 for all PCHsAnshuman Gupta
2021-08-11drm/i915: Only access SFC_DONE when media domain is not fused offMatt Roper
2021-08-11drm/i915/dg2: Configure PCON in DP pre-enable pathAnkit Nautiyal
2021-08-11drm/i915/display: Fix the 12 BPC bits for PIPE_MISC regAnkit Nautiyal
2021-08-06drm/i915/dg2: Add support for new DG2-G11 revid 0x5Matt Roper
2021-08-03drm/i915/display/adl_p: Correctly program MBUS DBOX A creditsJosé Roberto de Souza
2021-08-03drm/i915: Apply CMTG clock disabling WA while DPLL0 is enabledImre Deak
2021-08-02drm/i915: Correct SFC_DONE register offsetMatt Roper
2021-08-02drm/i915/dg1: Adjust the AUDIO power domainAnshuman Gupta
2021-07-30drm/i915: finish removal of CNLLucas De Marchi
2021-07-30drm/i915: rename/remove CNL registersLucas De Marchi
2021-07-30drm/i915: remove GRAPHICS_VER == 10Lucas De Marchi
2021-07-30drm/i915: switch num_scalers/num_sprites to consider DISPLAY_VERLucas De Marchi
2021-07-30drm/i915: replace random CNL commentsLucas De Marchi
2021-07-30drm/i915: rename CNL references in intel_dram.cLucas De Marchi
2021-07-30drm/i915: remove explicit CNL handling from intel_wopcm.cLucas De Marchi
2021-07-30drm/i915: remove explicit CNL handling from intel_pch.cLucas De Marchi
2021-07-30drm/i915: remove explicit CNL handling from intel_pm.cLucas De Marchi
2021-07-30drm/i915: remove explicit CNL handling from i915_irq.cLucas De Marchi
2021-07-30drm/i915/display: rename CNL references in skl_scaler.cLucas De Marchi
2021-07-30drm/i915/display: remove CNL ddi buf translation tablesLucas De Marchi
2021-07-30drm/i915/display: remove explicit CNL handling from intel_display_power.cLucas De Marchi
2021-07-30drm/i915/display: remove explicit CNL handling from skl_universal_plane.cLucas De Marchi
2021-07-30drm/i915/display: remove explicit CNL handling from intel_vdsc.cLucas De Marchi
2021-07-30drm/i915/display: remove explicit CNL handling from intel_dpll_mgr.cLucas De Marchi
2021-07-30drm/i915/display: remove explicit CNL handling from intel_dp.cLucas De Marchi
2021-07-30drm/i915/display: remove explicit CNL handling from intel_dmc.cLucas De Marchi
2021-07-30drm/i915/display: remove explicit CNL handling from intel_display_debugfs.cLucas De Marchi
2021-07-30drm/i915/display: remove explicit CNL handling from intel_ddi.cLucas De Marchi
2021-07-30drm/i915/display: remove explicit CNL handling from intel_crtc.cLucas De Marchi
2021-07-30drm/i915/display: remove explicit CNL handling from intel_combo_phy.cLucas De Marchi
2021-07-30drm/i915/display: remove explicit CNL handling from intel_color.cLucas De Marchi
2021-07-30drm/i915/display: remove explicit CNL handling from intel_cdclk.cLucas De Marchi
2021-07-30drm/i915/display: remove PORT_F workaround for CNLLucas De Marchi
2021-07-29drm/i915/dp: DPTX writes Swing/Pre-emphs(DPCD 0x103-0x106) requested during P...Khaled Almahallawy
2021-07-29drm/i915/dg2: Update to bigjoiner pathAnimesh Manna
2021-07-29drm/i915/dg2: Update lane disable power state during PSRGwan-gyeong Mun
2021-07-29drm/i915/dg2: Wait for SNPS PHY calibration during display initMatt Roper
2021-07-29drm/i915/dg2: Update modeset sequencesMatt Roper
2021-07-29drm/i915/dg2: Add vswing programming for SNPS physMatt Roper
2021-07-29drm/i915/dg2: Add MPLLB programming for HDMIMatt Roper
2021-07-29drm/i915/dg2: Add MPLLB programming for SNPS PHYMatt Roper
2021-07-28drm/i915/adl_p: Add ddi buf translation tables for combo PHYMatt Roper
2021-07-28drm/i915/adl_s: Update ddi buf translation tablesMatt Roper
2021-07-28drm/i915: dgfx cards need to wait on pcode's uncore init doneBadal Nilawar
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