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2022-08-24drm/i915: move fbc_mask to runtime infoJani Nikula
If it's modified runtime, it's runtime info. v2: Rebase on mtl fbc_mask Signed-off-by: Jani Nikula <jani.nikula@intel.com> Reviewed-by: Maarten Lankhort <maarten.lankhorst@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/dd1898084b732ba265b212ddbc0fcdd826c11820.1660910433.git.jani.nikula@intel.com
2022-08-24drm/i915: move graphics.ver and graphics.rel to runtime infoJani Nikula
If it's modified runtime, it's runtime info. mock_gem_device() is the only one that modifies them. If that could be fixed, we wouldn't have to do this. Signed-off-by: Jani Nikula <jani.nikula@intel.com> Reviewed-by: Maarten Lankhort <maarten.lankhorst@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/6bdf6cc0d67e3ed8042d2b92303351111147ba47.1660910433.git.jani.nikula@intel.com
2022-08-24drm/i915: add initial runtime info into device infoJani Nikula
Add initial runtime info that we can copy to runtime info at i915 creation time. This lets us define the initial values for runtime info statically while making it possible to change them runtime. This will be the new home for the current "const" device info members that are modified runtime anyway. Signed-off-by: Jani Nikula <jani.nikula@intel.com> Reviewed-by: Maarten Lankhort <maarten.lankhorst@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/a77c6db2da20d401f47a0a5e87356b9b3f6292df.1660910433.git.jani.nikula@intel.com
2022-08-24drm/i915: combine device info printing into oneJani Nikula
We'll be moving info between static and runtime info. Combine the printing functions into one to keep the output sensible and (mostly) unchanged in the process. Signed-off-by: Jani Nikula <jani.nikula@intel.com> Reviewed-by: Maarten Lankhort <maarten.lankhorst@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/8579bfe0fcc5ee8390d4cded68a0167a618097f5.1660910433.git.jani.nikula@intel.com
2022-08-23drm/i915/backlight: Disable pps power hook for aux based backlightJouni Högander
Pps power hook seems to be problematic for backlight controlled via aux channel. Disable it for such cases. Closes: https://gitlab.freedesktop.org/drm/intel/-/issues/3657 Cc: stable@vger.kernel.org Signed-off-by: Jouni Högander <jouni.hogander@intel.com> Signed-off-by: Jani Nikula <jani.nikula@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20220822140836.534432-1-jouni.hogander@intel.com
2022-08-23drm/i915/utils: remove unused KBps/MBps/GBps macrosJani Nikula
Remove unused macros. If needed again, such macros belong in <linux/units.h>. Signed-off-by: Jani Nikula <jani.nikula@intel.com> Reviewed-by: Matthew Auld <matthew.auld@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20220815080907.3229449-1-jani.nikula@intel.com
2022-08-22drm/i915/dsc/mtl: Enable alternate ICH methodVandita Kulkarni
DSC 1.2 is supported from MTL, hence program ICH accordingly. Cc: Ankit Nautiyal <ankit.k.nautiyal@intel.com> Signed-off-by: Vandita Kulkarni <vandita.kulkarni@intel.com> Reviewed-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com> Signed-off-by: Jani Nikula <jani.nikula@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20220817124516.284456-2-jani.nikula@intel.com
2022-08-22drm/i915/dsc/mtl: Update the DSC minor versionVandita Kulkarni
From MTL onwards we support DSC 1.2, since there is hardcoding to minor version 1, update it. Cc: Ankit Nautiyal <ankit.k.nautiyal@intel.com> Signed-off-by: Vandita Kulkarni <vandita.kulkarni@intel.com> Reviewed-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com> Signed-off-by: Jani Nikula <jani.nikula@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20220817124516.284456-1-jani.nikula@intel.com
2022-08-22drm/i915/display: avoid warnings when registering dual panel backlightArun R Murthy
Commit 20f85ef89d94 ("drm/i915/backlight: use unique backlight device names") added support for multiple backlight devices on dual panel systems, but did so with error handling on -EEXIST from backlight_device_register(). Unfortunately, that triggered a warning in dmesg all the way down from sysfs_add_file_mode_ns() and sysfs_warn_dup(). Instead of optimistically always attempting to register with the default name ("intel_backlight", which we have to retain for backward compatibility), check if a backlight device with the name exists first, and, if so, use the card and connector based name. v2: reworked on top of the patch commit 20f85ef89d94 ("drm/i915/backlight: use unique backlight device names") v3: fixed the ref count leak(Jani N) Fixes: 20f85ef89d94 ("drm/i915/backlight: use unique backlight device names") Signed-off-by: Arun R Murthy <arun.r.murthy@intel.com> Signed-off-by: Jani Nikula <jani.nikula@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20220808035750.3111046-1-arun.r.murthy@intel.com
2022-08-19drm/i915/mtl: Introduce FBC BVille Syrjälä
MTL introduces a second FBC engine. The two FBC engines can operate entirely independently, FBC A serving pipe A and FBC B serving pipe B. The one place where things might go a bit wrong is the CFB allocation from stolen. We might have to consider some change to the allocation strategy to have a better chance of both engines being able to allocate its CFB. Maybe FBC A should allocate bottom up and FBC B top down, or something? For the moment the allocation strategy is DRM_MM_INSERT_BEST for both. Cc: Mika Kahola <mika.kahola@intel.com> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Reviewed-by: Mika Kahola <mika.kahola@intel.com> Signed-off-by: Jani Nikula <jani.nikula@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20220817122624.213889-1-jani.nikula@intel.com
2022-08-19drm/i915/mtl: Meteorlake and later support DP 2.0Jani Nikula
Meteorlake and newer platforms support DP 2.0. Cc: Uma Shankar <uma.shankar@intel.com> Signed-off-by: Jani Nikula <jani.nikula@intel.com> Reviewed-by: Uma Shankar <uma.shankar@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20220817121948.180655-1-jani.nikula@intel.com
2022-08-18drm/i915/dsi: use VBT backlight and CABC port definitions directlyJani Nikula
Drop the intermediate values stored in intel_dsi and use the VBT values directly, now that they're conveniently stored in panel->vbt. Signed-off-by: Jani Nikula <jani.nikula@intel.com> Reviewed-by: Stanislav Lisovskiy <stanislav.lisovskiy@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/8b3765f1e1dc4d436b312016f72647e03ba49f94.1660664162.git.jani.nikula@intel.com
2022-08-18drm/i915/dsi: fix dual-link DSI backlight and CABC ports for display 11+Jani Nikula
The VBT dual-link DSI backlight and CABC still use ports A and C, both in Bspec and code, while display 11+ DSI only supports ports A and B. Assume port C actually means port B for display 11+ when parsing VBT. Bspec: 20154 Closes: https://gitlab.freedesktop.org/drm/intel/-/issues/6476 Cc: stable@vger.kernel.org Signed-off-by: Jani Nikula <jani.nikula@intel.com> Reviewed-by: Stanislav Lisovskiy <stanislav.lisovskiy@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/8c462718bcc7b36a83e09d0a5eef058b6bc8b1a2.1660664162.git.jani.nikula@intel.com
2022-08-18drm/i915/dsi: filter invalid backlight and CABC portsJani Nikula
Avoid using ports that aren't initialized in case the VBT backlight or CABC ports have invalid values. This fixes a NULL pointer dereference of intel_dsi->dsi_hosts[port] in such cases. Cc: stable@vger.kernel.org Signed-off-by: Jani Nikula <jani.nikula@intel.com> Reviewed-by: Stanislav Lisovskiy <stanislav.lisovskiy@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/b0f4f087866257d280eb97d6bcfcefd109cc5fa2.1660664162.git.jani.nikula@intel.com
2022-08-17drm/i915/irq: Fix a "the the" typoBo Liu
There is an unexpected word "the" in the file i915_irq.c, fix it. Signed-off-by: Bo Liu <liubo03@inspur.com> Signed-off-by: Jani Nikula <jani.nikula@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20220816094919.5419-1-liubo03@inspur.com
2022-08-16drm/i915/backlight: split out backlight registers to a separate fileJani Nikula
Declutter i915_reg.h by splitting backlight registers to a separate file. Also include the utility pin definitions, even though they are used for non-backlight things too. Signed-off-by: Jani Nikula <jani.nikula@intel.com> Reviewed-by: Arun R Murthy <arun.r.murthy@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20220815094838.3511723-1-jani.nikula@intel.com
2022-08-15drm/i915/tc: Fix PHY ownership programming in HDMI legacy modeImre Deak
Make sure the TypeC PHY ownership flag is not getting reset during an HDMI modeset on the given port. Besides the WARN this triggered, it didn't cause other issues, since for TypeC legacy mode setting the PHY ownership flag is optional (there is no other user of the PHY besides display). Reported-and-tested-by: Shawn C Lee <shawn.c.lee@intel.com> Signed-off-by: Imre Deak <imre.deak@intel.com> Reviewed-by: Mika Kahola <mika.kahola@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20220726134313.1484763-1-imre.deak@intel.com
2022-08-15drm/i915/xelpd: Fix unclaimed accesses while loading PIPEDMC-C/DImre Deak
At the moment on DG2 at least loading the DMC firmware's PIPEDMC C and D programs leads to sporadic unclaimed register accesses while programming the initial state as described by the firmware's "MMIO init" table. This will also lead to later unclaimed accesses for unrelated transcoder/pipe registers backed by the pipe C and D display power wells. Disabling the PIPEDMC clock gating during initialization - similarly to Wa_16015201720 fixed this problem in my tests. While pipe A an B requires the clock gating to be disabled all the time pipe C and D requires this only while accessing the PIPEDMC registers. Bspec: 49193 References: https://gitlab.freedesktop.org/drm/intel/-/issues/6526 References: https://gitlab.freedesktop.org/drm/intel/-/issues/6308 Signed-off-by: Imre Deak <imre.deak@intel.com> Reviewed-by: Arun R Murthy <arun.r.murthy@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20220808103054.3586074-1-imre.deak@intel.com
2022-08-10drm/i915: Sanitycheck PCI BARsPiotr Piórkowski
For proper operation of i915 we need usable PCI GTTMMADDR BAR 0 (1 for GEN2). In most cases we also need usable PCI GFXMEM BAR 2. Let's add functions to check if BARs are set, and that it have a size greater than 0. In case GTTMMADDR BAR, let's validate at the beginning of i915 initialization. For other BARs, let's validate before first use. Signed-off-by: Piotr Piórkowski <piotr.piorkowski@intel.com> Cc: Jani Nikula <jani.nikula@linux.intel.com> Cc: Lucas De Marchi <lucas.demarchi@intel.com> Cc: Matt Roper <matthew.d.roper@intel.com> Reviewed-by: Jani Nikula <jani.nikula@intel.com> Signed-off-by: Jani Nikula <jani.nikula@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20220805155959.1983584-3-piotr.piorkowski@intel.com
2022-08-10drm/i915: Use of BARs names instead of numbersPiotr Piórkowski
At the moment, when we refer to some PCI BAR we use the number of this BAR in the code. The meaning of BARs between different platforms may be different. Therefore, in order to organize the code, let's start using defined names instead of numbers. v2: Add lost header in cfg_space.c Signed-off-by: Piotr Piórkowski <piotr.piorkowski@intel.com> Cc: Jani Nikula <jani.nikula@linux.intel.com> Cc: Lucas De Marchi <lucas.demarchi@intel.com> Cc: Matt Roper <matthew.d.roper@intel.com> Reviewed-by: Jani Nikula <jani.nikula@intel.com> Signed-off-by: Jani Nikula <jani.nikula@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20220805155959.1983584-2-piotr.piorkowski@intel.com
2022-08-10drm/i915/hdcp: replace BIT() with REG_BIT() in register definitionsJani Nikula
Registers contents are supposed to be defined using REG_BIT() to ensure they're u32 and the shift is within bounds. Signed-off-by: Jani Nikula <jani.nikula@intel.com> Reviewed-by: Arun R Murthy <arun.r.murthy@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/d28b9b9fef4f496bdaaad5503dd8e0027f167518.1659607033.git.jani.nikula@intel.com
2022-08-10drm/i915/hdcp: split out hdcp registers to a separate fileJani Nikula
Reduce the bloat of i915_reg.h. The registers are also only needed in a few places, no need to have them defined everywhere. Signed-off-by: Jani Nikula <jani.nikula@intel.com> Reviewed-by: Arun R Murthy <arun.r.murthy@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/ce8334342e8bdf92c17c714aa13574e66cad93bb.1659607033.git.jani.nikula@intel.com
2022-08-04Merge drm/drm-next into drm-intel-nextRodrigo Vivi
Sync up. In special to get the drm-intel-gt-next stuff. Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
2022-08-02drm/i915/dg2: Add support for DC5 stateAnusha Srivatsa
With the latest DMC in place, enabling DC5 on DG2. Cc: Imre Deak <imre.deak@intel.com> Signed-off-by: Anusha Srivatsa <anusha.srivatsa@intel.com> Reviewed-by: Imre Deak <imre.deak@intel.com> Signed-off-by: Imre Deak <imre.deak@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20220728183641.55692-1-anusha.srivatsa@intel.com
2022-07-29drm/amd/display: Fix a compilation failure on PowerPC caused by FPU codeRodrigo Siqueira
We got a report from Stephen/Michael that the PowerPC build was failing with the following error: ld: drivers/gpu/drm/amd/display/dc/dml/display_mode_lib.o uses hard float, drivers/gpu/drm/amd/display/dc/dcn30/dcn30_optc.o uses soft float ld: failed to merge target specific data of file drivers/gpu/drm/amd/display/dc/dcn30/dcn30_optc.o This error happened because of the function optc3_set_vrr_m_const. This function expects a double as a parameter in a code that is not allowed to have FPU operations. After further investigation, it became clear that optc3_set_vrr_m_const was never invoked, so we can safely drop this function and fix the ld issue. Cc: Alex Deucher <alexander.deucher@amd.com> Cc: Melissa Wen <mwen@igalia.com> Reported-by: Stephen Rothwell <sfr@canb.auug.org.au> Reported-by: Michael Ellerman <mpe@ellerman.id.au> Tested-by: Michael Ellerman <mpe@ellerman.id.au> Acked-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2022-07-29drm/amdgpu: enable support for psp 13.0.4 blockXiaojian Du
This patch will enable support for psp 13.0.4 blcok. Signed-off-by: Xiaojian Du <Xiaojian.Du@amd.com> Reviewed-by: Tim Huang <Tim.Huang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2022-07-29drm/amdgpu: add files for PSP 13.0.4Xiaojian Du
This patch will add files for PSP 13.0.4. Signed-off-by: Xiaojian Du <Xiaojian.Du@amd.com> Reviewed-by: Tim Huang <Tim.Huang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2022-07-29drm/amdgpu: add header files for MP 13.0.4Xiaojian Du
This patch will add header files for MP 13.0.4. Signed-off-by: Xiaojian Du <Xiaojian.Du@amd.com> Reviewed-by: Tim Huang <Tim.Huang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2022-07-29drm/amdgpu: correct RLC_RLCS_BOOTLOAD_STATUS offset and indexYifan Zhang
This patch corrects RLC_RLCS_BOOTLOAD_STATUS offset and index for GC 11.0.1. Signed-off-by: Yifan Zhang <yifan1.zhang@amd.com> Reviewed-by: Tim Huang <Tim.Huang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2022-07-29drm/amdgpu: send msg to IMU for the front-door loadingXiaojian Du
This patch will make SMU send msg to IMU for the front-door loading, it is required by some ASICs. Signed-off-by: Yifan Zhang <yifan1.zhang@amd.com> Signed-off-by: Xiaojian Du <Xiaojian.Du@amd.com> Reviewed-by: Tim Huang <Tim.Huang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2022-07-29drm/amdkfd: use time_is_before_jiffies(a + b) to replace "jiffies - a > b"Yu Zhe
time_is_before_jiffies deals with timer wrapping correctly. Signed-off-by: Yu Zhe <yuzhe@nfschina.com> Signed-off-by: Felix Kuehling <Felix.Kuehling@amd.com> Reviewed-by: Felix Kuehling <Felix.Kuehling@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2022-07-28drm/amdgpu: fix hive reference leak when reflecting psp topology infoJonathan Kim
Hives that require psp topology info to be reflected will leak hive reference so fix it. Signed-off-by: Jonathan Kim <jonathan.kim@amd.com> Reviewed-by: Shaoyun Liu <shaoyun.liu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2022-07-28drm/amd/pm: enable GFX ULV feature support for SMU13.0.0Evan Quan
The feature is ready with latest firmwares. Signed-off-by: Evan Quan <evan.quan@amd.com> Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2022-07-28drm/amd/pm: update driver if header for SMU 13.0.0Evan Quan
And get the version bumped to 0x2C to match the latest PMFW. Signed-off-by: Evan Quan <evan.quan@amd.com> Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2022-07-28drm/amdgpu: move mes self test after drm sched re-startedJack Xiao
mes self test rely on vm mapping, move it after drm sched re-started so that vm mapping can work during gpu reset. Signed-off-by: Jack Xiao <Jack.Xiao@amd.com> Acked-and-tested-by: Evan Quan <evan.quan@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2022-07-28drm/amdgpu: drop non-necessary call trace dumpEvan Quan
This extra call trace dump comes out in every gpu reset. And it gives people a wrong impression that something went wrong. Although actually there was not. Signed-off-by: Evan Quan <evan.quan@amd.com> Acked-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2022-07-28drm/amdgpu: enable VCN cg and JPEG cg/pgSonny Jiang
Not enable VCN pg because encode issue Signed-off-by: Sonny Jiang <sonny.jiang@amd.com> Reviewed-by: James Zhu <James.Zhu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2022-07-28drm/amdgpu: vcn_4_0_2 video codec querySonny Jiang
Enable support for vcn_4_0_2 video codec Signed-off-by: Sonny Jiang <sonny.jiang@amd.com> Reviewed-by: James Zhu <James.Zhu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2022-07-28drm/amdgpu: add VCN_4_0_2 firmware supportSonny Jiang
Add VCN_4_0_2 firmware support Signed-off-by: Sonny Jiang <sonny.jiang@amd.com> Reviewed-by: James Zhu <James.Zhu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2022-07-28drm/amdgpu: add VCN function in NBIO v7.7Sonny Jiang
Add function to support VCN_4_0_2 doorbell Signed-off-by: Sonny Jiang <sonny.jiang@amd.com> Reviewed-by: James Zhu <James.Zhu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2022-07-28drm/amdgpu: fix a vcn4 boot poll bug in emulation modeSonny Jiang
The return value should be set in vcn4 boot poll. Signed-off-by: Sonny Jiang <sonny.jiang@amd.com> Reviewed-by: James Zhu <James.Zhu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2022-07-28drm/amd/amdgpu: add memory training support for PSP_V13Chengming Gui
Add PSP_V13 memory training support funcs. v2: replace DRM_{DEBUG/ERROR} with dev_{dbg/err}. (Hawking) v3: fix checkpatch error (Alex) Signed-off-by: Chengming Gui <Jack.Gui@amd.com> Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2022-07-28drm/amdkfd: remove an unnecessary amdgpu_bo_refLang Yu
No need to reference the BO here, dmabuf framework will handle that. Signed-off-by: Lang Yu <Lang.Yu@amd.com> Reviewed-by: Felix Kuehling <Felix.Kuehling@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2022-07-28drm/amd/pm: Add get_gfx_off_status interface for yellow carpShikai Guo
add get_gfx_off_status interface to yellow_carp_ppt_funcs structure. Signed-off-by: Shikai Guo <shikai.guo@amd.com> Reviewed-by: Aaron Liu <aaron.liu@amd.com> Reviewed-by: Prike Liang <prike.liang@amd.com> Reviewed-by: Evan Quan <evan.quan@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2022-07-28drm/amd/display: Remove unused struct freesync_contextMaíra Canal
All references to struct freesync_context were removed, so remove the struct freesync_context itself and its entry on struct dc_stream_state. Reviewed-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com> Signed-off-by: Maíra Canal <mairacanal@riseup.net> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2022-07-28drm/amd/amdgpu: add additional page fault settings for gfx11Chengming Gui
Add three additional page fault settings. V2: move reg offset definition to header file. (Alex) V3: add all shift/mask definitions of used reg. (Hawking) Signed-off-by: Chengming Gui <Jack.Gui@amd.com> Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2022-07-28drm/amd/display: remove unneeded semicolonYang Li
Eliminate the following coccicheck warning: ./drivers/gpu/drm/amd/display/dc/dml/dcn20/dcn20_fpu.c:2344:67-68: Unneeded semicolon Reported-by: Abaci Robot <abaci@linux.alibaba.com> Reviewed-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com> Signed-off-by: Yang Li <yang.lee@linux.alibaba.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2022-07-28drm/amdgpu: fix i2s_pdata out of bound array accessVijendar Mukunda
Fixed following Smatch static checker warning: drivers/gpu/drm/amd/amdgpu/amdgpu_acp.c:393 acp_hw_init() error: buffer overflow 'i2s_pdata' 3 <= 3 drivers/gpu/drm/amd/amdgpu/amdgpu_acp.c:396 acp_hw_init() error: buffer overflow 'i2s_pdata' 3 <= 3 Fixes: 4c33e5179ff1 ("drm/amdgpu: create I2S platform devices for Jadeite platform") Reported-by: Dan Carpenter <dan.carpenter@oracle.com> Signed-off-by: Vijendar Mukunda <Vijendar.Mukunda@amd.com> Acked-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2022-07-28drm/amdkfd: fix kgd_mem memory leak when importing dmabufLang Yu
The kgd_mem memory allocated in amdgpu_amdkfd_gpuvm_import_dmabuf() is not freed properly. Explicitly free it in amdgpu_amdkfd_gpuvm_free_memory_of_gpu() under condition "mem->bo->kfd_bo != mem". Suggested-by: Felix Kuehling <Felix.Kuehling@amd.com> Signed-off-by: Lang Yu <Lang.Yu@amd.com> Reviewed-by: Felix Kuehling <Felix.Kuehling@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2022-07-28drm/amdgpu: add debugfs for kfd system and ttm mem usedAlex Sierra
This keeps track of kfd system mem used and kfd ttm mem used. Signed-off-by: Alex Sierra <alex.sierra@amd.com> Reviewed-by: Philip Yang <Philip.Yang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
generated by cgit (git 2.34.1) at 2025-04-23 16:11:21 +0000