summaryrefslogtreecommitdiff
path: root/drivers/i2c
AgeCommit message (Collapse)Author
2017-10-30i2c: gpio: Enforce open drain through gpiolibLinus Walleij
The I2C GPIO bitbang driver currently emulates open drain behaviour by implementing what the gpiolib already does: not actively driving the line high, instead setting it to input. This makes no sense. Use the new facility in gpiolib to request the lines enforced into open drain mode, and let the open drain emulation already present in the gpiolib kick in and handle this. As a bonus: if the GPIO driver in the back-end actually supports open drain in hardware using the .set_config() callback, it will be utilized. That's correct: we never used that hardware feature before, instead relying on emulating open drain even if the GPIO controller could actually handle this for us. Users will sometimes get messages like this: gpio-485 (?): enforced open drain please flag it properly in DT/ACPI DSDT/board file gpio-486 (?): enforced open drain please flag it properly in DT/ACPI DSDT/board file i2c-gpio gpio-i2c: using lines 485 (SDA) and 486 (SCL) Which is completely proper: since the line is used as open drain, it should actually be flagged properly with e.g. gpios = <&gpio0 5 (GPIO_ACTIVE_HIGH|GPIO_OPEN_DRAIN)>, <&gpio0 6 (GPIO_ACTIVE_HIGH|GPIO_OPEN_DRAIN)>; Or similar facilities in board file descriptor tables or ACPI DSDT. Tested-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2017-10-30i2c: gpio: Convert to use descriptorsLinus Walleij
This converts the GPIO-based I2C-driver to using GPIO descriptors instead of the old global numberspace-based GPIO interface. We: - Convert the driver to unconditionally grab two GPIOs from the device by index 0 (SDA) and 1 (SCL) which will work fine with device tree and descriptor tables. The existing device trees will continue to work just like before, but without any roundtrip through the global numberspace. - Brutally convert all boardfiles still passing global GPIOs by registering descriptor tables associated with the devices instead so this driver does not need to keep supporting passing any GPIO numbers as platform data. There is no stepwise approach as elegant as this, I strongly prefer this big hammer over any antsteps for this conversion. This way the old GPIO numbers go away and NEVER COME BACK. Special conversion for the different boards utilizing I2C-GPIO: - EP93xx (arch/arm/mach-ep93xx): pretty straight forward as all boards were using the same two GPIO lines, just define these two in a lookup table for "i2c-gpio" and register these along with the device. None of them define any other platform data so just pass NULL as platform data. This platform selects GPIOLIB so all should be smooth. The pins appear on a gpiochip for bank "G" as pins 1 (SDA) and 0 (SCL). - IXP4 (arch/arm/mach-ixp4): descriptor tables have to be registered for each board separately. They all use "IXP4XX_GPIO_CHIP" so it is pretty straight forward. Most board define no other platform data than SCL/SDA so they can drop the #include of <linux/i2c-gpio.h> and assign NULL to platform data. The "goramo_mlr" (Goramo Multilink Router) board is a bit worrisome: it implements its own I2C bit-banging in the board file, and optionally registers an I2C serial port, but claims the same GPIO lines for itself in the board file. This is not going to work: there will be competition for the GPIO lines, so delete the optional extra I2C bus instead, no I2C devices are registered on it anyway, there are just hints that it may contain an EEPROM that may be accessed from userspace. This needs to be fixed up properly by the serial clock using I2C emulation so drop a note in the code. - KS8695 board acs5k (arch/arm/mach-ks8695/board-acs5.c) has some platform data in addition to the pins so it needs to be kept around sans GPIO lines. Its GPIO chip is named "KS8695" and the arch selects GPIOLIB. - PXA boards (arch/arm/mach-pxa/*) use some of the platform data so it needs to be preserved here. The viper board even registers two GPIO I2Cs. The gpiochip is named "gpio-pxa" and the arch selects GPIOLIB. - SA1100 Simpad (arch/arm/mach-sa1100/simpad.c) defines a GPIO I2C bus, and the arch selects GPIOLIB. - Blackfin boards (arch/blackfin/bf533 etc) for these I assume their I2C GPIOs refer to the local gpiochip defined in arch/blackfin/kernel/bfin_gpio.c names "BFIN-GPIO". The arch selects GPIOLIB. The boards get spiked with IF_ENABLED(I2C_GPIO) but that is a side effect of it being like that already (I would just have Kconfig select I2C_GPIO and get rid of them all.) I also delete any platform data set to 0 as it will get that value anyway from static declartions of platform data. - The MIPS selects GPIOLIB and the Alchemy machine is using two local GPIO chips, one of them has a GPIO I2C. We need to adjust the local offset from the global number space here. The ATH79 has a proper GPIO driver in drivers/gpio/gpio-ath79.c and AFAICT the chip is named "ath79-gpio" and the PB44 PCF857x expander spawns from this on GPIO 1 and 0. The latter board only use the platform data to specify pins so it can be cut altogether after this. - The MFD Silicon Motion SM501 is a special case. It dynamically spawns an I2C bus off the MFD using sm501_create_subdev(). We use an approach to dynamically create a machine descriptor table and attach this to the "SM501-LOW" or "SM501-HIGH" gpiochip. We use chip-local offsets to grab the right lines. We can get rid of two local static inline helpers as part of this refactoring. Cc: Steven Miao <realmz6@gmail.com> Cc: Ralf Baechle <ralf@linux-mips.org> Cc: Guenter Roeck <linux@roeck-us.net> Cc: Ville Syrjälä <ville.syrjala@linux.intel.com> Cc: Magnus Damm <magnus.damm@gmail.com> Cc: Ben Dooks <ben.dooks@codethink.co.uk> Cc: Heiko Schocher <hs@denx.de> Acked-by: Wu, Aaron <Aaron.Wu@analog.com> Acked-by: Olof Johansson <olof@lixom.net> Acked-by: Lee Jones <lee.jones@linaro.org> Acked-by: Ralf Baechle <ralf@linux-mips.org> Tested-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2017-09-14i2c: i2c-stm32f7: add driverPierre-Yves MORDRET
This patch adds initial support for the STM32F7 I2C controller. Signed-off-by: M'boumba Cedric Madianga <cedric.madianga@gmail.com> Signed-off-by: Pierre-Yves MORDRET <pierre-yves.mordret@st.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
2017-09-14i2c: i2c-stm32f4: use generic definition of speed enumPierre-Yves MORDRET
This patch uses a more generic definition of speed enum for i2c-stm32f4 driver. Signed-off-by: M'boumba Cedric Madianga <cedric.madianga@gmail.com> Signed-off-by: Pierre-Yves MORDRET <pierre-yves.mordret@st.com> Reviewed-by: Ludovic BARRE <ludovic.barre@st.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
2017-09-13i2c: altera: Add Altera I2C Controller driverThor Thayer
Add driver support for the Altera I2C Controller. The I2C controller is soft IP for use in FPGAs. Signed-off-by: Thor Thayer <thor.thayer@linux.intel.com> Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
2017-09-09Merge branch 'i2c/for-4.14' of ↵Linus Torvalds
git://git.kernel.org/pub/scm/linux/kernel/git/wsa/linux Pull i2c updates from Wolfram Sang: - new drivers for Spreadtrum I2C, Intel Cherry Trail Whiskey Cove SMBUS - quite some driver updates - cleanups for the i2c-mux subsystem - some subsystem-wide constification - further cleanup of include/linux/i2c * 'i2c/for-4.14' of git://git.kernel.org/pub/scm/linux/kernel/git/wsa/linux: (50 commits) i2c: sprd: Fix undefined reference errors i2c: nomadik: constify amba_id i2c: versatile: Make i2c_algo_bit_data const i2c: busses: make i2c_adapter_quirks const i2c: busses: make i2c_adapter const i2c: busses: make i2c_algorithm const i2c: Add Spreadtrum I2C controller driver dt-bindings: i2c: Add Spreadtrum I2C controller documentation i2c-cht-wc: make cht_wc_i2c_adap_driver static MAINTAINERS: Add entry for drivers/i2c/busses/i2c-cht-wc.c i2c: aspeed: Retain delay/setup/hold values when configuring bus frequency dt-bindings: i2c: eeprom: Document vendor to be used and deprecated ones i2c: i801: Restore the presence state of P2SB PCI device after reading BAR MAINTAINERS: drop entry for Blackfin I2C and Sonic's email blackfin: merge the two TWI header files i2c: davinci: Preserve return value of devm_clk_get i2c: mediatek: Add i2c compatible for MediaTek MT7622 dt-bindings: i2c: Add MediaTek MT7622 i2c binding dt-bindings: i2c: modify information formats i2c: mux: i2c-arb-gpio-challenge: allow compiling w/o OF support ...
2017-08-31i2c: sprd: Fix undefined reference errorsBaolin Wang
Since the i2c driver of Spreadtrum can not be build as one module, thus it should depend on CONFIG_I2C is build in. Signed-off-by: Baolin Wang <baolin.wang@spreadtrum.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
2017-08-31i2c: designware: Round down ACPI provided clk to nearest supported clkHans de Goede
The Lenovo Miix2 8 DSDT contains an i2c clk / bus speed of 1700000 Hz for one if its devices, which is not supported. This is the second DSDT to show up with an unsupported clk in a short time, remove the hardcoded fix for DSDTs with a 1 MiHz clock and simply always round down the clk to the nearest supported value. Reported-by: russianneuromancer@ya.ru Fixes: 682c6c2188 ("i2c: designware: Some broken DSTDs use 1MiHz ...") Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Jarkko Nikula <jarkko.nikula@linux.intel.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
2017-08-29i2c: nomadik: constify amba_idArvind Yadav
amba_id are not supposed to change at runtime. All functions working with const amba_id. So mark the non-const structs as const. Signed-off-by: Arvind Yadav <arvind.yadav.cs@gmail.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
2017-08-29i2c: versatile: Make i2c_algo_bit_data constBhumika Goyal
Make this const as it is only used in a copy operation. Done using Coccinelle. Signed-off-by: Bhumika Goyal <bhumirks@gmail.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
2017-08-29i2c: busses: make i2c_adapter_quirks constBhumika Goyal
Make these const as they are only stored as a reference in the quirks field of an i2c_adapter structure, which is const. Done using Coccinelle. Signed-off-by: Bhumika Goyal <bhumirks@gmail.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
2017-08-29i2c: busses: make i2c_adapter constBhumika Goyal
Make these const as they are only used in a copy operation. Done using Coccinelle. Signed-off-by: Bhumika Goyal <bhumirks@gmail.com> Acked-by: David Daney <david.daney@cavium.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
2017-08-29i2c: busses: make i2c_algorithm constBhumika Goyal
Make these const as they are only stored in the algo field of i2c_adapter structure, which is const. Signed-off-by: Bhumika Goyal <bhumirks@gmail.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
2017-08-29i2c: ismt: Return EMSGSIZE for block reads with bogus lengthStephen Douthit
Compare the number of bytes actually seen on the wire to the byte count field returned by the slave device. Previously we just overwrote the byte count returned by the slave with the real byte count and let the caller figure out if the message was sane. Signed-off-by: Stephen Douthit <stephend@adiengineering.com> Tested-by: Dan Priamo <danp@adiengineering.com> Acked-by: Neil Horman <nhorman@tuxdriver.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de> Cc: stable@kernel.org
2017-08-29i2c: ismt: Don't duplicate the receive length for block readsStephen Douthit
According to Table 15-14 of the C2000 EDS (Intel doc #510524) the rx data pointed to by the descriptor dptr contains the byte count. desc->rxbytes reports all bytes read on the wire, including the "byte count" byte. So if a device sends 4 bytes in response to a block read, on the wire and in the DMA buffer we see: count data1 data2 data3 data4 0x04 0xde 0xad 0xbe 0xef That's what we want to return in data->block to the next level. Instead we were actually prefixing that with desc->rxbytes: bad count count data1 data2 data3 data4 0x05 0x04 0xde 0xad 0xbe 0xef This was discovered while developing a BMC solution relying on the ipmi_ssif.c driver which was trying to interpret the bogus length field as part of the IPMI response. Signed-off-by: Stephen Douthit <stephend@adiengineering.com> Tested-by: Dan Priamo <danp@adiengineering.com> Acked-by: Neil Horman <nhorman@tuxdriver.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de> Cc: stable@kernel.org
2017-08-29i2c: Add Spreadtrum I2C controller driverBaolin Wang
This patch adds the I2C controller driver for Spreadtrum SC9860 platform. Signed-off-by: Baolin Wang <baolin.wang@spreadtrum.com> Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
2017-08-29i2c-cht-wc: make cht_wc_i2c_adap_driver staticColin Ian King
The structure cht_wc_i2c_adap_driver is local to the source and does not need to be in global scope, so make it static. Cleans up sparse warning: symbol 'cht_wc_i2c_adap_driver' was not declared. Should it be static? Signed-off-by: Colin Ian King <colin.king@canonical.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
2017-08-28i2c: aspeed: Retain delay/setup/hold values when configuring bus frequencyAndrew Jeffery
In addition to the base, low and high clock configuration, the AC timing register #1 on the AST2400 houses fields controlling: 1. tBUF: Minimum delay between Stop and Start conditions 2. tHDSTA: Hold time for the Start condition 3. tACST: Setup time for Start and Stop conditions, and hold time for the Repeated Start condition These values are defined in hardware on the AST2500 and therefore don't need to be set. aspeed_i2c_init_clk() was performing a direct write of the generated clock values rather than a read/mask/modify/update sequence to retain tBUF, tHDSTA and tACST, and therefore cleared the tBUF, tHDSTA and tACST fields on the AST2400. This resulted in a delay/setup/hold time of 1 base clock, which in some configurations is not enough for some devices (e.g. the MAX31785 fan controller, with an APB of 48MHz and a desired bus speed of 100kHz). Signed-off-by: Andrew Jeffery <andrew@aj.id.au> Reviewed-by: Brendan Higgins <brendanhiggins@google.com> Tested-by: Brendan Higgins <brendanhiggins@google.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
2017-08-28i2c: i801: Restore the presence state of P2SB PCI device after reading BARQiuxu Zhuo
Sun, Yunying reported the following failure on Denverton micro-server: EDAC DEBUG: pnd2_init: EDAC DEBUG: pnd2_probe: EDAC DEBUG: dnv_rd_reg: Read b_cr_tolud_pci=00000000_80000000 EDAC DEBUG: dnv_rd_reg: Read b_cr_touud_lo_pci=00000000_80000000 EDAC DEBUG: dnv_rd_reg: Read b_cr_touud_hi_pci=00000000_00000004 EDAC DEBUG: dnv_rd_reg: Read b_cr_asym_mem_region0_mchbar=00000000_00000000 EDAC DEBUG: dnv_rd_reg: Read b_cr_asym_mem_region1_mchbar=00000000_00000000 EDAC DEBUG: dnv_rd_reg: Read b_cr_mot_out_base_mchbar=00000000_00000000 EDAC DEBUG: dnv_rd_reg: Read b_cr_mot_out_mask_mchbar=00000000_00000000 EDAC pnd2: Failed to register device with error -19. On Denverton micro-server, the presence of the P2SB bridge PCI device is enabled or disabled by the item 'RelaxSecConf' in BIOS setup menu. When 'RelaxSecConf' is enabled, the P2SB PCI device is present and the pnd2_edac EDAC driver also uses it to get BAR. Hiding the P2SB PCI device caused the pnd2_edac EDAC driver failed to get BAR then reported the above failure. Therefor, store the presence state of P2SB PCI device before unhiding it for reading BAR and restore the presence state after reading BAR. Signed-off-by: Qiuxu Zhuo <qiuxu.zhuo@intel.com> Reported-by: Yunying Sun <yunying.sun@intel.com> Tested-by: Yunying Sun <yunying.sun@intel.com> Reviewed-by: Mika Westerberg <mika.westerberg@linux.intel.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
2017-08-27blackfin: merge the two TWI header filesWolfram Sang
There seems to be no need for separate ones since all users include both files anyhow. Merge them because include/linux/i2c is to be deprecated. Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
2017-08-27i2c: davinci: Preserve return value of devm_clk_getFranklin S Cooper Jr
The i2c driver can run into driver dependency issues if its loaded before a clock driver it depends on. Therefore, EPROBE_DEFER may be returned by devm_clk_get and should be returned in probe to allow the kernel to reprobe the driver at a later time. This patch allows the error value returned by devm_clk_get to be passed through and not overwritten. Signed-off-by: Franklin S Cooper Jr <fcooper@ti.com> Reviewed-by: Grygorii Strashko <grygorii.strashko@ti.com> Acked-by: Sekhar Nori <nsekhar@ti.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
2017-08-27i2c: mediatek: Add i2c compatible for MediaTek MT7622Jun Gao
Add i2c compatible for MT7622. Compare to MT8173 i2c controller, MT7622 limits message numbers to 255, and does not support 4GB DMA mode. Signed-off-by: Jun Gao <jun.gao@mediatek.com> Reviewed-by: Yingjoe Chen <yingjoe.chen@mediatek.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
2017-08-27Merge branch 'i2c-mux/for-next' of https://github.com/peda-r/i2c-mux into ↵Wolfram Sang
i2c/for-4.14
2017-08-22i2c: mux: i2c-arb-gpio-challenge: allow compiling w/o OF supportPeter Rosin
It simplifies some tests. Signed-off-by: Peter Rosin <peda@axentia.se>
2017-08-17i2c-cht-wc: Workaround CHT GPIO controller IRQ issuesHans de Goede
The Cherry Trail Whiskey Cove PMIC's IRQ line is attached to one of the GPIOs of the Cherry Trail SoC. The CHT GPIO controller sometimes fails to deliver IRQs (seen when there is an IRQ storm on another pin). This commit works around this by reducing the long timeout which was a poor attempt to workaround this from 3s to 30ms and after that manually checking the status register for transfer completion by calling the threaded IRQ handler directly. This is safe todo as the entire threaded IRQ handler is protected by a mutex. Note 30ms should be more then long enough, at 100KHz any smbus single byte transaction should be finished in 4ms. Signed-off-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
2017-08-17i2c-cht-wc: Ack read irqs after reading the data registerHans de Goede
Testing has shown that writing 1 to clear the read-complete irq does not work until the data register has been read first. This commit fixes the driver to read the data register first, halving the amount of interrupts in most cases since we mostly read on this i2c bus. Signed-off-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
2017-08-17i2c-cht-wc: Add locking to interrupt / smbus_xfer functionsHans de Goede
Although unlikely without locking the smbux_xfer function may miss the nack flag and further fixes in this patch-set add some more complex constructions which need protection. Signed-off-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
2017-08-17i2c: sh_mobile: avoid unused ret variableEugeniu Rosca
Fix smatch warning: drivers/i2c/busses/i2c-sh_mobile.c:564 \ sh_mobile_i2c_request_dma_chan() warn: unused return: ret = PTR_ERR() Signed-off-by: Eugeniu Rosca <erosca@de.adit-jv.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
2017-08-17i2c: rcar: avoid unused ret variableEugeniu Rosca
Fix smatch warning: drivers/i2c/busses/i2c-rcar.c:628 \ rcar_i2c_request_dma_chan() warn: unused return: ret = PTR_ERR() Signed-off-by: Eugeniu Rosca <erosca@de.adit-jv.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
2017-08-17i2c: designware: Fix runtime PM for I2C slave modeJarkko Nikula
I2C slave controller must be powered and active all the time when I2C slave backend is registered in order to let master address and communicate with us. Now if the controller is runtime PM capable it will be suspended after probe and cannot ever respond to the master or generate interrupts. Fix this by resuming the controller when I2C slave backend is registered and let it suspend after unregistering. Signed-off-by: Jarkko Nikula <jarkko.nikula@linux.intel.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
2017-08-17i2c: designware: Remove needless pm_runtime_put_noidle() callJarkko Nikula
I guess pm_runtime_put_noidle() call in i2c_dw_probe_slave() was copied by accident from similar master mode adapter registration code. It is unbalanced due missing pm_runtime_get_noresume() but harmless since it doesn't decrease dev->power.usage_count below zero. In theory we can hit similar needless runtime suspend/resume cycle during slave mode adapter registration that was happening when registering the master mode adapter. See commit cd998ded5c12 ("i2c: designware: Prevent runtime suspend during adapter registration"). However, since we are slave, we can consider it as a wrong configuration if we have other slaves attached under this adapter and can omit the pm_runtime_get_noresume()/pm_runtime_put_noidle() calls for simplicity. Signed-off-by: Jarkko Nikula <jarkko.nikula@linux.intel.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
2017-08-17i2c: taos-evm: constify serio_device_idArvind Yadav
serio_device_id are not supposed to change at runtime. All functions working with serio_device_id provided by <linux/serio.h> work with const serio_device_id. So mark the non-const structs as const. Signed-off-by: Arvind Yadav <arvind.yadav.cs@gmail.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
2017-08-17i2c: mux: pinctrl: potential NULL dereference on errorDan Carpenter
If i2c_mux_alloc() fails then we'd have a NULL dereference here. Fixes: c4aee3e1b0de ("i2c: mux: pinctrl: remove platform_data") Signed-off-by: Dan Carpenter <dan.carpenter@oracle.com> Signed-off-by: Peter Rosin <peda@axentia.se>
2017-08-14i2c: aspeed: fixed potential null pointer dereferenceBrendan Higgins
Before I skipped null checks when the master is in the STOP state; this fixes that. Signed-off-by: Brendan Higgins <brendanhiggins@google.com> Acked-by: Joel Stanley <joel@jms.id.au> Signed-off-by: Wolfram Sang <wsa@the-dreams.de> Fixes: f327c686d3ba ("i2c: aspeed: added driver for Aspeed I2C")
2017-08-14i2c: aspeed: add proper support fo 24xx clock paramsBrendan Higgins
24xx BMCs have larger clock divider granularity which can cause problems when trying to set them as 25xx clock dividers; this adds clock setting code specific to 24xx. This also fixes a potential issue where clock dividers were rounded down instead of up. Signed-off-by: Brendan Higgins <brendanhiggins@google.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
2017-08-14i2c: tegra: explicitly request exclusive reset controlPhilipp Zabel
Commit a53e35db70d1 ("reset: Ensure drivers are explicit when requesting reset lines") started to transition the reset control request API calls to explicitly state whether the driver needs exclusive or shared reset control behavior. Convert all drivers requesting exclusive resets to the explicit API call so the temporary transition helpers can be removed. No functional changes. Cc: Laxman Dewangan <ldewangan@nvidia.com> Cc: Wolfram Sang <wsa@the-dreams.de> Cc: Thierry Reding <thierry.reding@gmail.com> Cc: Jonathan Hunter <jonathanh@nvidia.com> Cc: linux-i2c@vger.kernel.org Cc: linux-tegra@vger.kernel.org Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
2017-08-14i2c: sun6i-pw2i: explicitly request exclusive reset controlPhilipp Zabel
Commit a53e35db70d1 ("reset: Ensure drivers are explicit when requesting reset lines") started to transition the reset control request API calls to explicitly state whether the driver needs exclusive or shared reset control behavior. Convert all drivers requesting exclusive resets to the explicit API call so the temporary transition helpers can be removed. No functional changes. Cc: Wolfram Sang <wsa@the-dreams.de> Cc: Maxime Ripard <maxime.ripard@free-electrons.com> Cc: Chen-Yu Tsai <wens@csie.org> Cc: linux-i2c@vger.kernel.org Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
2017-08-14i2c: stm32f4: explicitly request exclusive reset controlPhilipp Zabel
Commit a53e35db70d1 ("reset: Ensure drivers are explicit when requesting reset lines") started to transition the reset control request API calls to explicitly state whether the driver needs exclusive or shared reset control behavior. Convert all drivers requesting exclusive resets to the explicit API call so the temporary transition helpers can be removed. No functional changes. Cc: Wolfram Sang <wsa@the-dreams.de> Cc: Maxime Coquelin <mcoquelin.stm32@gmail.com> Cc: Alexandre Torgue <alexandre.torgue@st.com> Cc: linux-i2c@vger.kernel.org Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
2017-08-14i2c: mv64xxx: explicitly request exclusive reset controlPhilipp Zabel
Commit a53e35db70d1 ("reset: Ensure drivers are explicit when requesting reset lines") started to transition the reset control request API calls to explicitly state whether the driver needs exclusive or shared reset control behavior. Convert all drivers requesting exclusive resets to the explicit API call so the temporary transition helpers can be removed. No functional changes. Cc: Wolfram Sang <wsa@the-dreams.de> Cc: linux-i2c@vger.kernel.org Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
2017-08-14i2c: simtec: use release_mem_region instead of release_resourceAnton Vasilyev
Use api pair of request_mem_region and release_mem_region instead of release_resource. Found by Linux Driver Verification project (linuxtesting.org). Signed-off-by: Anton Vasilyev <vasilyev@ispras.ru> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
2017-08-14i2c: core: Make comment about I2C table requirement to reflect the codeJavier Martinez Canillas
I2C drivers were required to have an I2C device ID table even if were for devices that would only be registered using a specific firmware interface (e.g: OF or ACPI). But commit da10c06a044b ("i2c: Make I2C ID tables non-mandatory for DT'ed devices") changed the I2C core to relax the requirement and allow drivers to avoid defining this table. Unfortunately it only took into account drivers for OF-only devices and forgot about ACPI-only ones, and this was fixed by commit c64ffff7a9d1 ("i2c: core: Allow empty id_table in ACPI case as well"). But the latter didn't update the original comment, so it doesn't reflect what the code does now. Signed-off-by: Javier Martinez Canillas <javierm@redhat.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
2017-08-14i2c: designware: Fix standard mode speed when configuring the slave modeJarkko Nikula
Code sets bit DW_IC_CON_SPEED_FAST (0x4) always when configuring the slave mode. This results incorrect register value DW_IC_CON_SPEED_HIGH (0x6) when OR'ed together with DW_IC_CON_SPEED_STD (0x2). Remove this and let the code set the speed mode bits according to clock frequency or default to fast mode. Signed-off-by: Jarkko Nikula <jarkko.nikula@linux.intel.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
2017-08-14i2c: designware: Fix oops from i2c_dw_irq_handler_slaveJarkko Nikula
When i2c-designware is initialized in slave mode the i2c-designware-slave.c: i2c_dw_irq_handler_slave() can hit a NULL pointer dereference when I2C slave backend is not registered but code is accessing the struct dw_i2c_dev.slave without testing is it NULL. We might get spurious interrupts from other devices or from IRQ core during unloading the driver when CONFIG_DEBUG_SHIRQ is set. Existing check for enable and IRQ status is not enough since device can be power gated and those bits may read 1. Fix this by handling the interrupt only when also struct dw_i2c_dev.slave is set. Signed-off-by: Jarkko Nikula <jarkko.nikula@linux.intel.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
2017-08-14i2c: designware: Fix system suspendUlf Hansson
The commit 8503ff166504 ("i2c: designware: Avoid unnecessary resuming during system suspend"), may suggest to the PM core to try out the so called direct_complete path for system sleep. In this path, the PM core treats a runtime suspended device as it's already in a proper low power state for system sleep, which makes it skip calling the system sleep callbacks for the device, except for the ->prepare() and the ->complete() callbacks. However, the PM core may unset the direct_complete flag for a parent device, in case its child device are being system suspended before. In this scenario, the PM core invokes the system sleep callbacks, no matter if the device is runtime suspended or not. Particularly in cases of an existing i2c slave device, the above path is triggered, which breaks the assumption that the i2c device is always runtime resumed whenever the dw_i2c_plat_suspend() is being called. More precisely, dw_i2c_plat_suspend() calls clk_core_disable() and clk_core_unprepare(), for an already disabled/unprepared clock, leading to a splat in the log about clocks calls being wrongly balanced and breaking system sleep. To still allow the direct_complete path in cases when it's possible, but also to keep the fix simple, let's runtime resume the i2c device in the ->suspend() callback, before continuing to put the device into low power state. Note, in cases when the i2c device is attached to the ACPI PM domain, this problem doesn't occur, because ACPI's ->suspend() callback, assigned to acpi_subsys_suspend(), already calls pm_runtime_resume() for the device. It should also be noted that this change does not fix commit 8503ff166504 ("i2c: designware: Avoid unnecessary resuming during system suspend"). Because for the non-ACPI case, the system sleep support was already broken prior that point. Cc: <stable@vger.kernel.org> # v4.4+ Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org> Acked-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com> Tested-by: John Stultz <john.stultz@linaro.org> Tested-by: Jarkko Nikula <jarkko.nikula@linux.intel.com> Acked-by: Jarkko Nikula <jarkko.nikula@linux.intel.com> Reviewed-by: Mika Westerberg <mika.westerberg@linux.intel.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
2017-08-14i2c: mux: pinctrl: drop the idle_state memberPeter Rosin
The information is available elsewhere. Reviewed-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Peter Rosin <peda@axentia.se>
2017-08-14i2c: mux: pinctrl: remove platform_dataPeter Rosin
No platform (at least no upstreamed platform) has ever used this platform_data. Just drop it and simplify the code. Reviewed-by: Stephen Warren <swarren@nvidia.com> Acked-by: Wolfram Sang <wsa@the-dreams.de> Signed-off-by: Peter Rosin <peda@axentia.se>
2017-08-14i2c: mux: mlxcpld: move header file out of I2C realmWolfram Sang
include/linux/i2c is not for client devices. Move the header file to a more appropriate location. Signed-off-by: Wolfram Sang <wsa@the-dreams.de> Signed-off-by: Peter Rosin <peda@axentia.se>
2017-08-14i2c: mux: pca954x: move header file out of I2C realmWolfram Sang
include/linux/i2c is not for client devices. Move the header file to a more appropriate location. Signed-off-by: Wolfram Sang <wsa@the-dreams.de> Signed-off-by: Peter Rosin <peda@axentia.se>
2017-08-14i2c: mux: pca9541: sort include filesWolfram Sang
Make it consistent with the other drivers. Signed-off-by: Wolfram Sang <wsa@the-dreams.de> Signed-off-by: Peter Rosin <peda@axentia.se>
2017-08-13i2c-cht-wc: Add Intel Cherry Trail Whiskey Cove SMBUS controller driverHans de Goede
The Intel Cherry Trail Whiskey Cove PMIC does not contain a builtin battery charger, instead boards with this PMIC use an external TI bq24292i charger IC, which is connected to a SMBUS controller built into the PMIC. This commit adds an i2c-bus driver for the PMIC's builtin SMBUS controller. The probe function for this i2c-bus will also register an i2c-client for the TI bq24292i charger after the i2c-bus has been registered. Note that several device-properties are set on the client-device to tell the bq24190 power-supply driver to integrate the Whiskey Cove PMIC and e.g. use the PMIC's BC1.2 detection (through extcon) to determine the maximum input current. Signed-off-by: Hans de Goede <hdegoede@redhat.com> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>