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2025-02-03iio: adc: ad7606: fix wrong scale availableAngelo Dureghello
Fix wrong scale available list since only one value is returned: ... iio:device1: ad7606b (buffer capable) 8 channels found: voltage0: (input, index: 0, format: le:S16/16>>0) 2 channel-specific attributes found: attr 0: scale value: 0.305176 attr 1: scale_available value: 0.076293 Fix as: voltage0: (input, index: 0, format: le:S16/16>>0) 2 channel-specific attributes found: attr 0: scale value: 0.305176 attr 1: scale_available value: 0.076293 0.152588 0.305176 Fixes: 97c6d857041d ("iio: adc: ad7606: rework scale-available to be static") Signed-off-by: Angelo Dureghello <adureghello@baylibre.com> Link: https://patch.msgid.link/20250129-wip-bl-ad7606_add_backend_sw_mode-v3-3-c3aec77c0ab7@baylibre.com Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
2025-02-03iio: adc: ad7192: fix channel selectMarkus Burri
Channel configuration doesn't work as expected. For FIELD_PREP the bit mask is needed and not the bit number. Fixes: 874bbd1219c7 ("iio: adc: ad7192: Use bitfield access macros") Signed-off-by: Markus Burri <markus.burri@mt.com> Reviewed-by: Nuno Sá <nuno.sa@analog.com> Link: https://patch.msgid.link/20250124150703.97848-1-markus.burri@mt.com Cc: <Stable@vger.kernel.org> Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
2025-02-03iio: adc: at91-sama5d2_adc: fix sama7g5 realbits valueNayab Sayed
The number of valid bits in SAMA7G5 ADC channel data register are 16. Hence changing the realbits value to 16 Fixes: 840bf6cb983f ("iio: adc: at91-sama5d2_adc: add support for sama7g5 device") Signed-off-by: Nayab Sayed <nayabbasha.sayed@microchip.com> Link: https://patch.msgid.link/20250115-fix-sama7g5-adc-realbits-v2-1-58a6e4087584@microchip.com Cc: <Stable@vger.kernel.org> Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
2025-02-03iio: adc: pac1921: Move ACPI_FREE() to cover all branchesVictor Duicu
This patch moves ACPI_FREE() in pac1921_match_acpi_device() in order to cover all branches. Reported-by: Andy Shevchenko <andy.shevchenko@gmail.com> Fixes: 9fdf1d033316 ("iio: adc: pac1921: Add ACPI support to Microchip pac1921") Acked-by: Matteo Martelli <matteomartelli3@gmail.com> Signed-off-by: Victor Duicu <victor.duicu@microchip.com> Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com> Link: https://patch.msgid.link/20250117065314.4431-1-victor.duicu@microchip.com Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
2025-01-16Merge tag 'iio-fixes-for-6.13b' of ↵Greg Kroah-Hartman
ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/jic23/iio into char-misc-next Merge from Jonathan: IIO: 2nd set of fixes for the 6.13 cycle. Given timing so late in cycle and that they are all confined to specific drivers, it is fine for these to go upstream early in the 6.14 cycle. hid-sensors - Handle processed attention channel rather than just returning an error. adi,ad3552r - Fix output ranges for ad3541r and ad3542r. - Clear the reset status flag so that we can pick up any resets during operation. adi,ad5791 - Fix a misleading dt binding example where the sense of the interrupt was reversed. adi,ad7606 - Fix some hard coded offsets that should be taking the number of channels on a particular part into account. These were missed due to some racing changes. ams,as73211 - Fix an off by one in optimized path for just reading the colour channels. bosch,bme680 - Fix type of variable passed as pointer, ensuring it works on big endian systems and doesn't expose uninitialized data. * tag 'iio-fixes-for-6.13b' of ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/jic23/iio: iio: dac: ad3552r-hs: clear reset status flag iio: dac: ad3552r-common: fix ad3541/2r ranges iio: chemical: bme680: Fix uninitialized variable in __bme680_read_raw() iio: light: as73211: fix channel handling in only-color triggered buffer dt-bindings: iio: dac: ad5791: ldac gpio is active low iio: hid-sensor-prox: Fix invalid read_raw for attention iio: adc: ad7606: Fix hardcoded offset in the ADC channels
2025-01-13Merge 6.13-rc4 into char-misc-nextGreg Kroah-Hartman
We need the IIO fixes in here as well, and it resolves a merge conflict in: drivers/iio/adc/ti-ads1119.c Reported-by: Stephen Rothwell <sfr@canb.auug.org.au> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2025-01-04iio: adc: ad7625: Add ending newlines to error messagesUwe Kleine-König
Error messages passed to dev_err_probe() are supposed to end in "\n". Fix accordingly. Fixes: b7ffd0fa65e9 ("iio: adc: ad7625: add driver") Signed-off-by: Uwe Kleine-König <u.kleine-koenig@baylibre.com> Tested-by: Trevor Gamblin <tgamblin@baylibre.com> Link: https://patch.msgid.link/20241230151030.3207529-2-u.kleine-koenig@baylibre.com Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
2024-12-28iio: adc: meson: simplify MESON_SAR_ADC_REG11 register accessMartin Blumenstingl
Simply check the max_register value to decide whether MESON_SAR_ADC_REG11 is present on the current IP revision. This allows dropping two additional bool fields from struct meson_sar_adc_param which previously had to be manually kept in sync. No functional changes intended. Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> Link: https://patch.msgid.link/20241224142941.97759-4-martin.blumenstingl@googlemail.com Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
2024-12-28iio: adc: meson: use tabs instead of spaces for some REG11 bit fieldsMartin Blumenstingl
This makes them consistent with the rest of the driver. No functional changes. Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> Link: https://patch.msgid.link/20241224142941.97759-3-martin.blumenstingl@googlemail.com Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
2024-12-28iio: adc: meson: fix voltage reference selection field name typoMartin Blumenstingl
The field should be called "vref_voltage", without a typo in the word voltage. No functional changes intended. Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> Link: https://patch.msgid.link/20241224142941.97759-2-martin.blumenstingl@googlemail.com Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
2024-12-28iio: adc: rockchip: correct alignment of timestampJonathan Cameron
I assume this device is only used on architectures where a 8 byte integer type is always 8 byte aligned. However, I would prefer IIO drivers to never make that assumption as the code gets copied into new drivers which are not so tightly couple to one driver and those can run on architectures that align these types to only 4 bytes in which case this structure may be 4 byte to small leading to a buffer overrun. Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Link: https://patch.msgid.link/20241215182912.481706-21-jic23@kernel.org Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
2024-12-28iio: adc: ti-lmp92064: Switch timestamp type from int64_t __aligned(8) to ↵Jonathan Cameron
aligned_s64 The vast majority of IIO drivers use aligned_s64 for the type of the timestamp field. It is not a bug to use int64_t and until this series iio_push_to_buffers_with_timestamp() took and int64_t timestamp, it is inconsistent. This change is to remove that inconsistency and ensure there is one obvious choice for future drivers. Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Link: https://patch.msgid.link/20241215182912.481706-17-jic23@kernel.org Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
2024-12-28iio: adc: Use aligned_s64 instead of open coding alignment.Jonathan Cameron
Use this new type to both slightly simplify the code and avoid confusing static analysis tools. Mostly this series is about consistency to avoid this code pattern getting copied into more drivers. Acked-by: Marcelo Schmitt <marcelo.schmitt1@gmail.com> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Link: https://patch.msgid.link/20241215182912.481706-14-jic23@kernel.org Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
2024-12-28io: adc: ina2xx-adc: Fix sign and use aligned_s64 for timestamp.Jonathan Cameron
Whilst it doesn't actually make any difference because the code that fills this field doesn't care, timestamps are all signed. Use the new aligned_s64 instead of open coding alignment to avoid confusing static analyzers and give slightly cleaner code. Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Link: https://patch.msgid.link/20241215182912.481706-3-jic23@kernel.org Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
2024-12-28iio: adc: ad7944: Fix sign and use aligned_s64 for timestamp.Jonathan Cameron
Whilst it doesn't actually make any difference because the code that fills this field doesn't care, timestamps are all signed. Use the new aligned_s64 instead of open coding alignment to avoid confusing static analyzers and give slightly cleaner code. Reviewed-by: David Lechner <dlechner@baylibre.com> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Link: https://patch.msgid.link/20241215182912.481706-2-jic23@kernel.org Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
2024-12-28iio: adc: max1363: Use a small fixed size buffer to replace dynamic allocationVasileios Amoiridis
Drop the recurrent allocation of the data buffer from the trigger handler and put it in the iio_priv(). This way, the maximum amount of channels is always allocated in favor of simpler code and drop of usage of the internal private variable "scan_timestamp" of the struct iio_dev. Signed-off-by: Vasileios Amoiridis <vassilisamir@gmail.com> Link: https://patch.msgid.link/20241214191421.94172-3-vassilisamir@gmail.com Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
2024-12-28iio: adc: dln2-adc: zero full struct instead of just the paddingVasileios Amoiridis
Drop a minor optimization of zeroing the padding between data and timestamp and zero the whole structure. This is done in favor of simpler code, and in order to drop the usage of the internal private variable "scan_timestamp" of the struct iio_dev. Signed-off-by: Vasileios Amoiridis <vassilisamir@gmail.com> Link: https://patch.msgid.link/20241214191421.94172-2-vassilisamir@gmail.com Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
2024-12-28iio: adc: ad_sigma_delta: Use `unsigned int` instead of plain `unsigned`Uwe Kleine-König
This fixes a checkpatch warning: WARNING: Prefer 'unsigned int' to bare use of 'unsigned' #70: FILE: drivers/iio/adc/ad_sigma_delta.c:253: + unsigned status_reg; Signed-off-by: Uwe Kleine-König <u.kleine-koenig@baylibre.com> Link: https://patch.msgid.link/20241218114809.1378063-2-u.kleine-koenig@baylibre.com Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
2024-12-20iio: adc: ad7606: Fix hardcoded offset in the ADC channelsGuillaume Stols
When introducing num_adc_channels, I overlooked some new functions created in a meanwhile that had also the hardcoded offset. This commit adds the new logic to these functions. Fixes: ef67f16e365c ("iio: adc: ad7606: Introduce num_adc_channels") Signed-off-by: Guillaume Stols <gstols@baylibre.com> Link: https://patch.msgid.link/20241210-ad7606_add_iio_backend_software_mode-v2-1-6619c3e50d81@baylibre.com Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
2024-12-11iio: adc: ad7173: add calibration supportGuillaume Ranquet
The ad7173 family of chips has up to four calibration modes. Internal zero scale: removes ADC core offset errors. Internal full scale: removes ADC core gain errors. System zero scale: reduces offset error to the order of channel noise. System full scale: reduces gain error to the order of channel noise. All voltage channels will undergo an internal zero/full scale calibration at bootup. System zero/full scale can be done after bootup using the newly created iio interface 'sys_calibration' and 'sys_calibration_mode' Signed-off-by: Guillaume Ranquet <granquet@baylibre.com> Link: https://patch.msgid.link/20241202-ad411x_calibration-v3-1-beb6aeec39e2@baylibre.com Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
2024-12-11iio: adc: ad4000: Add support for PulSAR devicesMarcelo Schmitt
The ADI PulSAR series of single-channel devices comprises differential and pseudo-differential ADCs that don't require any input data from the host controller. By not requiring a data input line, PulSAR devices can operate with a 3-wire only data bus in some setups. The AD4000 series and the single-channel PulSAR series of devices have similar SPI transfer specifications and wiring configurations. Single-channel PulSAR devices are slower than AD4000 and don't have a configuration register. That taken into account, single-channel PulSARs can be supported by the ad4000 driver without any increase in code complexity. Extend the AD4000 driver to also support single-channel PulSAR devices. Reviewed-by: David Lechner <dlechner@baylibre.com> Signed-off-by: Marcelo Schmitt <marcelo.schmitt@analog.com> Link: https://patch.msgid.link/2bfb904e29914c3dc4905e1c87fcc735575f330d.1733147444.git.marcelo.schmitt@analog.com Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
2024-12-11iio: adc: ad4000: Use device specific timing for SPI transfersMarcelo Schmitt
The SPI transfers for AD4020, AD4021, and AD4022 have slightly different timing specifications. Use device specific timing constraints to set SPI transfer parameters. While tweaking time constraints, remove time related defines including unused AD4000_TQUIET1_NS. Signed-off-by: Marcelo Schmitt <marcelo.schmitt@analog.com> Reviewed-by: David Lechner <dlechner@baylibre.com> Link: https://patch.msgid.link/a36fcf44cc00b2a498170e2ae3f005829d516266.1733147444.git.marcelo.schmitt@analog.com Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
2024-12-11iio: adc: ad4000: Add timestamp channelMarcelo Schmitt
The ADC data is pushed to the IIO buffer along with timestamp but no timestamp channel was provided to retried the time data. Add a timestamp channel to provide sample capture time. Suggested-by: David Lechner <dlechner@baylibre.com> Reviewed-by: David Lechner <dlechner@baylibre.com> Signed-off-by: Marcelo Schmitt <marcelo.schmitt@analog.com> Link: https://patch.msgid.link/d1f1bb1b726b90a3a7c1148c65d2f7fe073e2b15.1733147444.git.marcelo.schmitt@analog.com Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
2024-12-11iio: adc: ad7124: Implement temperature measurementUwe Kleine-König
If the maximal count of channels the driver supports isn't fully utilized, add an attribute providing the internal temperature. Signed-off-by: Uwe Kleine-König <u.kleine-koenig@baylibre.com> Link: https://patch.msgid.link/433211af8ac3f02dee58586ecb51d2e98246a095.1733504533.git.u.kleine-koenig@baylibre.com Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
2024-12-11iio: adc: ad7124: Add error reporting during probeUwe Kleine-König
A driver that silently fails to probe is annoying and hard to debug. So add messages in the error paths of the probe function. Signed-off-by: Uwe Kleine-König <u.kleine-koenig@baylibre.com> Link: https://patch.msgid.link/55e24392f1e4d5b9896f00a52a93c1c4b1feac43.1733504533.git.u.kleine-koenig@baylibre.com Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
2024-12-11iio: adc: ad_sigma_delta: Check for previous ready signalsUwe Kleine-König
It can happen if a previous conversion was aborted the ADC pulls down the R̅D̅Y̅ line but the event wasn't handled before. In that case enabling the irq might immediately fire (depending on the irq controller capabilities) and even with a rdy-gpio isn't identified as an unrelated one. To cure that problem check for a pending event before the measurement is started and clear it if needed. Signed-off-by: Uwe Kleine-König <u.kleine-koenig@baylibre.com> Link: https://patch.msgid.link/3ec6b61fb1e527e935133dc56f589aab4b2094a3.1733504533.git.u.kleine-koenig@baylibre.com Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
2024-12-11iio: adc: ad_sigma_delta: Store information about reset sequence lengthUwe Kleine-König
The various chips can be reset using a sequence of SPI transfers with MOSI = 1. The length of such a sequence varies from chip to chip. Store that length in struct ad_sigma_delta_info and replace the respective parameter to ad_sd_reset() with it. Note the ad7192 used to pass 48 as length but the documentation specifies 40 as the required length. Assuming the latter is right. (Using a too long sequence doesn't hurt apart from using a longer spi transfer than necessary, so this is no relevant fix.) The motivation for storing this information is that this is useful to clear a pending R̅D̅Y̅ signal in the next change. Signed-off-by: Uwe Kleine-König <u.kleine-koenig@baylibre.com> Link: https://patch.msgid.link/9750db62fce638bf140ff48172c23bff7f785e5b.1733504533.git.u.kleine-koenig@baylibre.com Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
2024-12-11iio: adc: ad_sigma_delta: Fix a race conditionUwe Kleine-König
The ad_sigma_delta driver helper uses irq_disable_nosync(). With that one it is possible that the irq handler still runs after the irq_disable_nosync() function call returns. Also to properly synchronize irq disabling in the different threads proper locking is needed and because it's unclear if the irq handler's irq_disable_nosync() call comes first or the one in the enabler's error path, all code locations that disable the irq must check for .irq_dis first to ensure there is exactly one disable call per enable call. So add a spinlock to the struct ad_sigma_delta and use it to synchronize irq enabling and disabling. Also only act in the irq handler if the irq is still enabled. Fixes: af3008485ea0 ("iio:adc: Add common code for ADI Sigma Delta devices") Signed-off-by: Uwe Kleine-König <u.kleine-koenig@baylibre.com> Link: https://patch.msgid.link/9e6def47e2e773e0e15b7a2c29d22629b53d91b1.1733504533.git.u.kleine-koenig@baylibre.com Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
2024-12-11iio: adc: ad_sigma_delta: Handle CS assertion as intended in ↵Uwe Kleine-König
ad_sd_read_reg_raw() When struct ad_sigma_delta::keep_cs_asserted was introduced only register writing was adapted to honor this new flag. Also respect it when reading a register. Fixes: df1d80aee963 ("iio: ad_sigma_delta: Properly handle SPI bus locking vs CS assertion") Reviewed-by: Trevor Gamblin <tgamblin@baylibre.com> Signed-off-by: Uwe Kleine-König <u.kleine-koenig@baylibre.com> Link: https://patch.msgid.link/8d76b4ea4a4363b269886c71193b840821c724ea.1733504533.git.u.kleine-koenig@baylibre.com Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
2024-12-11iio: adc: ad_sigma_delta: Add support for reading irq status using a GPIOUwe Kleine-König
Some of the ADCs by Analog signal their irq condition on the MISO line. So typically that line is connected to an SPI controller and a GPIO. The GPIO is used as input and the respective interrupt is enabled when the last SPI transfer is completed. Depending on the GPIO controller the toggling MISO line might make the interrupt pending even while it's masked. In that case the irq handler is called immediately after irq_enable() and so before the device actually pulls that line low which results in non-sense values being reported to the upper layers. The only way to find out if the line was actually pulled low is to read the GPIO. (There is a flag in AD7124's status register that also signals if an interrupt was asserted, but reading that register toggles the MISO line and so might trigger another spurious interrupt.) Add the possibility to specify an interrupt GPIO in the machine description in addition to the plain interrupt. This GPIO is used then to check if the irq line is actually active in the irq handler. Signed-off-by: Uwe Kleine-König <u.kleine-koenig@baylibre.com> Link: https://patch.msgid.link/5be9a4cc4dc600ec384c88db01dd661a21506b9c.1733504533.git.u.kleine-koenig@baylibre.com Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
2024-12-11iio: adc: ad7124: Refuse invalid input specifiersUwe Kleine-König
The ad7124-4 has 8 analog inputs; the input select values 8 to 15 are reserved and not to be used. These are fine for ad7124-8. For both ad7124-4 and ad7124-8 values bigger than 15 are internal channels that might appear as inputs in the channels specified in the device description according to the description of commit f1794fd7bdf7 ("iio: adc: ad7124: Remove input number limitation"), values bigger than 31 don't fit into the respective register bit field and the driver masked them to smaller values. Check for these invalid input specifiers and fail to probe if one is found. Fixes: f1794fd7bdf7 ("iio: adc: ad7124: Remove input number limitation") Signed-off-by: Uwe Kleine-König <u.kleine-koenig@baylibre.com> Link: https://patch.msgid.link/80e3bd629d2b755ab5e061c8731dafa57d08698a.1733504533.git.u.kleine-koenig@baylibre.com Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
2024-12-11iio: adc: ad7124: Don't create more channels than the driver can handleUwe Kleine-König
The ad7124-4 and ad7124-8 both support 16 channel registers and assigns each channel defined in dt statically such a register. While the driver could be a bit more clever about this, it currently isn't and specifying more than 16 channels yields broken behaviour. So just refuse to bind in this situation. Fixes: b3af341bbd96 ("iio: adc: Add ad7124 support") Signed-off-by: Uwe Kleine-König <u.kleine-koenig@baylibre.com> Link: https://patch.msgid.link/1b9a5a1d334e5501294f7f9f9d5893f1cdf1b0ec.1733504533.git.u.kleine-koenig@baylibre.com Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
2024-12-11iio: adc: rzg2l_adc: Add support for Renesas RZ/G3SClaudiu Beznea
Add ADC support for the Renesas RZ/G3S SoC. The key features of this IP include: - 9 channels, with one dedicated to reading the temperature reported by the Thermal Sensor Unit (TSU) - A different default ADCMP value, which is written to the ADM3 register. - Different default sampling rates - ADM3.ADSMP field is 8 bits wide - ADINT.INTEN field is 11 bits wide Signed-off-by: Claudiu Beznea <claudiu.beznea.uj@bp.renesas.com> Link: https://patch.msgid.link/20241206111337.726244-14-claudiu.beznea.uj@bp.renesas.com Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
2024-12-11iio: adc: rzg2l_adc: Add suspend/resume supportClaudiu Beznea
The Renesas RZ/G3S SoC features a power-saving mode where power to most of the SoC components is turned off, including the ADC IP. Suspend/resume support has been added to the rzg2l_adc driver to restore functionality after resuming from this power-saving mode. During suspend, the ADC resets are asserted, and the ADC is powered down. On resume, the ADC resets are de-asserted, the hardware is re-initialized, and the ADC power is restored using the runtime PM APIs. Signed-off-by: Claudiu Beznea <claudiu.beznea.uj@bp.renesas.com> Reviewed-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> Link: https://patch.msgid.link/20241206111337.726244-12-claudiu.beznea.uj@bp.renesas.com Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
2024-12-11iio: adc: rzg2l_adc: Add support for channel 8Claudiu Beznea
The ADC on the Renesas RZ/G3S SoC includes an additional channel (channel 8) dedicated to reading temperature values from the Thermal Sensor Unit (TSU). There is a direct in-SoC connection between the ADC and TSU IPs. To read the temperature reported by the TSU, a different sampling rate (compared to channels 0-7) must be configured in the ADM3 register. The rzg2l_adc driver has been updated to support reading the TSU temperature. Signed-off-by: Claudiu Beznea <claudiu.beznea.uj@bp.renesas.com> Reviewed-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> Link: https://patch.msgid.link/20241206111337.726244-11-claudiu.beznea.uj@bp.renesas.com Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
2024-12-11iio: adc: rzg2l_adc: Prepare for the addition of RZ/G3S supportClaudiu Beznea
The ADC IP available on the RZ/G3S differs slightly from the one found on the RZ/G2L. The identified differences are as follows: - different number of channels (one being used for temperature conversion); consequently, various registers differ - different default sampling periods - the RZ/G3S variant lacks the ADVIC register. To accommodate these differences, the rzg2l_adc driver has been updated by introducing the struct rzg2l_adc_hw_params, which encapsulates the hardware-specific differences between the IP variants. A pointer to an object of type struct rzg2l_adc_hw_params is embedded in struct rzg2l_adc_data. Additionally, the completion member of struct rzg2l_adc_data was relocated to avoid potential padding, if any. The code has been adjusted to utilize hardware-specific parameters stored in the new structure instead of relying on plain macros. The check of chan->channel in rzg2l_adc_read_raw() function, against the driver specific mask was removed as the subsystem should have already been done this before reaching the rzg2l_adc_read_raw() function. Along with it the local variable ch was dropped as chan->channel could be used instead. Signed-off-by: Claudiu Beznea <claudiu.beznea.uj@bp.renesas.com> Reviewed-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> Link: https://patch.msgid.link/20241206111337.726244-10-claudiu.beznea.uj@bp.renesas.com Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
2024-12-11iio: adc: rzg2l_adc: Enable runtime PM autosuspend supportClaudiu Beznea
Enable runtime PM autosuspend support for the rzg2l_adc driver. With this change, consecutive conversion requests will no longer cause the device to be runtime-enabled/disabled after each request. Instead, the device will transition based on the delay configured by the user. This approach reduces the frequency of hardware register access during runtime PM suspend/resume cycles, thereby saving CPU cycles. Signed-off-by: Claudiu Beznea <claudiu.beznea.uj@bp.renesas.com> Reviewed-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> Link: https://patch.msgid.link/20241206111337.726244-9-claudiu.beznea.uj@bp.renesas.com Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
2024-12-11iio: adc: rzg2l_adc: Simplify the locking scheme in rzg2l_adc_read_raw()Claudiu Beznea
Simplify the locking scheme in rzg2l_adc_read_raw() by using guard(mutex)(). Signed-off-by: Claudiu Beznea <claudiu.beznea.uj@bp.renesas.com> Reviewed-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> Link: https://patch.msgid.link/20241206111337.726244-8-claudiu.beznea.uj@bp.renesas.com Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
2024-12-11iio: adc: rzg2l_adc: Use read_poll_timeout()Claudiu Beznea
Replace the driver-specific implementation with the read_poll_timeout() function. This change simplifies the code and improves maintainability by leveraging the standardized helper. Signed-off-by: Claudiu Beznea <claudiu.beznea.uj@bp.renesas.com> Reviewed-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> Link: https://patch.msgid.link/20241206111337.726244-7-claudiu.beznea.uj@bp.renesas.com Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
2024-12-11iio: adc: rzg2l_adc: Switch to RUNTIME_PM_OPS() and pm_ptr()Claudiu Beznea
The use of SET_RUNTIME_PM_OPS() is now deprecated and requires __maybe_unused annotations to avoid warnings about unused functions. Switching to RUNTIME_PM_OPS() and pm_ptr() eliminates the need for such annotations because the compiler can directly reference the runtime PM functions, thereby suppressing the warnings. As a result, the __maybe_unused markings can be removed. Signed-off-by: Claudiu Beznea <claudiu.beznea.uj@bp.renesas.com> Reviewed-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> Link: https://patch.msgid.link/20241206111337.726244-6-claudiu.beznea.uj@bp.renesas.com Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
2024-12-11iio: adc: rzg2l_adc: Simplify the runtime PM codeClaudiu Beznea
All Renesas SoCs using the rzg2l_adc driver manage ADC clocks through PM domains. Calling pm_runtime_{resume_and_get, put_sync}() implicitly sets the state of the clocks. As a result, the code in the rzg2l_adc driver that explicitly manages ADC clocks can be removed, leading to simpler and cleaner implementation. Additionally, replace the use of rzg2l_adc_set_power() with direct PM runtime API calls to further simplify and clean up the code. Signed-off-by: Claudiu Beznea <claudiu.beznea.uj@bp.renesas.com> Reviewed-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> Link: https://patch.msgid.link/20241206111337.726244-5-claudiu.beznea.uj@bp.renesas.com Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
2024-12-11iio: adc: rzg2l_adc: Use devres helpers to request pre-deasserted reset controlsClaudiu Beznea
Starting with commit d872bed85036 ("reset: Add devres helpers to request pre-deasserted reset controls"), devres helpers are available to simplify the process of requesting pre-deasserted reset controls. Update the rzg2l_adc driver to utilize these helpers, reducing complexity in this way. Signed-off-by: Claudiu Beznea <claudiu.beznea.uj@bp.renesas.com> Reviewed-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> Link: https://patch.msgid.link/20241206111337.726244-4-claudiu.beznea.uj@bp.renesas.com Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
2024-12-11iio: adc: rzg2l_adc: Convert dev_err() to dev_err_probe()Claudiu Beznea
Convert all occurrences of dev_err() in the probe path to dev_err_probe(). This improves readability and simplifies the code. Signed-off-by: Claudiu Beznea <claudiu.beznea.uj@bp.renesas.com> Reviewed-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> Link: https://patch.msgid.link/20241206111337.726244-3-claudiu.beznea.uj@bp.renesas.com Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
2024-12-08iio: adc: ti-ads1119: fix sample size in scan struct for triggered bufferJavier Carrasco
This device returns signed, 16-bit samples as stated in its datasheet (see 8.5.2 Data Format). That is in line with the scan_type definition for the IIO_VOLTAGE channel, but 'unsigned int' is being used to read and push the data to userspace. Given that the size of that type depends on the architecture (at least 2 bytes to store values up to 65535, but its actual size is often 4 bytes), use the 's16' type to provide the same structure in all cases. Fixes: a9306887eba4 ("iio: adc: ti-ads1119: Add driver") Signed-off-by: Javier Carrasco <javier.carrasco.cruz@gmail.com> Reviewed-by: Francesco Dolcini <francesco.dolcini@toradex.com> Link: https://patch.msgid.link/20241202-ti-ads1119_s16_chan-v1-1-fafe3136dc90@gmail.com Cc: <Stable@vger.kernel.org> Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
2024-12-07iio: adc: ad9467: Fix the "don't allow reading vref if not available" caseChristophe JAILLET
The commit in Fixes adds a special case when only one possible scale is available. If several scales are available, it sets the .read_avail field of the struct iio_info to ad9467_read_avail(). However, this field already holds this function pointer, so the code is a no-op. Use another struct iio_info instead to actually reflect the intent described in the commit message. This way, the structure to use is selected at runtime and they can be kept as const. This is safer because modifying static structs that are shared between all instances like this, based on the properties of a single instance, is asking for trouble down the road. Fixes: b92f94f74826 ("iio: adc: ad9467: don't allow reading vref if not available") Signed-off-by: Christophe JAILLET <christophe.jaillet@wanadoo.fr> Link: https://patch.msgid.link/cc65da19e0578823d29e11996f86042e84d5715c.1733503146.git.christophe.jaillet@wanadoo.fr Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
2024-12-07iio: adc: vf610_adc: limit i.MX6SX's channel number to 4Frank Li
i.MX6SX only has 4 ADC channels, so limit channel numbers to 4 for compatible string 'fsl,imx6sx-adc'. Reviewed-by: Haibo Chen <haibo.chen@nxp.com> Signed-off-by: Frank Li <Frank.Li@nxp.com> Link: https://patch.msgid.link/20241126195256.2441622-2-Frank.Li@nxp.com Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
2024-12-07iio: adc: vf610_adc: use devm_* and dev_err_probe() to simple codeFrank Li
Use devm_* and dev_err_probe() simplify probe function and remove vf610_adc_remove(). Reviewed-by: Haibo Chen <haibo.chen@nxp.com> Signed-off-by: Frank Li <Frank.Li@nxp.com> Link: https://patch.msgid.link/20241126195256.2441622-1-Frank.Li@nxp.com Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
2024-12-07iio: adc: ad4695: move dt-bindings headerDavid Lechner
Move the dt-bindings header file to the include/dt-bindings/iio/adc/ directory. ad4695 is an ADC driver, so it should be in the adc/ subdirectory for better organization. Previously, it was in the iio/ subdirectory. Signed-off-by: David Lechner <dlechner@baylibre.com> Link: https://patch.msgid.link/20241113-iio-adc-ad4695-move-dt-bindings-header-v1-1-aba1f0f9b628@baylibre.com Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
2024-12-07iio: adc: pac1921: Add ACPI support to Microchip pac1921Victor Duicu
This patch implements ACPI support to Microchip pac1921. The driver can read the shunt resistor value and label from the ACPI table. Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com> Acked-by: Matteo Martelli <matteomartelli3@gmail.com> Signed-off-by: Victor Duicu <victor.duicu@microchip.com> Link: https://patch.msgid.link/20241115133436.13204-1-victor.duicu@microchip.com Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
2024-12-07iio: adc: at91: call input_free_device() on allocated iio_devJoe Hattori
Current implementation of at91_ts_register() calls input_free_deivce() on st->ts_input, however, the err label can be reached before the allocated iio_dev is stored to st->ts_input. Thus call input_free_device() on input instead of st->ts_input. Fixes: 84882b060301 ("iio: adc: at91_adc: Add support for touchscreens without TSMR") Signed-off-by: Joe Hattori <joe@pf.is.s.u-tokyo.ac.jp> Link: https://patch.msgid.link/20241207043045.1255409-1-joe@pf.is.s.u-tokyo.ac.jp Cc: <Stable@vger.kernel.org> Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
generated by cgit (git 2.34.1) at 2025-06-14 04:30:51 +0000