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path: root/drivers/mmc/host/sdhci-of-dwcmshc.c
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2021-03-30mmc: sdhci-of-dwcmshc: set MMC_CAP_WAIT_WHILE_BUSYJisheng Zhang
The host supports HW busy detection of the device busy signaling over dat0 line. Set MMC_CAP_wAIT_WHILE_BUSY host capability. Signed-off-by: Jisheng Zhang <Jisheng.Zhang@synaptics.com> Link: https://lore.kernel.org/r/20210324154703.69f97fde@xhacker.debian Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2021-03-30mmc: sdhci-of-dwcmshc: fix error return code in dwcmshc_probe()Wei Yongjun
Fix to return negative error code -ENOMEM from the error handling case instead of 0, as done elsewhere in this function. Fixes: c2c4da37837e ("mmc: sdhci-of-dwcmshc: add rockchip platform support") Reported-by: Hulk Robot <hulkci@huawei.com> Signed-off-by: Wei Yongjun <weiyongjun1@huawei.com> Link: https://lore.kernel.org/r/20210323112956.1016884-1-weiyongjun1@huawei.com Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2021-03-30mmc: sdhci-of-dwcmshc: add ACPI support for BlueField-3 SoCLiming Sun
This commit adds ACPI support in the sdhci-of-dwcmshc driver for BlueField-3 SoC. It has changes to only use the clock hierarchy for Deviec Tree since the clk is not supported by ACPI. Instead, ACPI can define 'clock-frequency' which is parsed by existing sdhci_get_property(). This clock value will be returned in function dwcmshc_get_max_clock(). Signed-off-by: Liming Sun <limings@nvidia.com> Reviewed-by: Khalil Blaiech <kblaiech@nvidia.com> Link: https://lore.kernel.org/r/1616453211-275165-1-git-send-email-limings@nvidia.com Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2021-03-30mmc: sdhci-of-dwcmshc: add rockchip platform supportShawn Lin
sdhci based synopsys MMC IP is also used on some rockchip platforms, so add a basic support here. Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com> Link: https://lore.kernel.org/r/1615879102-45919-3-git-send-email-shawn.lin@rock-chips.com Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2021-02-01mmc: sdhci-of-dwcmshc: set SDHCI_QUIRK2_PRESET_VALUE_BROKENJisheng Zhang
The SDHCI_PRESET_FOR_* registers are not set(all read as zeros), so set the quirk. Signed-off-by: Jisheng Zhang <Jisheng.Zhang@synaptics.com> Link: https://lore.kernel.org/r/20201210165510.76b917e5@xhacker.debian Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2021-01-11mmc: sdhci-of-dwcmshc: fix rpmb accessJisheng Zhang
Commit a44f7cb93732 ("mmc: core: use mrq->sbc when sending CMD23 for RPMB") began to use ACMD23 for RPMB if the host supports ACMD23. In RPMB ACM23 case, we need to set bit 31 to CMD23 argument, otherwise RPMB write operation will return general fail. However, no matter V4 is enabled or not, the dwcmshc's ARGUMENT2 register is 32-bit block count register which doesn't support stuff bits of CMD23 argument. So let's handle this specific ACMD23 case. From another side, this patch also prepare for future v4 enabling for dwcmshc, because from the 4.10 spec, the ARGUMENT2 register is redefined as 32bit block count which doesn't support stuff bits of CMD23 argument. Fixes: a44f7cb93732 ("mmc: core: use mrq->sbc when sending CMD23 for RPMB") Signed-off-by: Jisheng Zhang <Jisheng.Zhang@synaptics.com> Acked-by: Adrian Hunter <adrian.hunter@intel.com> Link: https://lore.kernel.org/r/20201229161625.38255233@xhacker.debian Cc: stable@vger.kernel.org Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2020-09-07mmc: Set PROBE_PREFER_ASYNCHRONOUS for drivers that existed in v4.19Douglas Anderson
This is like commit 3d3451124f3d ("mmc: sdhci-msm: Prefer asynchronous probe") but applied to a whole pile of drivers. This batch converts the drivers that appeared to be around in the v4.19 timeframe. Signed-off-by: Douglas Anderson <dianders@chromium.org> Link: https://lore.kernel.org/r/20200903162412.4.I84eb3e0a738635d524c90d1a688087bc295f7c32@changeid Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2020-05-28mmc: sdhci-of-dwcmshc: add suspend/resume supportJisheng Zhang
Add dwcmshc specific system-level suspend and resume support. Signed-off-by: Jisheng Zhang <Jisheng.Zhang@synaptics.com> Link: https://lore.kernel.org/r/20200515141926.52e088fe@xhacker.debian Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2020-05-28mmc: sdhci-of-dwcmshc: implement specific set_uhs_signalingJisheng Zhang
We need a different set_uhs_signaling implementation for MMC_TIMING_MMC_HS and MMC_TIMING_MMC_HS400. Signed-off-by: Jisheng Zhang <Jisheng.Zhang@synaptics.com> Link: https://lore.kernel.org/r/20200513182602.3636a551@xhacker.debian Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2018-10-08mmc: sdhci-of-dwcmshc: solve 128MB DMA boundary limitationJisheng Zhang
When using DMA, if the DMA addr spans 128MB boundary, we have to split the DMA transfer into two so that each one doesn't exceed the boundary. Signed-off-by: Jisheng Zhang <Jisheng.Zhang@synaptics.com> Acked-by: Adrian Hunter <adrian.hunter@intel.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2018-07-16mmc: sdhci-of-dwcmshc: add SDHCI OF Synopsys DWC MSHC driverJisheng Zhang
Add a driver for SDHCI OF Synopsys DesignWare Cores Mobile Storage Signed-off-by: Jisheng Zhang <Jisheng.Zhang@synaptics.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org> Acked-by: Adrian Hunter <adrian.hunter@intel.com>