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path: root/drivers/net/ethernet/chelsio/cxgb4/l2t.h
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2016-03-22cxgb4: move VLAN_NONE macro definitionVarun Prakash
move VLAN_NONE macro definition from l2t.c to l2t.h Signed-off-by: Varun Prakash <varun@chelsio.com> Acked-by: Hariprasad Shenai <hariprasad@chelsio.com> Signed-off-by: Nicholas Bellinger <nab@linux-iscsi.org>
2015-12-17cxgb4: Replace arpq_head/arpq_tail with SKB double link-list codeHariprasad Shenai
Based on original work by Michael Werner <werner@chelsio.com> Signed-off-by: Hariprasad Shenai <hariprasad@chelsio.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2015-12-17cxgb4: Add API to alloc l2t entry; also update existing onesHariprasad Shenai
Based on original work by Kumar Sanghvi <kumaras@chelsio.com> Signed-off-by: Hariprasad Shenai <hariprasad@chelsio.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2015-07-08cxgb4: Don't use entire L2T table, use only its sliceHariprasad Shenai
The driver was retrieving the parameters for the bounds of its slice of the L2T from the firmware and then throwing those away and using the entire table. This corrects that problem. Signed-off-by: Hariprasad Shenai <hariprasad@chelsio.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2014-06-22cxgb4 : Update copyright year on all cxgb4 filesAnish Bhatt
Signed-off-by: Anish Bhatt <anish@chelsio.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2013-12-22cxgb4: Add API to correctly calculate tuple fieldsKumar Sanghvi
Adds API cxgb4_select_ntuple so as to enable Upper Level Drivers to correctly calculate the tuple fields. Adds constant definitions for TP_VLAN_PRI_MAP for the Compressed Filter Tuple field widths and structures and uses them. Also, the CPL Parameters field for T5 is 40 bits so we need to prototype cxgb4_select_ntuple() to calculate and return u64 values. Based on original work by Casey Leedom <leedom@chelsio.com> Signed-off-by: Kumar Sanghvi <kumaras@chelsio.com> Signed-off-by: Hariprasad Shenai <hariprasad@chelsio.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2012-12-19cxgb4: Add T4 filter supportVipul Pandya
The T4 architecture is capable of filtering ingress packets at line rate using the rule in TCAM. If packet hits a rule in the TCAM then it can be either dropped or passed to the receive queues based on a rule settings. This patch adds framework for managing filters and to use T4's filter capabilities. It constructs a Firmware Filter Work Request which writes the filter at a specified index to get the work done. It hosts shadow copy of ingress filter entry to check field size limitations and save memory in the case where the filter table is large. Signed-off-by: Vipul Pandya <vipul@chelsio.com> Signed-off-by: Roland Dreier <roland@purestorage.com>
2011-08-10chelsio: Move the Chelsio driversJeff Kirsher
Moves the drivers for the Chelsio chipsets into drivers/net/ethernet/chelsio/ and the necessary Kconfig and Makefile changes. CC: Divy Le Ray <divy@chelsio.com> CC: Dimitris Michailidis <dm@chelsio.com> CC: Casey Leedom <leedom@chelsio.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>