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path: root/drivers/net/ethernet/intel/igc/igc_mac.c
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2021-02-01igc: check return value of ret_val in igc_config_fc_after_link_upKevin Lo
Check return value from ret_val to make error check actually work. Fixes: 4eb8080143a9 ("igc: Add setup link functionality") Signed-off-by: Kevin Lo <kevlo@kevlo.org> Acked-by: Sasha Neftin <sasha.neftin@intel.com> Signed-off-by: Tony Nguyen <anthony.l.nguyen@intel.com>
2020-07-27igc: Fix static checker warningSasha Neftin
drivers/net/ethernet/intel/igc/igc_mac.c:424 igc_check_for_copper_link() error: uninitialized symbol 'link'. This patch come to fix this warning and initialize the 'link' symbol. Reported-by: Dan Carpenter <dan.carpenter@oracle.com> Fixes: 707abf069548 ("igc: Add initial LTR support") Signed-off-by: Sasha Neftin <sasha.neftin@intel.com> Tested-by: Aaron Brown <aaron.f.brown@intel.com> Signed-off-by: Tony Nguyen <anthony.l.nguyen@intel.com>
2020-07-27igc: Clean up the hw_stats structureSasha Neftin
Remove ictxptc, ictxatc, cbtmpc, cbrdpc, cbrmpc and htcbdpc fields from the hw_stats structure. Accordance to the i225 device specification these fields not in use. This patch come to clean up the driver code. Signed-off-by: Sasha Neftin <sasha.neftin@intel.com> Tested-by: Aaron Brown <aaron.f.brown@intel.com> Signed-off-by: Tony Nguyen <anthony.l.nguyen@intel.com>
2020-07-27igc: Fix registers definitionSasha Neftin
IGC_ICTXPTC and IGC_ICTXATC are already defined elsewhere, remove this double definition. Also, remove unneeded registers as they are not applicable to i225 devices. Signed-off-by: Sasha Neftin <sasha.neftin@intel.com> Tested-by: Aaron Brown <aaron.f.brown@intel.com> Signed-off-by: Tony Nguyen <anthony.l.nguyen@intel.com>
2020-07-27igc: Remove unneeded ICTXQMTC registerSasha Neftin
Tx Queue Min Threshold Count register no applicable for the i225 device. This patch comes to clean up it. Signed-off-by: Sasha Neftin <sasha.neftin@intel.com> Tested-by: Aaron Brown <aaron.f.brown@intel.com> Signed-off-by: Tony Nguyen <anthony.l.nguyen@intel.com>
2020-07-27igc: Add Receive Descriptor Minimum Threshold Count to clear HW countersSasha Neftin
The statistics of this register are being tracked, however, the register was inadvertently missed when implementing igc_clear_hw_cntrs_base(). The register is clear on read, so add it to the function so that the register is cleared when requested so the tracked count is accurate. Signed-off-by: Sasha Neftin <sasha.neftin@intel.com> Tested-by: Aaron Brown <aaron.f.brown@intel.com> Signed-off-by: Tony Nguyen <anthony.l.nguyen@intel.com>
2020-07-27igc: Remove unneeded variableSasha Neftin
Though we are populating and tracking ictxqec, the value is not being used for anything so remove it altogether and save the register read. Signed-off-by: Sasha Neftin <sasha.neftin@intel.com> Tested-by: Aaron Brown <aaron.f.brown@intel.com> Signed-off-by: Tony Nguyen <anthony.l.nguyen@intel.com>
2020-06-29igc: Remove checking media type during MAC initializationSasha Neftin
i225 device support only copper mode. There is no point to check media type in the igc_config_fc_after_link_up() method. Signed-off-by: Sasha Neftin <sasha.neftin@intel.com> Tested-by: Aaron Brown <aaron.f.brown@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
2020-06-29igc: Remove TCP segmentation TX fail counterSasha Neftin
TCP segmentation TX context fail counter is not applicable for i225 devices. This patch comes to clean up this counter. Signed-off-by: Sasha Neftin <sasha.neftin@intel.com> Tested-by: Aaron Brown<aaron.f.brown@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
2020-06-29igc: Add LPI countersSasha Neftin
Add EEE TX LPI and EEE RX LPI counters. A EEE TX LPI event occurs when the transmitter enters EEE (IEEE 802.3az) LPI state. A EEE RX LPI event occurs when the receiver detect link partner entry into EEE(IEEE 802.3az) LPI state. Signed-off-by: Sasha Neftin <sasha.neftin@intel.com> Tested-by: Aaron Brown <aaron.f.brown@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
2020-06-29igc: Add initial LTR supportSasha Neftin
The LTR message on the PCIe inform the requested latency on which the PCIe must become active to the downstream PCIe port of the system. This patch provide recommended LTR parameters by i225 specification. Signed-off-by: Sasha Neftin <sasha.neftin@intel.com> Tested-by: Aaron Brown <aaron.f.brown@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
2020-05-28igc: Fix wrong register nameSasha Neftin
Accordance to the i225 datasheet this register address used by Host Transmit Discarded Packet by MAC counter and not by not applicable Carrier Extension Error counter. This patch comes to fix this wrong definition. Signed-off-by: Sasha Neftin <sasha.neftin@intel.com> Tested-by: Aaron Brown <aaron.f.brown@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
2020-05-28igc: Remove Sequence Error CounterSasha Neftin
Accordance to the i225 datasheet sequence error counter does not applicable to the i225 device. This patch comes to clean up this counter. Signed-off-by: Sasha Neftin <sasha.neftin@intel.com> Tested-by: Aaron Brown <aaron.f.brown@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
2020-05-28igc: Add Receive Error CounterSasha Neftin
Receive error counter reflect total number of non-filtered packets received with errors. This includes: CRC error, symbol error, Rx data error and carrier extend error. Signed-off-by: Sasha Neftin <sasha.neftin@intel.com> Tested-by: Aaron Brown <aaron.f.brown@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
2020-05-28igc: Remove symbol error counterSasha Neftin
Accordance to the i225 datasheet symbol error counter does not applicable to the i225 device. This patch comes to clean up this counter. Signed-off-by: Sasha Neftin <sasha.neftin@intel.com> Tested-by: Aaron Brown <aaron.f.brown@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
2020-05-21igc: Remove obsolete circuit breaker registersSasha Neftin
Part of circuit breaker registers is obsolete and not applicable for i225 device. This patch comes to clean up these registers. Signed-off-by: Sasha Neftin <sasha.neftin@intel.com> Tested-by: Aaron Brown <aaron.f.brown@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
2019-10-21igc: Add set_rx_mode supportSasha Neftin
Add multicast addresses list to the MTA table. Implement basic Rx mode support. Add option for IPv6 address settings. Signed-off-by: Sasha Neftin <sasha.neftin@intel.com> Tested-by: Aaron Brown <aaron.f.brown@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
2019-09-09igc: Remove useless forward declarationSasha Neftin
Move igc_phy_setup_autoneg, igc_wait_autoneg and igc_set_fc_watermarks up to avoid forward declaration. It is not necessary to forward declare these static methods. Signed-off-by: Sasha Neftin <sasha.neftin@intel.com> Tested-by: Aaron Brown <aaron.f.brown@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
2019-05-28igc: Cleanup the redundant codeSasha Neftin
The default flow control settings for the i225 device is both 'rx' and 'tx' pause frames. There is no depend on the NVM value. This patch comes to fix this and clean up the driver code. Signed-off-by: Sasha Neftin <sasha.neftin@intel.com> Tested-by: Aaron Brown <aaron.f.brown@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
2018-10-17igc: Add setup link functionalitySasha Neftin
Add link establishment methods Add auto negotiation methods Add read MAC address method Signed-off-by: Sasha Neftin <sasha.neftin@intel.com> Tested-by: Aaron Brown <aaron.f.brown@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
2018-10-17igc: Add code for PHY supportSasha Neftin
Add PHY's ID support Add support for initialization, acquire and release of PHY Enable register access Signed-off-by: Sasha Neftin <sasha.neftin@intel.com> Signed-off-by: Alexander Duyck <alexander.h.duyck@intel.com> Tested-by: Aaron Brown <aaron.f.brown@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
2018-10-17igc: Add NVM supportSasha Neftin
Add code for NVM support and get MAC address, complete probe method. Signed-off-by: Sasha Neftin <sasha.neftin@intel.com> Signed-off-by: Alexander Duyck <alexander.h.duyck@intel.com> Tested-by: Aaron Brown <aaron.f.brown@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
2018-10-17igc: Add HW initialization codeSasha Neftin
Add code for hardware initialization and reset Add code for semaphore handling Signed-off-by: Sasha Neftin <sasha.neftin@intel.com> Tested-by: Aaron Brown <aaron.f.brown@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
2018-10-17igc: Add support for PFSasha Neftin
This patch adds the basic defines and structures needed by the PF for operation. With this it is possible to bring up the interface, but without being able to configure any of the filters on the interface itself. Add skeleton for a function pointers. Signed-off-by: Sasha Neftin <sasha.neftin@intel.com> Tested-by: Aaron Brown <aaron.f.brown@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
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