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path: root/drivers/net/ethernet/mediatek/mtk_eth_soc.h
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2022-05-22net: ethernet: mtk_eth_soc: introduce device register mapLorenzo Bianconi
Introduce reg_map structure to add the capability to support different register definitions. Move register definitions in mtk_regmap structure. This is a preliminary patch to introduce mt7986 ethernet support. Tested-by: Sam Shih <sam.shih@mediatek.com> Signed-off-by: Lorenzo Bianconi <lorenzo@kernel.org> Signed-off-by: David S. Miller <davem@davemloft.net>
2022-05-22net: ethernet: mtk_eth_soc: add rxd_size to mtk_soc_dataLorenzo Bianconi
Similar to tx counterpart, introduce rxd_size in mtk_soc_data data structure. This is a preliminary patch to add mt7986 ethernet support. Tested-by: Sam Shih <sam.shih@mediatek.com> Signed-off-by: Lorenzo Bianconi <lorenzo@kernel.org> Signed-off-by: David S. Miller <davem@davemloft.net>
2022-05-22net: ethernet: mtk_eth_soc: add txd_size to mtk_soc_dataLorenzo Bianconi
In order to remove mtk_tx_dma size dependency, introduce txd_size in mtk_soc_data data structure. Rely on txd_size in mtk_init_fq_dma() and mtk_dma_free() routines. This is a preliminary patch to add mt7986 ethernet support. Tested-by: Sam Shih <sam.shih@mediatek.com> Signed-off-by: Lorenzo Bianconi <lorenzo@kernel.org> Signed-off-by: David S. Miller <davem@davemloft.net>
2022-05-22net: ethernet: mtk_eth_soc: move tx dma desc configuration in ↵Lorenzo Bianconi
mtk_tx_set_dma_desc Move tx dma descriptor configuration in mtk_tx_set_dma_desc routine. This is a preliminary patch to introduce mt7986 ethernet support since it relies on a different tx dma descriptor layout. Tested-by: Sam Shih <sam.shih@mediatek.com> Signed-off-by: Lorenzo Bianconi <lorenzo@kernel.org> Signed-off-by: David S. Miller <davem@davemloft.net>
2022-05-19net: mtk_eth_soc: partially convert to phylink_pcsRussell King (Oracle)
Partially convert mtk_eth_soc to phylink_pcs, moving the configuration, link up and AN restart over. However, it seems mac_pcs_get_state() doesn't actually get the state from the PCS, so we can't convert that over without a better understanding of the hardware. Signed-off-by: Russell King (Oracle) <rmk+kernel@armlinux.org.uk> Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2022-05-19net: mtk_eth_soc: convert code structure to suit split PCS supportRussell King (Oracle)
Provide a mtk_pcs structure which encapsulates everything that the PCS functions need (the regmap and ana_rgc3 offset), and use this in the PCS functions. Provide shim functions to convert from the existing "mtk_sgmii_*" interface to the converted PCS functions. Signed-off-by: Russell King (Oracle) <rmk+kernel@armlinux.org.uk> Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2022-05-19net: mtk_eth_soc: move restoration of SYSCFG0 to mac_finish()Russell King (Oracle)
The SGMIISYS configuration is performed while ETHSYS_SYSCFG0 is in a disabled state. In order to preserve this when we switch to phylink_pcs we need to move the restoration of this register to the mac_finish() callback. Signed-off-by: Russell King (Oracle) <rmk+kernel@armlinux.org.uk> Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2022-05-19net: mtk_eth_soc: provide mtk_sgmii_config()Russell King (Oracle)
Provide mtk_sgmii_config() to wrap up the decisions about which SGMII configuration will be called. Signed-off-by: Russell King (Oracle) <rmk+kernel@armlinux.org.uk> Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2022-05-19net: mtk_eth_soc: stop passing phylink state to sgmii setupRussell King (Oracle)
Now that mtk_sgmii_setup_mode_force() only uses the interface mode from the phylink state, pass just the interface mode into this function. Signed-off-by: Russell King (Oracle) <rmk+kernel@armlinux.org.uk> Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2022-05-19net: mtk_eth_soc: correct 802.3z duplex settingRussell King
Phylink does not guarantee that state->duplex will be set correctly in the mac_config() call, so it's a bug that the driver makes use of it. Move the 802.3z PCS duplex configuration to mac_link_up(). Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk> Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2022-05-19net: mtk_eth_soc: add mask and update PCS speed definitionsRussell King (Oracle)
The PCS speed setting is a two bit field, but it is defined as two separate bits. Add a bitfield mask for the speed definitions, an use the FIELD_PREP() macro to define each PCS speed. Signed-off-by: Russell King (Oracle) <rmk+kernel@armlinux.org.uk> Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2022-05-19net: mtk_eth_soc: remove unused sgmii flagsRussell King (Oracle)
The "flags" member of struct mtk_sgmii appears to be unused, as are the MTK_SGMII_PHYSPEED_* and MTK_HAS_FLAGS() macros. Remove them. Signed-off-by: Russell King (Oracle) <rmk+kernel@armlinux.org.uk> Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2022-05-19net: mtk_eth_soc: remove unused mac->modeRussell King (Oracle)
mac->mode is only ever written to in one location, and is thus superflous. Remove it. Signed-off-by: Russell King (Oracle) <rmk+kernel@armlinux.org.uk> Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2022-04-29eth: mtk_eth_soc: remove a copy of the NAPI_POLL_WEIGHT defineJakub Kicinski
Defining local versions of NAPI_POLL_WEIGHT with the same values in the drivers just makes refactoring harder. Signed-off-by: Jakub Kicinski <kuba@kernel.org> Signed-off-by: David S. Miller <davem@davemloft.net>
2022-04-06net: ethernet: mtk_eth_soc: allocate struct mtk_ppe separatelyFelix Fietkau
Preparation for adding more data to it, which will increase its size. Signed-off-by: Felix Fietkau <nbd@nbd.name> Signed-off-by: David S. Miller <davem@davemloft.net>
2022-04-06net: ethernet: mtk_eth_soc: add support for Wireless Ethernet Dispatch (WED)Felix Fietkau
The Wireless Ethernet Dispatch subsystem on the MT7622 SoC can be configured to intercept and handle access to the DMA queues and PCIe interrupts for a MT7615/MT7915 wireless card. It can manage the internal WDMA (Wireless DMA) controller, which allows ethernet packets to be passed from the packet switch engine (PSE) to the wireless card, bypassing the CPU entirely. This can be used to implement hardware flow offloading from ethernet to WLAN. Signed-off-by: Felix Fietkau <nbd@nbd.name> Signed-off-by: David S. Miller <davem@davemloft.net>
2022-04-06net: ethernet: mtk_eth_soc: add support for coherent DMAFelix Fietkau
It improves performance by eliminating the need for a cache flush on rx and tx In preparation for supporting WED (Wireless Ethernet Dispatch), also add a function for disabling coherent DMA at runtime. Signed-off-by: Felix Fietkau <nbd@nbd.name> Signed-off-by: David S. Miller <davem@davemloft.net>
2022-01-05net: ethernet: mtk_eth_soc: implement Clause 45 MDIO accessDaniel Golle
Implement read and write access to IEEE 802.3 Clause 45 Ethernet phy registers while making use of new mdiobus_c45_regad and mdiobus_c45_devad helpers. Tested on the Ubiquiti UniFi 6 LR access point featuring MediaTek MT7622BV WiSoC with Aquantia AQR112C. Signed-off-by: Daniel Golle <daniel@makrotopia.org> Signed-off-by: David S. Miller <davem@davemloft.net>
2022-01-05net: ethernet: mtk_eth_soc: fix return values and refactor MDIO opsDaniel Golle
Instead of returning -1 (-EPERM) when MDIO bus is stuck busy while writing or 0xffff if it happens while reading, return the appropriate -ETIMEDOUT. Also fix return type to int instead of u32. Refactor functions to use bitfield helpers instead of having various masking and shifting constants in the code, which also results in the register definitions in the header file being more obviously related to what is stated in the MediaTek's Reference Manual. Fixes: 656e705243fd0 ("net-next: mediatek: add support for MT7623 ethernet") Signed-off-by: Daniel Golle <daniel@makrotopia.org> Signed-off-by: David S. Miller <davem@davemloft.net>
2021-05-23net: ethernet: mtk_eth_soc: Fix packet statistics support for MT7628/88Stefan Roese
The MT7628/88 SoC(s) have other (limited) packet counter registers than currently supported in the mtk_eth_soc driver. This patch adds support for reading these registers, so that the packet statistics are correctly updated. Additionally the defines for the non-MT7628 variant packet counter registers are added and used in this patch instead of using hard coded values. Signed-off-by: Stefan Roese <sr@denx.de> Fixes: 296c9120752b ("net: ethernet: mediatek: Add MT7628/88 SoC support") Cc: Felix Fietkau <nbd@nbd.name> Cc: John Crispin <john@phrozen.org> Cc: Ilya Lipnitskiy <ilya.lipnitskiy@gmail.com> Cc: Reto Schneider <code@reto-schneider.ch> Cc: Reto Schneider <reto.schneider@husqvarnagroup.com> Cc: David S. Miller <davem@davemloft.net> Signed-off-by: David S. Miller <davem@davemloft.net>
2021-04-23net: ethernet: mtk_eth_soc: use iopoll.h macro for DMA initIlya Lipnitskiy
Replace a tight busy-wait loop without a pause with a standard readx_poll_timeout_atomic routine with a 5 us poll period. Tested by booting a MT7621 device to ensure the driver initializes properly. Signed-off-by: Ilya Lipnitskiy <ilya.lipnitskiy@gmail.com> Reviewed-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: David S. Miller <davem@davemloft.net>
2021-04-23net: ethernet: mtk_eth_soc: cache HW pointer of last freed TX descriptorFelix Fietkau
The value is only updated by the CPU, so it is cheaper to access from the ring data structure than from a hardware register. Signed-off-by: Felix Fietkau <nbd@nbd.name> Signed-off-by: Ilya Lipnitskiy <ilya.lipnitskiy@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2021-04-23net: ethernet: mtk_eth_soc: implement dynamic interrupt moderationFelix Fietkau
Reduces the number of interrupts under load Signed-off-by: Felix Fietkau <nbd@nbd.name> [Ilya: add documentation for new struct fields] Signed-off-by: Ilya Lipnitskiy <ilya.lipnitskiy@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2021-04-23net: ethernet: mtk_eth_soc: increase DMA ring sizesFelix Fietkau
256 descriptors is not enough for multi-gigabit traffic under load on MT7622. Bump it to 512 to improve performance. Signed-off-by: Felix Fietkau <nbd@nbd.name> Signed-off-by: Ilya Lipnitskiy <ilya.lipnitskiy@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2021-04-23net: ethernet: mtk_eth_soc: use larger burst size for QDMA TXFelix Fietkau
Improves tx performance Signed-off-by: Felix Fietkau <nbd@nbd.name> Signed-off-by: Ilya Lipnitskiy <ilya.lipnitskiy@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2021-04-23net: ethernet: mtk_eth_soc: fix RX VLAN offloadFelix Fietkau
The VLAN ID in the rx descriptor is only valid if the RX_DMA_VTAG bit is set. Fixes frames wrongly marked with VLAN tags. Signed-off-by: Felix Fietkau <nbd@nbd.name> [Ilya: fix commit message] Signed-off-by: Ilya Lipnitskiy <ilya.lipnitskiy@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2021-03-24net: ethernet: mtk_eth_soc: add flow offloading supportFelix Fietkau
This adds support for offloading IPv4 routed flows, including SNAT/DNAT, one VLAN, PPPoE and DSA. Signed-off-by: Felix Fietkau <nbd@nbd.name> Signed-off-by: Pablo Neira Ayuso <pablo@netfilter.org> Signed-off-by: David S. Miller <davem@davemloft.net>
2021-03-24net: ethernet: mtk_eth_soc: add support for initializing the PPEFelix Fietkau
The PPE (packet processing engine) is used to offload NAT/routed or even bridged flows. This patch brings up the PPE and uses it to get a packet hash. It also contains some functionality that will be used to bring up flow offloading. Signed-off-by: Felix Fietkau <nbd@nbd.name> Signed-off-by: Pablo Neira Ayuso <pablo@netfilter.org> Signed-off-by: David S. Miller <davem@davemloft.net>
2021-03-24net: ethernet: mtk_eth_soc: fix parsing packets in GDMFelix Fietkau
When using DSA, set the special tag in GDM ingress control to allow the MAC to parse packets properly earlier. This affects rx DMA source port reporting. Signed-off-by: Felix Fietkau <nbd@nbd.name> Signed-off-by: Pablo Neira Ayuso <pablo@netfilter.org> Signed-off-by: David S. Miller <davem@davemloft.net>
2021-01-25net: ethernet: mediatek: support setting MTUDENG Qingfang
MT762x HW, except for MT7628, supports frame length up to 2048 (maximum length on GDM), so allow setting MTU up to 2030. Also set the default frame length to the hardware default 1518. Signed-off-by: DENG Qingfang <dqfext@gmail.com> Reviewed-by: Andrew Lunn <andrew@lunn.ch> Link: https://lore.kernel.org/r/20210125042046.5599-1-dqfext@gmail.com Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2020-04-07net: ethernet: mediatek: move mt7623 settings out off the mt7530René van Dorst
Moving mt7623 logic out off mt7530, is required to make hardware setting consistent after we introduce phylink to mtk driver. Fixes: b8fc9f30821e ("net: ethernet: mediatek: Add basic PHYLINK support") Reviewed-by: Sean Wang <sean.wang@mediatek.com> Tested-by: Sean Wang <sean.wang@mediatek.com> Signed-off-by: René van Dorst <opensource@vdorst.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2019-11-14net: ethernet: mediatek: Enable GDM GDMA_DROP_ALL modeMarkLee
Enable GDM GDMA_DROP_ALL mode to drop all packet during the stop operation. This is recommended by the mt762x HW design to drop all packet from GMAC before stopping PDMA. Signed-off-by: MarkLee <Mark-MC.Lee@mediatek.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2019-11-14net: ethernet: mediatek: Integrate GDM/PSE setup operationsMarkLee
Integrate GDM/PSE setup operations into single function "mtk_gdm_config" Signed-off-by: MarkLee <Mark-MC.Lee@mediatek.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2019-08-27net: ethernet: mediatek: Re-add support SGMIIRené van Dorst
* Re-add SGMII support but now with PHYLINK API support So the SGMII changes are more clear * Move SGMII block setup from mtk_gmac_sgmii_path_setup() to mtk_mac_config() * Merge mtk_setup_hw_path() into mtk_mac_config() * Remove mediatek,physpeed property, fixed-link supports now any speed so speed = <2500>; is now valid with PHYLINK * Demagic SGMII register values * Use phylink state to setup fixed-link mode Signed-off-by: René van Dorst <opensource@vdorst.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2019-08-27net: ethernet: mediatek: Add basic PHYLINK supportRené van Dorst
This convert the basics to PHYLINK API. SGMII support is not in this patch. Signed-off-by: René van Dorst <opensource@vdorst.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2019-08-18net: ethernet: mediatek: Add MT7628/88 SoC supportStefan Roese
This patch adds support for the MediaTek MT7628/88 SoCs to the common MediaTek ethernet driver. Some minor changes are needed for this and a bigger change, as the MT7628 does not support QDMA (only PDMA). Signed-off-by: Stefan Roese <sr@denx.de> Cc: René van Dorst <opensource@vdorst.com> Cc: Daniel Golle <daniel@makrotopia.org> Cc: Sean Wang <sean.wang@mediatek.com> Cc: John Crispin <john@phrozen.org> Signed-off-by: David S. Miller <davem@davemloft.net>
2019-08-18net: ethernet: mediatek: Rename NEXT_RX_DESP_IDX to NEXT_DESP_IDXStefan Roese
Rename the NEXT_RX_DESP_IDX macro to NEXT_DESP_IDX, so that it better can be used for TX ops as well. This will be used in the upcoming MT7628/88 support (same functionality for RX and TX in this macro). Signed-off-by: Stefan Roese <sr@denx.de> Cc: René van Dorst <opensource@vdorst.com> Cc: Daniel Golle <daniel@makrotopia.org> Cc: Sean Wang <sean.wang@mediatek.com> Cc: John Crispin <john@phrozen.org> Signed-off-by: David S. Miller <davem@davemloft.net>
2019-08-18net: ethernet: mediatek: Rename MTK_QMTK_INT_STATUS to MTK_QDMA_INT_STATUSStefan Roese
Currently all QDMA registers are named "MTK_QDMA_foo" in this driver with one exception: MTK_QMTK_INT_STATUS. This patch renames MTK_QMTK_INT_STATUS to MTK_QDMA_INT_STATUS so that all macros follow this rule. Signed-off-by: Stefan Roese <sr@denx.de> Cc: René van Dorst <opensource@vdorst.com> Cc: Daniel Golle <daniel@makrotopia.org> Cc: Sean Wang <sean.wang@mediatek.com> Cc: John Crispin <john@phrozen.org> Signed-off-by: David S. Miller <davem@davemloft.net>
2019-07-11net: ethernet: mediatek: Fix misuses of GENMASK macroJoe Perches
Arguments are supposed to be ordered high then low. Signed-off-by: Joe Perches <joe@perches.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2019-07-04net: ethernet: mediatek: Fix overlapping capability bits.René van Dorst
Both MTK_TRGMII_MT7621_CLK and MTK_PATH_BIT are defined as bit 10. This can causes issues on non-MT7621 devices which has the MTK_PATH_BIT(MTK_ETH_PATH_GMAC1_RGMII) and MTK_TRGMII capability set. The wrong TRGMII setup code can be executed. The current wrongly executed code doesn’t do any harm on MT7623 and the TRGMII setup for the MT7623 SOC side is done in MT7530 driver So it wasn’t noticed in the test. Move all capability bits in one enum so that they are all unique and easy to expand in the future. Because mtk_eth_path enum is merged in to mkt_eth_capabilities, the variable path value is no longer between 0 to number of paths, mtk_eth_path_name can’t be used anymore in this form. Convert the mtk_eth_path_name array to a function to lookup the pathname. The old code walked thru the mtk_eth_path enum, which is also merged with mkt_eth_capabilities. Expand array mtk_eth_muxc so it can store the name and capability bit of the mux. Convert the code so it can walk thru the mtk_eth_muxc array. Fixes: 8efaa653a8a5 ("net: ethernet: mediatek: Add MT7621 TRGMII mode support") Signed-off-by: René van Dorst <opensource@vdorst.com> v1->v2: - Move all capability bits in one enum, suggested by Willem de Bruijn - Convert the mtk_eth_path_name array to a function to lookup the pathname - Expand array mtk_eth_muxc so it can also store the name and capability bit of the mux - Updated commit message Signed-off-by: David S. Miller <davem@davemloft.net>
2019-06-22net: ethernet: mediatek: Add MT7621 TRGMII mode supportRené van Dorst
MT7621 SOC also supports TRGMII. TRGMII speed is 1200MBit. Signed-off-by: René van Dorst <opensource@vdorst.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2019-06-17Merge git://git.kernel.org/pub/scm/linux/kernel/git/davem/netDavid S. Miller
Honestly all the conflicts were simple overlapping changes, nothing really interesting to report. Signed-off-by: David S. Miller <davem@davemloft.net>
2019-06-05treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 285Thomas Gleixner
Based on 1 normalized pattern(s): this program is free software you can redistribute it and or modify it under the terms of the gnu general public license as published by the free software foundation version 2 of the license this program is distributed in the hope that it will be useful but without any warranty without even the implied warranty of merchantability or fitness for a particular purpose see the gnu general public license for more details extracted by the scancode license scanner the SPDX license identifier GPL-2.0-only has been chosen to replace the boilerplate/reference in 100 file(s). Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Reviewed-by: Alexios Zavras <alexios.zavras@intel.com> Reviewed-by: Allison Randal <allison@lohutok.net> Cc: linux-spdx@vger.kernel.org Link: https://lkml.kernel.org/r/20190529141900.918357685@linutronix.de Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2019-06-03net: ethernet: mediatek: Add MT7629 ethernet supportSean Wang
Add ethernet support to MT7629 SoC Signed-off-by: Sean Wang <sean.wang@mediatek.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2019-06-03net: ethernet: mediatek: Integrate hardware path from GMAC to PHY variantsSean Wang
All path route on various SoCs all would be managed in common function mtk_setup_hw_path that is determined by the both applied devicetree regarding the path between GMAC and the target PHY or switch by the capability of target SoC in the runtime. Signed-off-by: Sean Wang <sean.wang@mediatek.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2019-06-03net: ethernet: mediatek: Extend SGMII related functionsSean Wang
Add SGMII related logic into a separate file, and also provides options for forcing 1G, 2.5, AN mode for the target PHY, that can be determined from SGMII node in DTS. Signed-off-by: Sean Wang <sean.wang@mediatek.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2019-01-30net: ethernet: mediatek: support MT7621 SoC ethernet hardwareBjørn Mork
The Mediatek MT7621 SoC contains the same ethernet hardware module as used on a number of other MediaTek SoC parts. There are some minor differences to deal with but we can use the same driver to support them all. This patch is based on work by Bjørn Mork <bjorn@mork.no>, and his original patch is at: https://github.com/bmork/LEDE/commit/3293bc63f5461ca1eb0bbc4ed90145335e7e3404 There is an additional compatible devicetree type added, and the primary change to the code required is to support a single interrupt (for both RX and TX interrupts). Signed-off-by: Bjørn Mork <bjorn@mork.no> [gerg@kernel.org: rebase to mainline and irq handler fix] Signed-off-by: Greg Ungerer <gerg@kernel.org> Reviewed-by: Florian Fainelli <f.fainelli@gmail.com> Acked-by: Sean Wang <sean.wang@kernel.org> Signed-off-by: David S. Miller <davem@davemloft.net>
2018-07-29net-next: mediatek: cleanup unnecessary get chip id and its userSean Wang
Since driver is devicetree-based, all device type and charateristic can be determined by the compatible string and its data. It's unnecessary to create another dependent function to check chip ID and then decide whether the specific funciton is being supported on a certain device. It can be totally replaced by the existing flag, so a cleanup is made by removing the function and the only user, HWLRO. MT2701 also have a missing HWLRO support in old code, so add it the same patch. Signed-off-by: Sean Wang <sean.wang@mediatek.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2017-12-26net: mediatek: remove superfluous pin setup for MT7622 SoCSean Wang
Remove superfluous pin setup to get out of accessing invalid I/O pin registers because the way for pin configuring tends to be different from various SoCs and thus it should be better being managed and controlled by the pinctrl driver which MT7622 already can support. Signed-off-by: Sean Wang <sean.wang@mediatek.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2017-10-22drivers, net, ethernet: convert mtk_eth.dma_refcnt from atomic_t to refcount_tElena Reshetova
atomic_t variables are currently used to implement reference counters with the following properties: - counter is initialized to 1 using atomic_set() - a resource is freed upon counter reaching zero - once counter reaches zero, its further increments aren't allowed - counter schema uses basic atomic operations (set, inc, inc_not_zero, dec_and_test, etc.) Such atomic variables should be converted to a newly provided refcount_t type and API that prevents accidental counter overflows and underflows. This is important since overflows and underflows can lead to use-after-free situation and be exploitable. The variable mtk_eth.dma_refcnt is used as pure reference counter. Convert it to refcount_t and fix up the operations. Suggested-by: Kees Cook <keescook@chromium.org> Reviewed-by: David Windsor <dwindsor@gmail.com> Reviewed-by: Hans Liljestrand <ishkamiel@gmail.com> Signed-off-by: Elena Reshetova <elena.reshetova@intel.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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