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path: root/drivers/net/ethernet/mellanox/mlxsw/reg.h
AgeCommit message (Expand)Author
2020-08-03mlxsw: spectrum_trap: Add early_drop trapIdo Schimmel
2020-08-02Merge git://git.kernel.org/pub/scm/linux/kernel/git/netdev/netDavid S. Miller
2020-07-29mlxsw: spectrum: Use different trap group for externally routed packetsIdo Schimmel
2020-07-28mlxsw: core: Add support for temperature thresholds reading for QSFP-DD trans...Vadim Pasternak
2020-07-28mlxsw: core: Add ethtool support for QSFP-DD transceiversVadim Pasternak
2020-07-15mlxsw: reg: Add policer bandwidth limitsIdo Schimmel
2020-07-14mlxsw: reg: Increase trap identifier to 10 bitsAmit Cohen
2020-07-14mlxsw: reg: add mirroring_pid_base to MOGCR registerAmit Cohen
2020-07-14mlxsw: reg: Add session_id and pid to MPAT registerAmit Cohen
2020-07-13mlxsw: reg: Add Monitoring Port Analyzer Global RegisterAmit Cohen
2020-07-13mlxsw: reg: Add Monitoring Mirror Trigger Enable RegisterAmit Cohen
2020-06-29mlxsw: reg: Port Diagnostics Database RegisterAmit Cohen
2020-06-01mlxsw: spectrum_trap: Register layer 3 control trapsIdo Schimmel
2020-06-01mlxsw: spectrum_trap: Move layer 3 exceptions to exceptions trap groupIdo Schimmel
2020-05-26mlxsw: spectrum: Add packet traps for BFD packetsIdo Schimmel
2020-05-26mlxsw: reg: Move all trap groups under the same enumIdo Schimmel
2020-05-26mlxsw: switchx2: Move SwitchX-2 trap groups out of main enumIdo Schimmel
2020-05-26mlxsw: spectrum: Use separate trap group for FID missIdo Schimmel
2020-05-26mlxsw: spectrum: Rename IPv6 ND trap groupIdo Schimmel
2020-05-26mlxsw: spectrum: Use dedicated trap group for ACL trapIdo Schimmel
2020-05-24mlxsw: spectrum: Use dedicated trap group for sampled packetsIdo Schimmel
2020-05-24mlxsw: spectrum: Rename ARP trap groupIdo Schimmel
2020-05-24mlxsw: spectrum: Use same trap group for MLD and IGMP packetsIdo Schimmel
2020-05-24mlxsw: spectrum: Rename IGMP trap groupIdo Schimmel
2020-04-20mlxsw: reg: Increase register field length to 13 bitsIdo Schimmel
2020-03-30mlxsw: spectrum_trap: Switch to use correct packet trap groupIdo Schimmel
2020-03-30mlxsw: reg: Extend QPCR registerIdo Schimmel
2020-03-25Merge git://git.kernel.org/pub/scm/linux/kernel/git/netdev/netDavid S. Miller
2020-03-15mlxsw: reg: Increase register field length to 31 bitsIdo Schimmel
2020-02-27mlxsw: reg: Update module_type values in PMTM register and map them to widthJiri Pirko
2020-02-26mlxsw: spectrum_switchdev: Optimize SFN records processingJiri Pirko
2020-02-24mlxsw: spectrum_trap: Add ACL devlink-trap supportJiri Pirko
2020-02-24mlxsw: spectrum_trap: Introduce dummy group with thin policerJiri Pirko
2020-01-25mlxsw: reg: Increase MLXSW_REG_QEEC_MAS_DISPetr Machata
2020-01-25mlxsw: reg: Add max_shaper_bs to QoS ETS Element ConfigurationPetr Machata
2020-01-19mlxsw: Add tunnel devlink-trap supportAmit Cohen
2020-01-19mlxsw: reg: Add Tunneling IPinIP Decapsulation ECN Mapping RegisterAmit Cohen
2020-01-19mlxsw: reg: Add Tunneling IPinIP Encapsulation ECN Mapping RegisterAmit Cohen
2020-01-02mlxsw: reg: Add QoS Port DSCP to Priority Mapping RegisterPetr Machata
2019-12-31Merge git://git.kernel.org/pub/scm/linux/kernel/git/netdev/netDavid S. Miller
2019-12-29mlxsw: spectrum: Use dedicated policer for VRRP packetsIdo Schimmel
2019-12-18mlxsw: spectrum: Rename MLXSW_REG_QEEC_HIERARCY_* enumeratorsPetr Machata
2019-11-07mlxsw: Add layer 3 devlink-trap supportAmit Cohen
2019-10-31mlxsw: reg: Add Port Module Type Mapping RegisterJiri Pirko
2019-10-31mlxsw: reg: Extend PMLP tx/rx lane value size to 4 bitsJiri Pirko
2019-10-30mlxsw: reg: Increase size of MPAR registerIdo Schimmel
2019-10-22mlxsw: reg: Add macro for getting QSFP module EEPROM page numberVadim Pasternak
2019-10-15mlxsw: spectrum: Add support for 400Gbps (50Gbps per lane) link modesJiri Pirko
2019-10-06mlxsw: reg: Extend MGPIR register with new field exposing the number of QSFP ...Vadim Pasternak
2019-08-28mlxsw: Remove 56G speed supportAmit Cohen
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