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path: root/drivers/net/phy/phy-c45.c
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2020-02-26net: phy: corrected the return value for genphy_check_and_restart_aneg and ↵Sudheesh Mavila
genphy_c45_check_and_restart_aneg When auto-negotiation is not required, return value should be zero. Changes v1->v2: - improved comments and code as Andrew Lunn and Heiner Kallweit suggestion - fixed issue in genphy_c45_check_and_restart_aneg as Russell King suggestion. Fixes: 2a10ab043ac5 ("net: phy: add genphy_check_and_restart_aneg()") Fixes: 1af9f16840e9 ("net: phy: add genphy_c45_check_and_restart_aneg()") Signed-off-by: Sudheesh Mavila <sudheesh.mavila@amd.com> Reviewed-by: Heiner Kallweit <hkallweit1@gmail.com> Reviewed-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: David S. Miller <davem@davemloft.net>
2019-10-16net: phy: Fix "link partner" information disappear issueYonglong Liu
Some drivers just call phy_ethtool_ksettings_set() to set the links, for those phy drivers that use genphy_read_status(), if autoneg is on, and the link is up, than execute "ethtool -s ethx autoneg on" will cause "link partner" information disappear. The call trace is phy_ethtool_ksettings_set()->phy_start_aneg() ->linkmode_zero(phydev->lp_advertising)->genphy_read_status(), the link didn't change, so genphy_read_status() just return, and phydev->lp_advertising is zero now. This patch moves the clear operation of lp_advertising from phy_start_aneg() to genphy_read_lpa()/genphy_c45_read_lpa(), and if autoneg on and autoneg not complete, just clear what the generic functions care about. Fixes: 88d6272acaaa ("net: phy: avoid unneeded MDIO reads in genphy_read_status") Signed-off-by: Yonglong Liu <liuyonglong@huawei.com> Reviewed-by: Heiner Kallweit <hkallweit1@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2019-08-27Add genphy_c45_config_aneg() function to phy-c45.cMarco Hartmann
Commit 34786005eca3 ("net: phy: prevent PHYs w/o Clause 22 regs from calling genphy_config_aneg") introduced a check that aborts phy_config_aneg() if the phy is a C45 phy. This causes phy_state_machine() to call phy_error() so that the phy ends up in PHY_HALTED state. Instead of returning -EOPNOTSUPP, call genphy_c45_config_aneg() (analogous to the C22 case) so that the state machine can run correctly. genphy_c45_config_aneg() closely resembles mv3310_config_aneg() in drivers/net/phy/marvell10g.c, excluding vendor specific configurations for 1000BaseT. Fixes: 22b56e827093 ("net: phy: replace genphy_10g_driver with genphy_c45_driver") Signed-off-by: Marco Hartmann <marco.hartmann@nxp.com> Reviewed-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: David S. Miller <davem@davemloft.net>
2019-08-13net: phy: consider AN_RESTART status when reading link statusHeiner Kallweit
After configuring and restarting aneg we immediately try to read the link status. On some systems the PHY may not yet have cleared the "aneg complete" and "link up" bits, resulting in a false link-up signal. See [0] for a report. Clause 22 and 45 both require the PHY to keep the AN_RESTART bit set until the PHY actually starts auto-negotiation. Let's consider this in the generic functions for reading link status. The commit marked as fixed is the first one where the patch applies cleanly. [0] https://marc.info/?t=156518400300003&r=1&w=2 Fixes: c1164bb1a631 ("net: phy: check PMAPMD link status only in genphy_c45_read_link") Tested-by: Yonglong Liu <liuyonglong@huawei.com> Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com> Reviewed-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: Jakub Kicinski <jakub.kicinski@netronome.com>
2019-05-21treewide: Add SPDX license identifier for missed filesThomas Gleixner
Add SPDX license identifiers to all files which: - Have no license information of any form - Have EXPORT_.*_SYMBOL_GPL inside which was used in the initial scan/conversion to ignore the file These files fall under the project license, GPL v2 only. The resulting SPDX license identifier is: GPL-2.0-only Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2019-04-08net: phy: replace genphy_10g_driver with genphy_c45_driverHeiner Kallweit
Recently a number of generic functions for Clause 45 PHY's has been added. So let's replace the old very limited genphy_10g_driver with a genphy_c45_driver. This driver isn't limited to 10G, however it's worth to be noted that Clause 45 doesn't cover 1000Base-T. For using 1000Base-T with a Clause 45 PHY a dedicated PHY driver using vendor registers is needed. Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com> Reviewed-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: David S. Miller <davem@davemloft.net>
2019-04-02net: phy: deal properly with autoneg incomplete in genphy_c45_read_lpaHeiner Kallweit
The link partner advertisement registers are not guaranteed to contain valid values if autoneg is incomplete. Therefore, if MDIO_AN_STAT1_COMPLETE isn't set, let's clear all link partner capability bits. This also avoids unnecessary register reads if link is down and phylib is in polling mode. Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com> Reviewed-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: David S. Miller <davem@davemloft.net>
2019-04-02net: phy: use c45 standard to detect link partner autoneg capabilityHeiner Kallweit
Currently mii_lpa_mod_linkmode_lpa_t() checks bit LPA_LPACK to detect whether link partner supports autoneg. This doesn't work correctly at least on Aquantia AQCS109 when it negotiates 1000Base-T2 mode. The "link partner is autoneg-capable" bit as defined by clause 45 is set however. Better let's switch in general to use the clause 45 standard for link partner autoneg detection. Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com> Reviewed-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: David S. Miller <davem@davemloft.net>
2019-03-04net: phy: use phy_modify_mmd_changed in genphy_c45_an_config_anegHeiner Kallweit
As can be seen from the usage of the return value, we should use phy_modify_mmd_changed() here. Fixes: 9a5dc8af4416 ("net: phy: add genphy_c45_an_config_aneg") Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2019-03-03net: phy: remove gen10g_no_soft_resetHeiner Kallweit
genphy_no_soft_reset and gen10g_no_soft_reset are both the same no-ops, one is enough. Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com> Reviewed-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: David S. Miller <davem@davemloft.net>
2019-03-03net: phy: don't export gen10g_read_statusHeiner Kallweit
gen10g_read_status is deprecated, therefore stop exporting it. We don't want to encourage anybody to use it. Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com> Reviewed-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: David S. Miller <davem@davemloft.net>
2019-03-03net: phy: remove gen10g_config_initHeiner Kallweit
ETHTOOL_LINK_MODE_10000baseT_Full_BIT is set anyway in the supported and advertising bitmap because it's part of PHY_10GBIT_FEATURES. And all users of gen10g_config_init use PHY_10GBIT_FEATURES. Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com> Reviewed-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: David S. Miller <davem@davemloft.net>
2019-03-03net: phy: remove gen10g_suspend and gen10g_resumeHeiner Kallweit
phy_suspend() and phy_resume() are no-ops anyway if no callback is defined. Therefore we don't need these stubs. Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com> Reviewed-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: David S. Miller <davem@davemloft.net>
2019-02-24net: phy: check PMAPMD link status only in genphy_c45_read_linkHeiner Kallweit
The current code reports a link as up if all devices (except a few blacklisted ones) report the link as up. This breaks Aquantia AQCS109 for lower speeds because on this PHY the PCS link status reflects a 10G link only. For Marvell there's a similar issue, therefore PHYXS device isn't checked. There may be more PHYs where depending on the mode the link status of only selected devices is relevant. For now it seems to be sufficient to check the link status of the PMAPMD device only. Leave the loop in the code to be prepared in case we have to add functionality to check more than one device, depending on the mode. Successfully tested on a board with an AQCS109. Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2019-02-24net: phy: let genphy_c45_read_abilities also check aneg capabilityHeiner Kallweit
When using genphy_c45_read_abilities() as get_features callback we also have to set the autoneg capability in phydev->supported. Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com> Reviewed-by: Maxime Chevallier <maxime.chevallier@bootlin.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2019-02-23net: phy: add genphy_c45_read_statusHeiner Kallweit
Similar to genphy_read_status() for Clause 22 add a generic read_status function for Clause 45. Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2019-02-23net: phy: don't change modes we don't care about in genphy_c45_read_lpaHeiner Kallweit
Because 1000BaseT isn't covered by Clause 45, the 1000BaseT flags in phydev->lp_advertising may have been set based on vendor registers already. genphy_c45_read_lpa() would clear these flags as of today. Therefore switch to mii_lpa_mod_linkmode_lpa_t. Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2019-02-21net: phy: add genphy_c45_check_and_restart_anegHeiner Kallweit
This function will be used by config_aneg callback implementations of PHY drivers and allows to reduce boilerplate code. Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2019-02-21net: phy: use genphy_config_eee_advert in genphy_c45_an_config_anegHeiner Kallweit
Like in genphy_config_aneg() for clause 22 PHY's, we should keep modes from being advertised that are known to be broken with EEE. Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2019-02-20net: phy: disable aneg in genphy_c45_pma_setup_forcedHeiner Kallweit
When genphy_c45_pma_setup_forced() is called the "aneg enabled" bit may still be set, therefore clear it. This is also in line with what genphy_setup_forced() does for Clause 22. v2: - fix typo Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com> Reviewed-by: Florian Fainelli <f.fainelli@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2019-02-18net: phy: use mii_10gbt_stat_mod_linkmode_lpa_t in genphy_c45_read_lpaHeiner Kallweit
Use mii_10gbt_stat_mod_linkmode_lpa_t() in genphy_c45_read_lpa() to simplify the code. Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com> Reviewed-by: Florian Fainelli <f.fainelli@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2019-02-17net: phy: add genphy_c45_an_config_anegAndrew Lunn
C45 configuration of 10/100 and multi-giga bit auto negotiation advertisement is standardized. Configuration of 1000Base-T however appears to be vendor specific. Move the generic code out of the Marvell driver into the common phy-c45.c file. v2: - change function name to genphy_c45_an_config_aneg Signed-off-by: Andrew Lunn <andrew@lunn.ch> [hkallweit1@gmail.com: use new helper linkmode_adv_to_mii_10gbt_adv_t and split patch] Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com> Reviewed-by: Florian Fainelli <f.fainelli@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2019-02-13net: phy: Add generic support for 2.5GBaseT and 5GBaseTMaxime Chevallier
The 802.3bz specification, based on previous by the NBASET alliance, defines the 2.5GBaseT and 5GBaseT link modes for ethernet traffic on cat5e, cat6 and cat7 cables. These mode integrate with the already defined C45 MDIO PMA/PMD registers set that added 10G support, by defining some previously reserved bits, and adding a new register (2.5G/5G Extended abilities). This commit adds the required definitions in include/uapi/linux/mdio.h to support these modes, and detect when a link-partner advertises them. It also adds support for these mode in the generic C45 PHY infrastructure. Signed-off-by: Maxime Chevallier <maxime.chevallier@bootlin.com> Reviewed-by: Heiner Kallweit <hkallweit1@gmail.com> Reviewed-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: David S. Miller <davem@davemloft.net>
2019-02-13net: phy: Extract genphy_c45_pma_read_abilities from marvell10gMaxime Chevallier
Marvell 10G PHY driver has a generic way of initializing the supported link modes by reading the PHY's C45 PMA abilities. This can be made generic, since these registers are part of the 802.3 specifications. This commit extracts the config_init link_mode initialization code from marvell10g and uses it to introduce the genphy_c45_pma_read_abilities function. Only PMA modes are read, it's still up to the caller to set the Pause parameters. Signed-off-by: Maxime Chevallier <maxime.chevallier@bootlin.com> Reviewed-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: David S. Miller <davem@davemloft.net>
2019-02-08net: phy: don't double-read link status register if link is upHeiner Kallweit
The link status register latches link-down events. Therefore, if link is reported as being up, there's no need for a second read. Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2019-02-08net: phy: consider latched link-down status in polling modeHeiner Kallweit
The link status value latches link-down events. To get the current status we read the register twice in genphy_update_link(). There's a potential risk that we miss a link-down event in polling mode. This may cause issues if the user e.g. connects his machine to a different network. On the other hand reading the latched value may cause issues in interrupt mode. Following scenario: - After boot link goes up - phy_start() is called triggering an aneg restart, hence link goes down and link-down info is latched. - After aneg has finished link goes up and triggers an interrupt. Interrupt handler reads link status, means it reads the latched "link is down" info. But there won't be another interrupt as long as link stays up, therefore phylib will never recognize that link is up. Deal with both scenarios by reading the register twice in interrupt mode only. Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2019-02-07net: phy: let genphy_c45_read_link manage the devices to checkHeiner Kallweit
Let genphy_c45_read_link manage the devices to check, this removes overhead from callers. Add C22EXT to the list of excluded devices because it doesn't implement the status register. According to the 802.3 clause 45 spec registers 29.0 - 29.4 are reserved. At the moment we have very few clause 45 PHY drivers, so we are lacking experience whether other drivers will have to exclude further devices, or may need to check PHY XS. If we should figure out that list of devices to check needs to be configurable, I think best will be to add a device list member to struct phy_driver. v2: - adjusted commit message - exclude also device C22EXT from link checking Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com> Reviewed-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: David S. Miller <davem@davemloft.net>
2019-02-06net: phy: improve genphy_c45_read_linkHeiner Kallweit
Let's make genphy_c45_read_link behave the same as genphy_update_link and set phydev->link in the function directly. This allows to simplify the callers. In addition don't check further devices once we detect that at least one device reports link as down. v2: - remove an unused variable Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2019-02-06net: phy: make use of new MMD accessorsHeiner Kallweit
Make use of the new MMD accessors. v2: - fix SoB Signed-off-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com> Reviewed-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: David S. Miller <davem@davemloft.net>
2018-11-11net: phy: Convert u32 phydev->lp_advertising to linkmodeAndrew Lunn
Convert phy drivers to report the link partner advertised modes using a linkmode bitmap. This allows them to report the higher speeds which don't fit in a u32. Signed-off-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: David S. Miller <davem@davemloft.net>
2018-11-11net: ethernet: Convert phydev advertize and supported from u32 to link modeAndrew Lunn
There are a few MAC/PHYs combinations which now support > 1Gbps. These may need to make use of link modes with bits > 31. Thus their supported PHY features or advertised features cannot be implemented using the current bitmap in a u32. Convert to using a linkmode bitmap, which can support all the currently devices link modes, and is future proof as more modes are added. Signed-off-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: David S. Miller <davem@davemloft.net>
2018-10-25net: phy: genphy_10g_driver: Avoid NULL pointer dereferenceAndrew Lunn
This driver got missed during the recent change of .features from a u32 to a pointer to a Linux bitmap. Change the initialisation from 0 to PHY_10GBIT_FEATURES so removing the danger of a NULL pointer dereference. Fixes: 719655a14971 ("net: phy: Replace phy driver features u32 with link_mode bitmap") Reported-by: Jose Abreu <jose.abreu@synopsys.com> Signed-off-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: David S. Miller <davem@davemloft.net>
2018-03-04net: phy: Fix spelling mistake: "advertisment"-> "advertisement"Colin Ian King
Trivial fix to spelling mistake in comments and error message text. Signed-off-by: Colin Ian King <colin.king@canonical.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2018-03-01net: phy: Export gen10g_* functionsFlorian Fainelli
In order to remove a fair amount of duplication in the different 10G PHY drivers, export all gen10g_* functions to be able to make use of those. While we are at it, rename gen10g_soft_reset() to gen10g_no_soft_reset() to illustrate what it does. Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
2018-01-02net: phy: marvell10g: add MDI swap reportingRussell King
Add reporting of the MDI swap to the Marvell 10G PHY driver by providing a generic implementation for the standard 10GBASE-T pair swap register and polarity register. We also support reading the MDI swap status for 1G and below from a PCS register. Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk> Reviewed-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: David S. Miller <davem@davemloft.net>
2017-06-06net: phy: split out 10G genphy supportRussell King
Move the old 10G genphy support to sit beside the new clause 45 library functions, so all the 10G phy code is together. Reviewed-by: Andrew Lunn <andrew@lunn.ch> Reviewed-by: Florian Fainelli <f.fainelli@gmail.com> Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk> Signed-off-by: David S. Miller <davem@davemloft.net>
2017-06-06net: phy: add 802.3 clause 45 support to phylibRussell King
Add generic helpers for 802.3 clause 45 PHYs for >= 10Gbps support. Reviewed-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk> Reviewed-by: Florian Fainelli <f.fainelli@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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