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path: root/drivers/net/wireless/realtek/rtw89/phy.h
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2023-05-05wifi: rtw89: add RSSI based antenna diversityEric Huang
RSSI statistics are grouped by CCK, OFDM or non-legacy rate. These statistics will be collected in training state for both (main/aux) antenna. There is a time period (ANTDIV_DELAY) for rate adaptive settle down before start collect statistics when switch antenna. Antenna diversity checks packet count from training state for each group and use the most one as the final RSSI for comparison, and then choose the better one as target antenna. Signed-off-by: Eric Huang <echuang@realtek.com> Signed-off-by: Ping-Ke Shih <pkshih@realtek.com> Signed-off-by: Kalle Valo <kvalo@kernel.org> Link: https://lore.kernel.org/r/20230418012820.5139-7-pkshih@realtek.com
2023-04-03wifi: rtw89: config EDCCA threshold during scan to prevent TX failedChih-Kang Chang
Need to configure EDCCA threshold to default value before scan, and recall original value after scan to prevent probe request can't be sent out. Signed-off-by: Chih-Kang Chang <gary.chang@realtek.com> Signed-off-by: Ping-Ke Shih <pkshih@realtek.com> Signed-off-by: Kalle Valo <kvalo@kernel.org> Link: https://lore.kernel.org/r/20230322060238.43922-1-pkshih@realtek.com
2023-02-22wifi: rtw89: adjust channel encoding to common functionPo-Hao Huang
Since the range of channel table is identical among ICs. Make channel encode/decode function common and not IC dependent. So all ICs with matching firmware that needs this kind of coding can use it directly. This patch doesn't change logic at all. Signed-off-by: Po-Hao Huang <phhuang@realtek.com> Signed-off-by: Ping-Ke Shih <pkshih@realtek.com> Signed-off-by: Kalle Valo <kvalo@kernel.org> Link: https://lore.kernel.org/r/20230220070202.29868-4-pkshih@realtek.com
2022-11-22wifi: rtw89: switch BANDEDGE and TX_SHAPE based on OFDMA trigger frameEric Huang
There are some registers for transmit waveform control, two of them used in this change are for BANDEDGE and TX_SHAPE control. BANDEDGE controls whether to apply band edge filter to transmit waveform. TX_SHAPE controls whether to apply triangular mask to transmit waveform. It is found for some chip, these two should be turned off during OFDMA UL traffic for better performance. Signed-off-by: Eric Huang <echuang@realtek.com> Signed-off-by: Ping-Ke Shih <pkshih@realtek.com> Signed-off-by: Kalle Valo <kvalo@kernel.org> Link: https://lore.kernel.org/r/20221117063001.42967-3-pkshih@realtek.com
2022-11-01wifi: rtw89: collect and send RF parameters to firmware for WoWLANChih-Kang Chang
For WoWLAN mode, we only collect and send RF parameters to Firmware without writing RF registers. So we add one function to practice it. Signed-off-by: Chih-Kang Chang <gary.chang@realtek.com> Signed-off-by: Ping-Ke Shih <pkshih@realtek.com> Signed-off-by: Kalle Valo <kvalo@kernel.org> Link: https://lore.kernel.org/r/20221027052707.14605-2-pkshih@realtek.com
2022-10-19wifi: rtw89: phy: add dummy C2H handler to avoid warning messagePing-Ke Shih
The C2H class 2 function 3 is to report retry count of low rate, but driver doesn't implement yet, so add a dummy case to avoid message: rtw89_8852be 0000:03:00.0: c2h class 2 not support Signed-off-by: Ping-Ke Shih <pkshih@realtek.com> Signed-off-by: Kalle Valo <kvalo@kernel.org> Link: https://lore.kernel.org/r/20221014060237.29050-4-pkshih@realtek.com
2022-10-11wifi: rtw89: 8852b: add chip_ops::set_channelPing-Ke Shih
set_channel is main function to configure channel and bandwidth for all layers, namely MAC, BB and RF. Additionally, MAC layer enables CCK rate checking to avoid wrong rate from driver. BB layer configures SCO (Sample Clock Offset) for CCK, TX gain error/offset, and reset baseband hardware circuit after all configurations done. Signed-off-by: Ping-Ke Shih <pkshih@realtek.com> Signed-off-by: Kalle Valo <kvalo@kernel.org> Link: https://lore.kernel.org/r/20221005083212.45683-7-pkshih@realtek.com
2022-10-11wifi: rtw89: make generic functions to convert subband gain indexPing-Ke Shih
The gain tables use different domain index, so we need to convert the index from subband of chandef. Since these conversion functions can share with 8852b, make generic functions for further use. Signed-off-by: Ping-Ke Shih <pkshih@realtek.com> Signed-off-by: Kalle Valo <kvalo@kernel.org> Link: https://lore.kernel.org/r/20221005083212.45683-6-pkshih@realtek.com
2022-10-04wifi: rtw89: phy: make generic txpwr setting functionsZong-Zhe Yang
Previously, we thought control registers or setting things for TX power series may change according to chip. So, setting functions are implemented chip by chip. However, until now, the functions keep the same among chips, at least 8852A, 8852C, and 8852B. There is a sufficient number of chips to share generic setting functions. So, we now remake them including TX power by rate, TX power offset, TX power limit, and TX power limit RU as generic ones in phy.c. Besides, there are some code refinements in the generic ones, but almost all of the logic doesn't change. Signed-off-by: Zong-Zhe Yang <kevin_yang@realtek.com> Signed-off-by: Ping-Ke Shih <pkshih@realtek.com> Signed-off-by: Kalle Valo <kvalo@kernel.org> Link: https://lore.kernel.org/r/20220928084336.34981-5-pkshih@realtek.com
2022-09-12wifi: rtw89: support TX diversity for 1T2R chipsetPing-Ke Shih
Check RSSI strength to decide which path is better, and then set TX path accordingly. Signed-off-by: Ping-Ke Shih <pkshih@realtek.com> Signed-off-by: Kalle Valo <kvalo@kernel.org> Link: https://lore.kernel.org/r/20220908074140.39776-6-pkshih@realtek.com
2022-09-02wifi: rtw89: enlarge the CFO tracking boundaryCheng-Chieh Hsieh
The calibration value of XTAL offset may be too large in some wifi modules, that the CFO tracking mechanism under the existing tracking boundary can not adjust the CFO to the tolerable range. So we enlarge it. Signed-off-by: Cheng-Chieh Hsieh <cj.hsieh@realtek.com> Signed-off-by: Ping-Ke Shih <pkshih@realtek.com> Signed-off-by: Kalle Valo <kvalo@kernel.org> Link: https://lore.kernel.org/r/20220824061425.13764-1-pkshih@realtek.com
2022-09-02wifi: rtw89: txpwr: concentrate channel related control to topZong-Zhe Yang
For future support on multiple channels, it would be disturbing if we still allow scattered leaf functions of TX power to query and manage channel related control by themselves. So, query rtw89_chan only on top functions. Then, pass it via functions to make sure that the values coming from the same struct rtw89_chan. Besides, fix rtw8852a_set_txpwr_offset() from rtw8852a_set_txpwr_ctrl() to rtw8852a_set_txpwr(). TX power offset should consider current band, so move it to chip_ops::set_txpwr() which will be called every time that channel is set. Signed-off-by: Zong-Zhe Yang <kevin_yang@realtek.com> Signed-off-by: Ping-Ke Shih <pkshih@realtek.com> Signed-off-by: Kalle Valo <kvalo@kernel.org> Link: https://lore.kernel.org/r/20220809104952.61355-6-pkshih@realtek.com
2022-09-02wifi: rtw89: introduce rtw89_chan for channel stuffsZong-Zhe Yang
Introduce struct rtw89_chan ahead to encapsulate stuffs from struct rtw89_channel_params. These stuffs have a clone in HAL and are used throughout driver. After multiple channels support, it's expected that each channel instance has a configuration of them. So, we refine them with struct rtw89_chan by precise type first, and will re-arrange HAL by struct rtw89_chan in the following as well. (No logic has changed.) Signed-off-by: Zong-Zhe Yang <kevin_yang@realtek.com> Signed-off-by: Ping-Ke Shih <pkshih@realtek.com> Signed-off-by: Kalle Valo <kvalo@kernel.org> Link: https://lore.kernel.org/r/20220809104952.61355-3-pkshih@realtek.com
2022-06-10rtw89: add new state to CFO state machine for UL-OFDMAEric Huang
Add an new state, RTW89_PHY_DCFO_STATE_HOLD, to keep CFO acceleration after CFO_PERIOD_CNT if the traffic is UL-OFDMA, which is calculated based on RX trigger frame counter. Signed-off-by: Eric Huang <echuang@realtek.com> Signed-off-by: Ping-Ke Shih <pkshih@realtek.com> Signed-off-by: Kalle Valo <kvalo@kernel.org> Link: https://lore.kernel.org/r/20220608113224.11193-4-pkshih@realtek.com
2022-05-17rtw89: add ieee80211::sta_rc_update opsPing-Ke Shih
When peer's NSS, rate or bandwidth is changed, we update RA(rate adaptive) mask to ensure transmitting packets properly. Signed-off-by: Ping-Ke Shih <pkshih@realtek.com> Signed-off-by: Kalle Valo <kvalo@kernel.org> Link: https://lore.kernel.org/r/20220516005215.5878-2-pkshih@realtek.com
2022-04-23rtw89: 8852c: add set channel of BB partPing-Ke Shih
BB does many settings during setting channel. First is to configure CCK for 2G channels, and then basic channel and bandwidth settings with a encoded channel index that will report to driver when we receive packets. Configure spur elimination to avoid spur of CSI and NBI tones in certain frequencies. Also, it initializes BT grant to arrange path sharing with BT according to band. Finally, reset TSSI and BB hardware to ensure it stays in initial state. Signed-off-by: Ping-Ke Shih <pkshih@realtek.com> Signed-off-by: Kalle Valo <kvalo@kernel.org> Link: https://lore.kernel.org/r/20220414062027.62638-12-pkshih@realtek.com
2022-04-23rtw89: 8852c: phy: configure TSSI bandedgePing-Ke Shih
TSSI is used to manage TX power with thermal value as a factor. This patch is to configure bandedge to TX proper waveform. Signed-off-by: Ping-Ke Shih <pkshih@realtek.com> Signed-off-by: Kalle Valo <kvalo@kernel.org> Link: https://lore.kernel.org/r/20220414062027.62638-5-pkshih@realtek.com
2022-04-23rtw89: 8852c: add TX power track tablesZong-Zhe Yang
TX power track tables are used to do TX power compensation according to thermal value. In order to work in existing and new chip, add new 6G entries, and change type from u8 to s8. Internal version table is HALRF_027_00_031. Signed-off-by: Zong-Zhe Yang <kevin_yang@realtek.com> Signed-off-by: Ping-Ke Shih <pkshih@realtek.com> Signed-off-by: Kalle Valo <kvalo@kernel.org> Link: https://lore.kernel.org/r/20220414062027.62638-4-pkshih@realtek.com
2022-03-17rtw89: add config_rf_reg_v1 to configure RF parameter tablesPing-Ke Shih
The format of RF parameter is changed; it doesn't encode delay parameters into table, but the delay coding becomes regular pair of register address and value. To help firmware to recover RF register settings, we need to download these parameters to firmware. For v1 format, only download partial parameters (ignore them with addr < 0x100). Signed-off-by: Ping-Ke Shih <pkshih@realtek.com> Signed-off-by: Kalle Valo <kvalo@kernel.org> Link: https://lore.kernel.org/r/20220317055543.40514-6-pkshih@realtek.com
2022-03-17rtw89: 8852c: add read/write rf register functionChung-Hsuan Hung
Using encoded address which BIT(16) is used to discriminate which region is going to access. Illustrate the calling flow as below rtw89_phy_write_rf_v1() -+-> rtw89_phy_write_rf() // old interface +-> rtw89_phy_write_rf_a() // new interface Signed-off-by: Chung-Hsuan Hung <hsuan8331@realtek.com> Signed-off-by: Ping-Ke Shih <pkshih@realtek.com> Signed-off-by: Kalle Valo <kvalo@kernel.org> Link: https://lore.kernel.org/r/20220317055543.40514-5-pkshih@realtek.com
2022-02-22rtw89: Limit the CFO boundaries of x'tal valueYi-Tang Chiu
Set the boundaries of x'tal value to avoid extremely adjusted results, causing severely unexpected CFO. Signed-off-by: Yi-Tang Chiu <chiuyitang@realtek.com> Signed-off-by: Yuan-Han Zhang <yuanhan1020@realtek.com> Signed-off-by: Ping-Ke Shih <pkshih@realtek.com> Signed-off-by: Kalle Valo <kvalo@kernel.org> Link: https://lore.kernel.org/r/20220218034537.9338-1-pkshih@realtek.com
2022-02-14rtw89: refine naming of rfk helpers with prefixZong-Zhe Yang
Since these macro in rfk helpers are common now, a common naming should be better. So, apply RTW89_ as prefix to them, and modify the use correspondly. No logic is changed at all. Signed-off-by: Zong-Zhe Yang <kevin_yang@realtek.com> Signed-off-by: Ping-Ke Shih <pkshih@realtek.com> Signed-off-by: Kalle Valo <kvalo@kernel.org> Link: https://lore.kernel.org/r/20220211075953.40421-3-pkshih@realtek.com
2022-02-14rtw89: make rfk helpers common across chipsZong-Zhe Yang
These rfk helpers are also useful for the chip which is under planning. So, move them to common code to avoid duplicate stuff in the future. Signed-off-by: Zong-Zhe Yang <kevin_yang@realtek.com> Signed-off-by: Ping-Ke Shih <pkshih@realtek.com> Signed-off-by: Kalle Valo <kvalo@kernel.org> Link: https://lore.kernel.org/r/20220211075953.40421-2-pkshih@realtek.com
2022-01-28rtw89: refine DIG feature to support 160M and CCK PDJohnson Lin
DIG, which is short for dynamic initial gain, is used to adjust gain to get good RX performance. CCK PD feature, a mechanism that adjusts 802.11b CCK packet detection(PD) power threshold based on environment noisy level in order to avoid false alarm. Also, refine related variable naming. Signed-off-by: Johnson Lin <johnson.lin@realtek.com> Signed-off-by: Ping-Ke Shih <pkshih@realtek.com> Signed-off-by: Kalle Valo <kvalo@kernel.org> Link: https://lore.kernel.org/r/20220121075555.12457-1-pkshih@realtek.com
2022-01-28rtw89: extract modules by chipsetZong-Zhe Yang
We are planning to support more chipsets, e.g. 8852C. Before that, we consider architecutre to handle multiple kinds of chipsets. Obviosuly, based on original design, rtw89_core module will have large size even if there is only one chipset under running. It is because all chipset related things are put in rtw89_core now. To reduce such overhead, we extract modules of rtw89 and adjust dependencies between modules. The following assumes that 8852AE, 8852AU, and 8852CE are all supported, we describe the difference before and after extraction. [Before extraction] ------------- |------------------------------------ | rtw89_usb | V ------------- --------------------------------------- ------------- | rtw89_core (including 8852A, 8852C) | <--- | rtw89_pci | --------------------------------------- ------------- The data of 8852A and 8852C are built in rtw89_core. And rtw89_pci is the entry of 8852AE and 8852CE. And rtw89_usb is the entry of 8852AU. [After extraction] ------------- ---------------- |----------- | rtw89_usb | <-------- | rtw89_8852au | | ------------- ---------------- V --------------- | -------------- | | <--------------- | rtw89_core | <--- | rtw89_8852a | -------------- | | <--------------- ^ ^ --------------- | | | ------------- ---------------- | | | | <-------- | rtw89_8852ae | | |----------- | rtw89_pci | ---------------- | | | <----------------- | ------------- | | --------------- ---------------- |--------------- | rtw89_8852c | <------ | rtw89_8852ce | --------------- ---------------- The data of 8852A/8852C is extracted to rtw89_8852a/rtw89_8852c. And rtw89_pci/rtw89_usb handles only common flow of pci/usb bus. Finally, 8852AE, 8852AU, and 8852CE have individual entry modules, i.e. rtw89_8852ae, rtw89_8852au, and rtw89_8852ce correspondingly. Signed-off-by: Zong-Zhe Yang <kevin_yang@realtek.com> Signed-off-by: Ping-Ke Shih <pkshih@realtek.com> Signed-off-by: Kalle Valo <kvalo@kernel.org> Link: https://lore.kernel.org/r/20211221025828.25092-1-pkshih@realtek.com
2021-12-08rtw89: fix incorrect channel info during scanPo Hao Huang
We used to fill in rx skbs' frequency field by mac80211's current channel value. In some cases, mac80211 switches channel before all rx packets have been processed. This results in incorrect bss info. We fix this by filling in frequency field with channel index obtained from hardware, then fix potential cck missing issue by skb's original hw rate. After all fix is done, convert hw rate back to the supported band rate index. Signed-off-by: Po Hao Huang <phhuang@realtek.com> Signed-off-by: Ping-Ke Shih <pkshih@realtek.com> Signed-off-by: Kalle Valo <kvalo@kernel.org> Link: https://lore.kernel.org/r/20211111023706.14154-3-pkshih@realtek.com
2021-10-13rtw89: add Realtek 802.11ax driverPing-Ke Shih
This driver named rtw89, which is the next generation of rtw88, supports Realtek 8852AE 802.11ax 2x2 chip whose new features are OFDMA, DBCC, Spatial reuse, TWT and BSS coloring; now some of them aren't implemented though. The chip architecture is entirely different from the chips supported by rtw88 like RTL8822CE 802.11ac chip. First of all, register address ranges are totally redefined, so it's impossible to reuse register definition. To communicate with firmware, new H2C/C2H format is proposed. In order to have better utilization, TX DMA flow is changed to two stages DMA. To provide rich RX status information, additional RX PPDU packets are added. Since there are so many differences mentioned above, we decide to propose a new driver. It has many authors, they are listed in alphabetic order: Chin-Yen Lee <timlee@realtek.com> Ping-Ke Shih <pkshih@realtek.com> Po Hao Huang <phhuang@realtek.com> Tzu-En Huang <tehuang@realtek.com> Vincent Fann <vincent_fann@realtek.com> Yan-Hsuan Chuang <tony0620emma@gmail.com> Zong-Zhe Yang <kevin_yang@realtek.com> Tested-by: Aaron Ma <aaron.ma@canonical.com> Tested-by: Brian Norris <briannorris@chromium.org> Signed-off-by: Ping-Ke Shih <pkshih@realtek.com> Signed-off-by: Kalle Valo <kvalo@codeaurora.org> Link: https://lore.kernel.org/r/20211008035627.19463-1-pkshih@realtek.com
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