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2020-05-04net: ethernet: ti: am65-cpsw-nuss: enable packet timestamping supportGrygorii Strashko
The MCU CPSW Common Platform Time Sync (CPTS) provides possibility to timestamp TX PTP packets and all RX packets. This enables corresponding support in TI AM65x/J721E MCU CPSW driver. Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2020-05-04net: ethernet: ti: introduce am654 common platform time sync driverGrygorii Strashko
The CPTS module is used to facilitate host control of time sync operations. Main features of CPTS module are: - selection of multiple external clock sources - control of time sync events via interrupt or polling - 64-bit timestamp mode in ns with HW PPM and nudge adjustment. - hardware timestamp ext. inputs (HWx_TS_PUSH) - timestamp Generator function outputs (TS_GENFx) Depending on integration it enables compliance with the IEEE 1588-2008 standard for a precision clock synchronization protocol, Ethernet Enhanced Scheduled Traffic Operations (CPTS_ESTFn) and PCIe Subsystem Precision Time Measurement (PTM). Introduced driver provides Linux PTP hardware clock for each CPTS device and network packets timestamping where applicable. CPTS PTP hardware clock supports following operations: - Set time - Get time - Shift the clock by a given offset atomically - Adjust clock frequency - Time stamp external events - Periodic output signals Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2020-05-04net: ipa: define SMEM memory region for IPAAlex Elder
Arrange to use an item from SMEM memory for IPA. SMEM item number 497 is designated to be used by the IPA. Specify the item ID and size of the region in platform configuration data. Allocate and get a pointer to this region from ipa_mem_init(). The memory must be mapped for access through an SMMU. Signed-off-by: Alex Elder <elder@linaro.org> Signed-off-by: David S. Miller <davem@davemloft.net>
2020-05-04net: ipa: define IMEM memory region for IPAAlex Elder
Define a region of IMEM memory available for use by IPA in the platform configuration data. Initialize it from ipa_mem_init(). The memory must be mapped for access through an SMMU. Signed-off-by: Alex Elder <elder@linaro.org> Signed-off-by: David S. Miller <davem@davemloft.net>
2020-05-04net: ipa: redefine struct ipa_mem_dataAlex Elder
The ipa_mem_data structure type was never actually used. Instead, the IPA memory regions were defined using the ipa_mem structure. Redefine struct ipa_mem_data so it encapsulates the array of IPA-local memory region descriptors along with the count of entries in that array. Pass just an ipa_mem structure pointer to ipa_mem_init(). Rename the ipa_mem_data[] array ipa_mem_local_data[] to emphasize that the memory regions it defines are IPA-local memory. Signed-off-by: Alex Elder <elder@linaro.org> Signed-off-by: David S. Miller <davem@davemloft.net>
2020-05-04r8169: use new helper eth_hw_addr_crcHeiner Kallweit
Use new helper eth_hw_addr_crc to simplify the code. Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2020-05-04net: dsa: felix: allow the device to be disabledMichael Walle
If there is no specific configuration of the felix switch in the device tree, but only the default configuration (ie. given by the SoCs dtsi file), the probe fails because no CPU port has been set. On the other hand you cannot set a default CPU port because that depends on the actual board using the switch. [ 2.701300] DSA: tree 0 has no CPU port [ 2.705167] mscc_felix 0000:00:00.5: Failed to register DSA switch: -22 [ 2.711844] mscc_felix: probe of 0000:00:00.5 failed with error -22 Thus let the device tree disable this device entirely, like it is also done with the enetc driver of the same SoC. Signed-off-by: Michael Walle <michael@walle.cc> Reviewed-by: Vladimir Oltean <vladimir.oltean@nxp.com> Reviewed-by: Florian Fainelli <f.fainelli@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2020-05-04bnxt_en: show only relevant ethtool stats for a TX or RX ringRajesh Ravi
Currently, ethtool -S shows all TX/RX ring counters whether the channel is combined, RX, or TX. The unused counters will always be zero. Improve it by showing only the relevant counters if the channel is RX or TX. If the channel is combined, the counters will be shown exactly the same as before. [ MChan: Lots of cleanups and simplifications on Rajesh's original code] Signed-off-by: Rajesh Ravi <rajesh.ravi@broadcom.com> Signed-off-by: Michael Chan <michael.chan@broadcom.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2020-05-04bnxt_en: Split HW ring statistics strings into RX and TX parts.Michael Chan
This will allow the RX and TX ring statistics to be separated if needed. In the next patch, we'll be able to only display RX or TX statistcis if the channel is RX only or TX only. Signed-off-by: Michael Chan <michael.chan@broadcom.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2020-05-04bnxt_en: Refactor the software ring counters.Michael Chan
We currently have 3 software ring counters, rx_l4_csum_errors, rx_buf_errors, and missed_irqs. The 1st two are RX counters and the last one is a common counter. Organize them into 2 structures bnxt_rx_sw_stats and bnxt_cmn_sw_stats. Signed-off-by: Michael Chan <michael.chan@broadcom.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2020-05-04bnxt_en: Add doorbell information to bnxt_en_dev struct.Michael Chan
The purpose of this is to inform the RDMA driver the size of the doorbell BAR that the L2 driver has mapped and the portion that is mapped uncacheable. The unchaeable portion is shared with the RoCE driver. Any remaining unmapped doorbell BAR can be used by the RDMA driver for its own purpose. Currently, the entire L2 portion is mapped uncacheable. Signed-off-by: Michael Chan <michael.chan@broadcom.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2020-05-04bnxt_en: Add support for L2 doorbell size.Michael Chan
Read the L2 doorbell size from the firmware and only map the portion of the doorbell BAR for L2 use. This will leave the remaining doorbell BAR available for the RoCE driver to use. The RoCE driver can map the remaining portion as write-combining to support the push feature. Signed-off-by: Michael Chan <michael.chan@broadcom.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2020-05-04bnxt_en: Set the db_offset on 57500 chips for the RDMA MSIX entries.Michael Chan
The driver provides completion ring or NQ doorbell offset for each MSIX entry requested by the RDMA driver. The NQ offset on 57500 chips is different than legacy chips. Set it correctly based on chip type for correctness. The RDMA driver is ignoring this field for the 57500 chips so it is not causing any problem. Signed-off-by: Michael Chan <michael.chan@broadcom.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2020-05-04bnxt_en: Define the doorbell offsets on 57500 chips.Michael Chan
Define the 57500 chip doorbell offsets instead of using the magic values in the C file. Signed-off-by: Michael Chan <michael.chan@broadcom.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2020-05-04bnxt_en: Improve kernel log messages related to ethtool reset.Edwin Peer
Kernel log messages for failed AP reset commands should be suppressed. These are expected to fail on devices that do not have an AP. Add missing driver reload message after AP reset and log it in a common way without duplication. Signed-off-by: Edwin Peer <edwin.peer@broadcom.com> Signed-off-by: Michael Chan <michael.chan@broadcom.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2020-05-04bnxt_en: fix ethtool_reset_flags ABI violationsEdwin Peer
The ethtool ABI specifies that the reset operation should only clear the flags that were actually reset. Setting the flags to zero after a chip reset violates this because it does not include resetting the application processor complex. Similarly, components that are not yet defined are also not necessarily being reset. The fact that chip reset does not cover the AP also means that it is inappropriate to treat these two components exclusively of one another. The ABI provides a mechanism to report a failure to reset independent components via the returned bitmask, so it is also wrong to fail hard if one of a set of independent resets is not possible. It is incorrect to rely on the passed by reference flags in bnxt_reset(), which are being updated as components are reset. The initially requested value should be used instead so that hard errors do not propagate if any earlier components could have been reset successfully. Note, AP and chip resets are global in nature. Dedicated resets are thus not currently supported. Signed-off-by: Edwin Peer <edwin.peer@broadcom.com> Signed-off-by: Michael Chan <michael.chan@broadcom.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2020-05-04bnxt_en: refactor ethtool firmware reset typesEdwin Peer
The case statement in bnxt_firmware_reset() dangerously mixes types. This patch separates the application processor and whole chip resets from the rest such that the selection is performed on a pure type. Signed-off-by: Edwin Peer <edwin.peer@broadcom.com> Signed-off-by: Michael Chan <michael.chan@broadcom.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2020-05-04bnxt_en: prepare to refactor ethtool reset typesEdwin Peer
Extract bnxt_hwrm_firmware_reset() for performing firmware reset operations. This new helper function will be used in a subsequent patch to separate unrelated reset types out of bnxt_firmware_reset(). Signed-off-by: Edwin Peer <edwin.peer@broadcom.com> Signed-off-by: Michael Chan <michael.chan@broadcom.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2020-05-04bnxt_en: Do not include ETH_FCS_LEN in the max packet length sent to fw.Vasundhara Volam
The firmware does not expect the CRC to be included in the length passed from the driver. The firmware always configures the chip to strip out the CRC. Signed-off-by: Vasundhara Volam <vasundhara-v.volam@broadcom.com> Signed-off-by: Michael Chan <michael.chan@broadcom.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2020-05-04bnxt_en: Improve TQM ring context memory sizing formulas.Michael Chan
The current formulas to calculate the TQM slow path and fast path ring context memory sizes are not quite correct. TQM slow path entry is array index 0 of ctx->tqm_mem[]. The other array entries are for fast path. Fix these sizes according to latest firmware spec. for 57500 and newer chips. Fixes: 3be8136ce14e ("bnxt_en: Initialize context memory to the value specified by firmware.") Signed-off-by: Michael Chan <michael.chan@broadcom.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2020-05-04bnxt_en: Allocate TQM ring context memory according to fw specification.Michael Chan
Newer firmware spec. will specify the number of TQM rings to allocate context memory for. Use the firmware specified value and fall back to the old value derived from bp->max_q if it is not available. Signed-off-by: Michael Chan <michael.chan@broadcom.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2020-05-04bnxt_en: Update firmware spec. to 1.10.1.33.Michael Chan
Changes include additional statistics, ECN support, context memory interface change for better TQM context memory sizing, firmware health status definitions, etc. Signed-off-by: Michael Chan <michael.chan@broadcom.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2020-05-03net: ena: cosmetic: extract code to ena_indirection_table_set()Arthur Kiyanovski
Extract code to ena_indirection_table_set() to make the code cleaner. Signed-off-by: Sameeh Jubran <sameehj@amazon.com> Signed-off-by: Arthur Kiyanovski <akiyano@amazon.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2020-05-03net: ena: cosmetic: remove unnecessary spaces and tabs in ena_com.h macrosSameeh Jubran
The macros in ena_com.h have inconsistent spaces between the macro name and it's value. This commit sets all the macros to have a single space between the name and value. Signed-off-by: Arthur Kiyanovski <akiyano@amazon.com> Signed-off-by: Sameeh Jubran <sameehj@amazon.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2020-05-03net: ena: use SHUTDOWN as reset reason when closing interfaceSameeh Jubran
The 'ENA_REGS_RESET_SHUTDOWN' enum indicates a normal driver shutdown / removal procedure. Also, a comment is added to one of the reset reason assignments for code clarity. Signed-off-by: Shay Agroskin <shayagr@amazon.com> Signed-off-by: Arthur Kiyanovski <akiyano@amazon.com> Signed-off-by: Sameeh Jubran <sameehj@amazon.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2020-05-03net: ena: drop superfluous prototypeArthur Kiyanovski
Before this commit there was a function prototype named ena_com_get_ena_admin_polling_mode() that was never implemented. This patch simply deletes it. Signed-off-by: Igor Chauskin <igorch@amazon.com> Signed-off-by: Arthur Kiyanovski <akiyano@amazon.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2020-05-03net: ena: add support for reporting of packet dropsSameeh Jubran
1. Add support for getting tx drops from the device and saving them in the driver. 2. Report tx via netdev stats. Signed-off-by: Igor Chauskin <igorch@amazon.com> Signed-off-by: Guy Tzalik <gtzalik@amazon.com> Signed-off-by: Arthur Kiyanovski <akiyano@amazon.com> Signed-off-by: Sameeh Jubran <sameehj@amazon.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2020-05-03net: ena: add unmask interrupts statistics to ethtoolSameeh Jubran
Add unmask interrupts statistics to ethtool. Signed-off-by: Netanel Belgazal <netanel@amazon.com> Signed-off-by: Arthur Kiyanovski <akiyano@amazon.com> Signed-off-by: Sameeh Jubran <sameehj@amazon.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2020-05-03net: ena: remove code that does nothingSameeh Jubran
Both key and func parameters are pointers on the stack. Setting them to NULL does nothing. The original intent was to leave the key and func unset in this case, but for this to happen nothing needs to be done as the calling function ethtool_get_rxfh() already clears key and func. This commit removes the above described useless code. Signed-off-by: Arthur Kiyanovski <akiyano@amazon.com> Signed-off-by: Sameeh Jubran <sameehj@amazon.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2020-05-03net: ena: changes to RSS hash key allocationSameeh Jubran
This commit contains 2 cosmetic changes: 1. Use ena_com_check_supported_feature_id() in ena_com_hash_key_fill_default_key() instead of rewriting its implementation. This also saves us a superfluous admin command by using the cached value. 2. Change if conditions in ena_com_rss_init() to be clearer. Signed-off-by: Arthur Kiyanovski <akiyano@amazon.com> Signed-off-by: Sameeh Jubran <sameehj@amazon.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2020-05-03net: ena: change default RSS hash function to ToeplitzArthur Kiyanovski
Currently in the driver we are setting the hash function to be CRC32. Starting with this commit we want to change the default behaviour so that we set the hash function to be Toeplitz instead. Signed-off-by: Sameeh Jubran <sameehj@amazon.com> Signed-off-by: Arthur Kiyanovski <akiyano@amazon.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2020-05-03net: ena: allow setting the hash function without changing the keySameeh Jubran
Current code does not allow setting the hash function without changing the key. This commit enables it. To achieve this we separate ena_com_get_hash_function() to 2 functions: ena_com_get_hash_function() - which gets only the hash function, and ena_com_get_hash_key() - which gets only the hash key. Also return 0 instead of rc at the end of ena_get_rxfh() since all previous operations succeeded. Signed-off-by: Arthur Kiyanovski <akiyano@amazon.com> Signed-off-by: Sameeh Jubran <sameehj@amazon.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2020-05-03net: ena: fix error returning in ena_com_get_hash_function()Arthur Kiyanovski
In case the "func" parameter is NULL we now return "-EINVAL". This shouldn't happen in general, but when it does happen, this is the proper way to handle it. We also check func for NULL in the beginning of the function, as there is no reason to do all the work and realize in the end of the function it was useless. Signed-off-by: Sameeh Jubran <sameehj@amazon.com> Signed-off-by: Arthur Kiyanovski <akiyano@amazon.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2020-05-03net: ena: avoid unnecessary admin command when RSS function set failsArthur Kiyanovski
Currently when ena_set_hash_function() fails the hash function is restored to the previous value by calling an admin command to get the hash function from the device. In this commit we avoid the admin command, by saving the previous hash function before calling ena_set_hash_function() and using this previous value to restore the hash function in case of failure of ena_set_hash_function(). Signed-off-by: Sameeh Jubran <sameehj@amazon.com> Signed-off-by: Arthur Kiyanovski <akiyano@amazon.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2020-05-02net: ethernet: fec: Replace interrupt driven MDIO with polled IOAndrew Lunn
Measurements of the MDIO bus have shown that driving the MDIO bus using interrupts is slow. Back to back MDIO transactions take about 90us, with 25us spent performing the transaction, and the remainder of the time the bus is idle. Replacing the completion interrupt with polled IO results in back to back transactions of 40us. The polling loop waiting for the hardware to complete the transaction takes around 28us. Which suggests interrupt handling has an overhead of 50us, and polled IO nearly halves this overhead, and doubles the MDIO performance. Care has to be taken when setting the MII_SPEED register, or it can trigger an MII event> That then upsets the polling, due to an unexpected pending event. Suggested-by: Chris Heally <cphealy@gmail.com> Signed-off-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: David S. Miller <davem@davemloft.net>
2020-05-01Merge branch 'net-smc-extent-buffer-mapping-and-port-handling'David S. Miller
Karsten Graul says: ==================== net/smc: extent buffer mapping and port handling Add functionality to map/unmap and register/unregister memory buffers for specific SMC-R links and for the whole link group. Prepare LLC layer messages for the support of multiple links and extent the processing of adapter events. And add further small preparations needed for the SMC-R failover support. ==================== Signed-off-by: David S. Miller <davem@davemloft.net>
2020-05-01net: enetc: add tc flower psfp offload driverPo Liu
This patch is to add tc flower offload for the enetc IEEE 802.1Qci(PSFP) function. There are four main feature parts to implement the flow policing and filtering for ingress flow with IEEE 802.1Qci features. They are stream identify(this is defined in the P802.1cb exactly but needed for 802.1Qci), stream filtering, stream gate and flow metering. Each function block includes many entries by index to assign parameters. So for one frame would be filtered by stream identify first, then flow into stream filter block by the same handle between stream identify and stream filtering. Then flow into stream gate control which assigned by the stream filtering entry. And then policing by the gate and limited by the max sdu in the filter block(optional). At last, policing by the flow metering block, index choosing at the fitering block. So you can see that each entry of block may link to many upper entries since they can be assigned same index means more streams want to share the same feature in the stream filtering or stream gate or flow metering. To implement such features, each stream filtered by source/destination mac address, some stream maybe also plus the vlan id value would be treated as one flow chain. This would be identified by the chain_index which already in the tc filter concept. Driver would maintain this chain and also with gate modules. The stream filter entry create by the gate index and flow meter(optional) entry id and also one priority value. Offloading only transfer the gate action and flow filtering parameters. Driver would create (or search same gate id and flow meter id and priority) one stream filter entry to set to the hardware. So stream filtering do not need transfer by the action offloading. This architecture is same with tc filter and actions relationship. tc filter maintain the list for each flow feature by keys. And actions maintain by the action list. Below showing a example commands by tc: > tc qdisc add dev eth0 ingress > ip link set eth0 address 10:00:80:00:00:00 > tc filter add dev eth0 parent ffff: protocol ip chain 11 \ flower skip_sw dst_mac 10:00:80:00:00:00 \ action gate index 10 \ sched-entry open 200000000 1 8000000 \ sched-entry close 100000000 -1 -1 Command means to set the dst_mac 10:00:80:00:00:00 to index 11 of stream identify module. Then setting the gate index 10 of stream gate module. Keep the gate open for 200ms and limit the traffic volume to 8MB in this sched-entry. Then direct the frames to the ingress queue 1. Signed-off-by: Po Liu <Po.Liu@nxp.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2020-05-01net: enetc: add hw tc hw offload features for PSPF capabilityPo Liu
This patch is to let ethtool enable/disable the tc flower offload features. Hardware ENETC has the feature of PSFP which is for per-stream policing. When enable the tc hw offloading feature, driver would enable the IEEE 802.1Qci feature. It is only set the register enable bit for this feature not enable for any entry of per stream filtering and stream gate or stream identify but get how much capabilities for each feature. Signed-off-by: Po Liu <Po.Liu@nxp.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2020-05-01net: bcmgenet: Move wake-up event out of side band ISRDoug Berger
The side band interrupt service routine is not available on chips like 7211, or rather, it does not permit the signaling of wake-up events due to the complex interrupt hierarchy. Move the wake-up event accounting into a .resume_noirq function, account for possible wake-up events and clear the MPD/HFB interrupts from there, while leaving the hardware untouched until the resume function proceeds with doing its usual business. Because bcmgenet_wol_power_down_cfg() now enables the MPD and HFB interrupts, it is invoked by a .suspend_noirq function to prevent the servicing of interrupts after the clocks have been disabled. Signed-off-by: Doug Berger <opendmb@gmail.com> Signed-off-by: Florian Fainelli <f.fainelli@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2020-05-01net: ipa: do not cache channel stateAlex Elder
It is possible for a GSI channel's state to be changed as a result of an action by a different execution environment. Specifically, the modem is able to issue a GSI generic command that causes a state change on a GSI channel associated with the AP. A channel's state only needs to be known when a channel is allocated or deallocaed, started or stopped, or reset. So there is little value in caching the state anyway. Stop recording a copy of the channel's last known state, and instead fetch the true state from hardware whenever it's needed. In such cases, *do* record the state in a local variable, in case an error message reports it (so the value reported is the value seen). Signed-off-by: Alex Elder <elder@linaro.org> Signed-off-by: David S. Miller <davem@davemloft.net>
2020-05-01net: ipa: pass channel pointer to gsi_channel_state()Alex Elder
Pass a channel pointer rather than a GSI pointer and channel ID to gsi_channel_state(). Signed-off-by: Alex Elder <elder@linaro.org> Signed-off-by: David S. Miller <davem@davemloft.net>
2020-05-01net: dsa: mv88e6xxx: 88e6390 10G serdes supportRussell King
Add support for reading and reporting the 10G link status on the 88e6390 in addition to the 1000BASE-X/2500BASE-X/SGMII status. Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk> Signed-off-by: David S. Miller <davem@davemloft.net>
2020-05-01net: dsa: mv88e6xxx: use generic clause 45 definitionsRussell King
The private MV88E6390_PCS_CONTROL_1 definitions in serdes.h reflects the IEEE 802.3 standard PCS control register 1 definitions, only offset by 0x1000 in the PHYXS register space. Rather than inventing our own, use those that already exist, and name the register MV88E6390_10G_CTRL1. Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk> Signed-off-by: David S. Miller <davem@davemloft.net>
2020-05-01net: atlantic: A2 ingress / egress hw configurationIgor Russkikh
Chip generations are mostly compatible register-wise, but there are still some differences. Therefore we've made some of first generation (A1) code non-static to re-use it where possible. Some pieces are A2 specific, in which case we redefine/extend such APIs. Signed-off-by: Igor Russkikh <irusskikh@marvell.com> Signed-off-by: Mark Starovoytov <mstarovoitov@marvell.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2020-05-01net: atlantic: basic A2 init/deinit hw_opsIgor Russkikh
This patch adds basic A2 HW initialization / deinitialization. Signed-off-by: Igor Russkikh <irusskikh@marvell.com> Co-developed-by: Dmitry Bogdanov <dbogdanov@marvell.com> Signed-off-by: Dmitry Bogdanov <dbogdanov@marvell.com> Signed-off-by: Mark Starovoytov <mstarovoitov@marvell.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2020-05-01net: atlantic: common functions needed for basic A2 init/deinit hw_opsDmitry Bogdanov
This patch adds common functions (mostly FW-related), which are needed for basic A2 HW initialization / deinitialization. Signed-off-by: Dmitry Bogdanov <dbogdanov@marvell.com> Co-developed-by: Igor Russkikh <irusskikh@marvell.com> Signed-off-by: Igor Russkikh <irusskikh@marvell.com> Signed-off-by: Mark Starovoytov <mstarovoitov@marvell.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2020-05-01net: atlantic: HW bindings for basic A2 init/deinit hw_opsDmitry Bogdanov
This patch adds A2 register definitions for basic A2 HW initialization / deinitialization. Signed-off-by: Dmitry Bogdanov <dbogdanov@marvell.com> Co-developed-by: Egor Pomozov <epomozov@marvell.com> Signed-off-by: Egor Pomozov <epomozov@marvell.com> Co-developed-by: Igor Russkikh <irusskikh@marvell.com> Signed-off-by: Igor Russkikh <irusskikh@marvell.com> Co-developed-by: Nikita Danilov <ndanilov@marvell.com> Signed-off-by: Nikita Danilov <ndanilov@marvell.com> Signed-off-by: Mark Starovoytov <mstarovoitov@marvell.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2020-05-01net: atlantic: add A2 RPF hw_opsIgor Russkikh
This patch adds RPF-related hw_ops, which are needed for basic functionality. Signed-off-by: Igor Russkikh <irusskikh@marvell.com> Co-developed-by: Dmitry Bogdanov <dbogdanov@marvell.com> Signed-off-by: Dmitry Bogdanov <dbogdanov@marvell.com> Signed-off-by: Mark Starovoytov <mstarovoitov@marvell.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2020-05-01net: atlantic: HW bindings for A2 RFPIgor Russkikh
RPF is one of the modules which has been significantly changed/extended on A2. This patch adds the necessary A2 register definitions for RPF, which are used in follow-up patches. Signed-off-by: Igor Russkikh <irusskikh@marvell.com> Co-developed-by: Dmitry Bogdanov <dbogdanov@marvell.com> Signed-off-by: Dmitry Bogdanov <dbogdanov@marvell.com> Signed-off-by: Mark Starovoytov <mstarovoitov@marvell.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2020-05-01net: atlantic: A2 hw_ops skeletonIgor Russkikh
This patch adds basic hw_ops layout for A2. Actual implementation will be added in the follow-up patches. Signed-off-by: Igor Russkikh <irusskikh@marvell.com> Signed-off-by: Mark Starovoytov <mstarovoitov@marvell.com> Signed-off-by: David S. Miller <davem@davemloft.net>