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path: root/drivers/pci/of.c
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2021-11-04PCI: of: Allow matching of an interrupt-map local to a PCI deviceMarc Zyngier
Just as we now allow an interrupt map to be parsed when part of an interrupt controller, there is no reason to ignore an interrupt map that would be part of a pci device node such as a root port since we already allow interrupt specifiers. Allow the matching of such property when local to the node of a PCI device, which allows the device itself to use the interrupt map for for its own purpose. Link: https://lore.kernel.org/r/20210929163847.2807812-4-maz@kernel.org Tested-by: Alyssa Rosenzweig <alyssa@rosenzweig.io> Signed-off-by: Marc Zyngier <maz@kernel.org> Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Reviewed-by: Rob Herring <robh@kernel.org>
2021-08-04PCI: of: Don't fail devm_pci_alloc_host_bridge() on missing 'ranges'Rob Herring
Commit 669cbc708122 ("PCI: Move DT resource setup into devm_pci_alloc_host_bridge()") made devm_pci_alloc_host_bridge() fail on any DT resource parsing errors, but Broadcom iProc uses devm_pci_alloc_host_bridge() on BCMA bus devices that don't have DT resources. In particular, there is no 'ranges' property. Fix iProc by making 'ranges' optional. If 'ranges' is required by a platform, there's going to be more errors latter on if it is missing. Link: https://lore.kernel.org/r/20210803215656.3803204-1-robh@kernel.org Fixes: 669cbc708122 ("PCI: Move DT resource setup into devm_pci_alloc_host_bridge()") Reported-by: Rafał Miłecki <zajec5@gmail.com> Tested-by: Rafał Miłecki <rafal@milecki.pl> Signed-off-by: Rob Herring <robh@kernel.org> Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> Acked-by: Bjorn Helgaas <bhelgaas@google.com> Cc: Srinath Mannam <srinath.mannam@broadcom.com> Cc: Roman Bacik <roman.bacik@broadcom.com> Cc: Bharat Gooty <bharat.gooty@broadcom.com> Cc: Abhishek Shah <abhishek.shah@broadcom.com> Cc: Jitendra Bhivare <jitendra.bhivare@broadcom.com> Cc: Ray Jui <ray.jui@broadcom.com> Cc: Florian Fainelli <f.fainelli@gmail.com> Cc: BCM Kernel Feedback <bcm-kernel-feedback-list@broadcom.com> Cc: Scott Branden <sbranden@broadcom.com> Cc: Bjorn Helgaas <bhelgaas@google.com> Cc: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
2021-06-18Merge tag 'pci-v5.13-fixes-2' of ↵Linus Torvalds
git://git.kernel.org/pub/scm/linux/kernel/git/helgaas/pci Pull PCI fixes from Bjorn Helgaas: - Clear 64-bit flag for host bridge windows below 4GB to fix a resource allocation regression added in -rc1 (Punit Agrawal) - Fix tegra194 MCFG quirk build regressions added in -rc1 (Jon Hunter) - Avoid secondary bus resets on TI KeyStone C667X devices (Antti Järvinen) - Avoid secondary bus resets on some NVIDIA GPUs (Shanker Donthineni) - Work around FLR erratum on Huawei Intelligent NIC VF (Chiqijun) - Avoid broken ATS on AMD Navi14 GPU (Evan Quan) - Trust Broadcom BCM57414 NIC to isolate functions even though it doesn't advertise ACS support (Sriharsha Basavapatna) - Work around AMD RS690 BIOSes that don't configure DMA above 4GB (Mikel Rychliski) - Fix panic during PIO transfer on Aardvark controller (Pali Rohár) * tag 'pci-v5.13-fixes-2' of git://git.kernel.org/pub/scm/linux/kernel/git/helgaas/pci: PCI: aardvark: Fix kernel panic during PIO transfer PCI: Add AMD RS690 quirk to enable 64-bit DMA PCI: Add ACS quirk for Broadcom BCM57414 NIC PCI: Mark AMD Navi14 GPU ATS as broken PCI: Work around Huawei Intelligent NIC VF FLR erratum PCI: Mark some NVIDIA GPUs to avoid bus reset PCI: Mark TI C667X to avoid bus reset PCI: tegra194: Fix MCFG quirk build regressions PCI: of: Clear 64-bit flag for non-prefetchable memory below 4GB
2021-06-18PCI: of: Clear 64-bit flag for non-prefetchable memory below 4GBPunit Agrawal
Alexandru and Qu reported this resource allocation failure on ROCKPro64 v2 and ROCK Pi 4B, both based on the RK3399: pci_bus 0000:00: root bus resource [mem 0xfa000000-0xfbdfffff 64bit] pci 0000:00:00.0: PCI bridge to [bus 01] pci 0000:00:00.0: BAR 14: no space for [mem size 0x00100000] pci 0000:01:00.0: reg 0x10: [mem 0x00000000-0x00003fff 64bit] "BAR 14" is the PCI bridge's 32-bit non-prefetchable window, and our PCI allocation code isn't smart enough to allocate it in a host bridge window marked as 64-bit, even though this should work fine. A DT host bridge description includes the windows from the CPU address space to the PCI bus space. On a few architectures (microblaze, powerpc, sparc), the DT may also describe PCI devices themselves, including their BARs. Before 9d57e61bf723 ("of/pci: Add IORESOURCE_MEM_64 to resource flags for 64-bit memory addresses"), of_bus_pci_get_flags() ignored the fact that some DT addresses described 64-bit windows and BARs. That was a problem because the virtio virtual NIC has a 32-bit BAR and a 64-bit BAR, and the driver couldn't distinguish them. 9d57e61bf723 set IORESOURCE_MEM_64 for those 64-bit DT ranges, which fixed the virtio driver. But it also set IORESOURCE_MEM_64 for host bridge windows, which exposed the fact that the PCI allocator isn't smart enough to put 32-bit resources in those 64-bit windows. Clear IORESOURCE_MEM_64 from host bridge windows since we don't need that information. Suggested-by: Bjorn Helgaas <bhelgaas@google.com> Fixes: 9d57e61bf723 ("of/pci: Add IORESOURCE_MEM_64 to resource flags for 64-bit memory addresses") Link: https://lore.kernel.org/r/20210614230457.752811-1-punitagrawal@gmail.com Reported-at: https://lore.kernel.org/lkml/7a1e2ebc-f7d8-8431-d844-41a9c36a8911@arm.com/ Reported-at: https://lore.kernel.org/lkml/YMyTUv7Jsd89PGci@m4/T/#u Reported-by: Alexandru Elisei <alexandru.elisei@arm.com> Reported-by: Qu Wenruo <wqu@suse.com> Tested-by: Alexandru Elisei <alexandru.elisei@arm.com> Tested-by: Domenico Andreoli <domenico.andreoli@linux.com> Signed-off-by: Punit Agrawal <punitagrawal@gmail.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Reviewed-by: Rob Herring <robh@kernel.org> Acked-by: Ard Biesheuvel <ardb@kernel.org>
2021-05-25PCI/MSI: Fix MSIs for generic hosts that use device-tree's "msi-map"Jean-Philippe Brucker
Since commit 9ec37efb8783 ("PCI/MSI: Make pci_host_common_probe() declare its reliance on MSI domains"), platforms that rely on the "msi-map" device-tree property don't get MSIs anymore. On the Arm Fast Model for example [1], the host bridge doesn't have a "msi-parent" property since it doesn't itself generate MSIs, and so doesn't get a MSI domain. It has an "msi-map" property instead to describe MSI controllers of child devices. As a result, due to the new msi_domain check in pci_register_host_bridge(), the whole bus gets PCI_BUS_FLAGS_NO_MSI. Check whether the root complex has an "msi-map" property before giving up on MSIs. [1] arch/arm64/boot/dts/arm/fvp-base-revc.dts Fixes: 9ec37efb8783 ("PCI/MSI: Make pci_host_common_probe() declare its reliance on MSI domains") Link: https://lore.kernel.org/r/20210510173129.750496-1-jean-philippe@linaro.org Signed-off-by: Jean-Philippe Brucker <jean-philippe@linaro.org> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Acked-by: Marc Zyngier <maz@kernel.org>
2021-03-11PCI: Fix kernel-doc errorsKrzysztof Wilczyński
Fix kernel-doc formatting errors, function names that don't match the doc, and some missing parameter documentation. These are reported by: make W=1 drivers/pci/ No functional change intended. [bhelgaas: squashed into one patch since this only changes comments] Link: https://lore.kernel.org/r/20210311001724.423356-1-kw@linux.com Link: https://lore.kernel.org/r/20210311001724.423356-2-kw@linux.com Link: https://lore.kernel.org/r/20210311001724.423356-3-kw@linux.com Link: https://lore.kernel.org/r/20210311001724.423356-4-kw@linux.com Link: https://lore.kernel.org/r/20210311001724.423356-5-kw@linux.com Link: https://lore.kernel.org/r/20210311001724.423356-6-kw@linux.com Link: https://lore.kernel.org/r/20210311001724.423356-7-kw@linux.com Link: https://lore.kernel.org/r/20210311001724.423356-8-kw@linux.com Signed-off-by: Krzysztof Wilczyński <kw@linux.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
2020-11-18PCI: of: Warn if non-prefetchable memory aperture size is > 32-bitVidya Sagar
As per PCIe spec r5.0, sec 7.5.1.3.8 only 32-bit BAR registers are defined for non-prefetchable memory and hence a warning should be reported when the size of them go beyond 32-bits. Link: https://lore.kernel.org/r/20201118144626.32189-2-vidyas@nvidia.com Tested-by: Thierry Reding <treding@nvidia.com> Tested-by: Jon Hunter <jonathanh@nvidia.com> Signed-off-by: Vidya Sagar <vidyas@nvidia.com> Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> Reviewed-by: Rob Herring <robh@kernel.org>
2020-08-05Merge branch 'pci/doc'Bjorn Helgaas
- Fix several kerneldoc warnings (Krzysztof Kozlowski) * pci/doc: PCI: Fix kerneldoc warnings
2020-08-05Merge branch 'pci/host-probe-refactor'Bjorn Helgaas
- Use pci_host_bridge.windows list directly instead of splicing in a temporary list for cadence, mvebu, host-common (Rob Herring) - Use pci_host_probe() instead of open-coding all the pieces for altera, brcmstb, iproc, mobiveil, rcar, rockchip, tegra, v3, versatile, xgene, xilinx, xilinx-nwl (Rob Herring) - Convert to devm_platform_ioremap_resource_byname() instead of open-coding platform_get_resource_byname() and devm_ioremap_resource() for altera, cadence, mediatek, rockchip, tegra, xgene (Dejin Zheng) - Convert to devm_platform_ioremap_resource() instead of open-coding platform_get_resource() and devm_ioremap_resource() for aardvark, brcmstb, exynos, ftpci100, versatile (Dejin Zheng) - Remove redundant error messages from devm_pci_remap_cfg_resource() callers (Dejin Zheng) - Drop useless PCI_ENABLE_PROC_DOMAINS from versatile driver (Rob Herring) - Default host bridge parent device to the platform device (Rob Herring) - Drop unnecessary zeroing of host bridge fields (Rob Herring) - Use pci_is_root_bus() instead of tracking root bus number separately in aardvark, designware (imx6, keystone, designware-host), mobiveil, xilinx-nwl, xilinx, rockchip, rcar (Rob Herring) - Set host bridge bus number in pci_scan_root_bus_bridge() instead of each driver for aardvark, designware-host, host-common, mediatek, rcar, tegra, v3-semi (Rob Herring) - Use bridge resources instead of parsing DT 'ranges' again for cadence (Rob Herring) - Remove private bus number and range from cadence (Rob Herring) - Use devm_pci_alloc_host_bridge() to simplify rcar (Rob Herring) - Use struct pci_host_bridge.windows list directly rather than a temporary (Rob Herring) - Reduce OF "missing non-prefetchable window" from error to warning message (Rob Herring) - Convert rcar-gen2 from old Arm-specific pci_common_init_dev() to new arch-independent interfaces (Rob Herring) - Move DT resource setup into devm_pci_alloc_host_bridge() (Rob Herring) - Set bridge map_irq and swizzle_irq to default functions; drivers that don't support legacy IRQs (iproc) need to undo this (Rob Herring) * pci/host-probe-refactor: PCI: Set bridge map_irq and swizzle_irq to default functions PCI: Move DT resource setup into devm_pci_alloc_host_bridge() PCI: rcar-gen2: Convert to use modern host bridge probe functions PCI: of: Reduce missing non-prefetchable memory region to a warning PCI: rcar: Use struct pci_host_bridge.windows list directly PCI: rcar: Use devm_pci_alloc_host_bridge() PCI: cadence: Remove private bus number and range storage PCI: cadence: Use bridge resources for outbound window setup PCI: Move setting pci_host_bridge.busnr out of host drivers PCI: rcar: Use pci_is_root_bus() to check if bus is root bus PCI: rockchip: Use pci_is_root_bus() to check if bus is root bus PCI: xilinx: Use pci_is_root_bus() to check if bus is root bus PCI: xilinx-nwl: Use pci_is_root_bus() to check if bus is root bus PCI: mobiveil: Use pci_is_root_bus() to check if bus is root bus PCI: designware: Use pci_is_root_bus() to check if bus is root bus PCI: aardvark: Use pci_is_root_bus() to check if bus is root bus PCI: Drop unnecessary zeroing of bridge fields PCI: Set default bridge parent device PCI: versatile: Drop flag PCI_ENABLE_PROC_DOMAINS PCI: controller: Remove duplicate error message PCI: controller: Convert to devm_platform_ioremap_resource() PCI: controller: Convert to devm_platform_ioremap_resource_byname() PCI: xilinx: Use pci_host_probe() to register host PCI: xilinx-nwl: Use pci_host_probe() to register host PCI: rockchip: Use pci_host_probe() to register host PCI: rcar: Use pci_host_probe() to register host PCI: iproc: Use pci_host_probe() to register host PCI: altera: Use pci_host_probe() to register host PCI: xgene: Use pci_host_probe() to register host PCI: versatile: Use pci_host_probe() to register host PCI: v3: Use pci_host_probe() to register host PCI: tegra: Use pci_host_probe() to register host PCI: mobiveil: Use pci_host_probe() to register host PCI: brcmstb: Use pci_host_probe() to register host PCI: host-common: Use struct pci_host_bridge.windows list directly PCI: mvebu: Use struct pci_host_bridge.windows list directly PCI: cadence: Use struct pci_host_bridge.windows list directly # Conflicts: # drivers/pci/controller/cadence/pcie-cadence-host.c
2020-08-05PCI: Fix kerneldoc warningsKrzysztof Kozlowski
Fix kerneldoc warnings, e.g., $ make W=1 drivers/pci/ drivers/pci/ats.c:196: warning: Function parameter or member 'pdev' not described in 'pci_enable_pri' drivers/pci/ats.c:196: warning: Function parameter or member 'reqs' not described in 'pci_enable_pri' ... Link: https://lore.kernel.org/r/20200729201224.26799-2-krzk@kernel.org Link: https://lore.kernel.org/r/20200729201224.26799-3-krzk@kernel.org Link: https://lore.kernel.org/r/20200729201224.26799-4-krzk@kernel.org Link: https://lore.kernel.org/r/20200729201224.26799-5-krzk@kernel.org Link: https://lore.kernel.org/r/20200729201224.26799-6-krzk@kernel.org Link: https://lore.kernel.org/r/20200729201224.26799-7-krzk@kernel.org Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
2020-08-04PCI: Set bridge map_irq and swizzle_irq to default functionsRob Herring
The majority of DT based host drivers use the default .map_irq() and .swizzle_irq() functions, so let's initialize the function pointers to the default and drop setting them in the host drivers. Drivers like iProc which don't support legacy interrupts need to set .map_irq() back to NULL. Link: https://lore.kernel.org/r/20200722022514.1283916-20-robh@kernel.org Signed-off-by: Rob Herring <robh@kernel.org> Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> Acked-by: Bjorn Helgaas <bhelgaas@google.com> Cc: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> Cc: Bjorn Helgaas <bhelgaas@google.com>
2020-08-04PCI: Move DT resource setup into devm_pci_alloc_host_bridge()Rob Herring
Now that pci_parse_request_of_pci_ranges() callers just setup pci_host_bridge.windows and dma_ranges directly and don't need the bus range returned, we can just initialize them when allocating the pci_host_bridge struct. With this, pci_parse_request_of_pci_ranges() becomes a static function. Link: https://lore.kernel.org/r/20200722022514.1283916-19-robh@kernel.org Signed-off-by: Rob Herring <robh@kernel.org> Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> Acked-by: Bjorn Helgaas <bhelgaas@google.com> Cc: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> Cc: Bjorn Helgaas <bhelgaas@google.com>
2020-07-23PCI: of: Reduce missing non-prefetchable memory region to a warningRob Herring
The pci-rcar-gen2 controller requires only a prefetchable memory region, and the error prevents using pci_parse_request_of_pci_ranges() for it. Let's reduce this to just a warning message so this function can be used for pci-rcar-gen2. Link: https://lore.kernel.org/r/20200722022514.1283916-17-robh@kernel.org Signed-off-by: Rob Herring <robh@kernel.org> Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> Acked-by: Bjorn Helgaas <bhelgaas@google.com> Cc: Bjorn Helgaas <bhelgaas@google.com> Cc: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
2020-07-10PCI: Treat "external-facing" devices themselves as internalRajat Jain
"External-facing" devices are internal devices that expose PCIe hierarchies such as Thunderbolt outside the platform [1]. Previously these internal devices were marked as "untrusted" the same as devices downstream from them. Use the ACPI or DT information to identify external-facing devices, but only mark the devices *downstream* from them as "untrusted" [2]. The external-facing device itself is no longer marked as untrusted. [1] https://docs.microsoft.com/en-us/windows-hardware/drivers/pci/dsd-for-pcie-root-ports#identifying-externally-exposed-pcie-root-ports [2] https://lore.kernel.org/linux-pci/20200610230906.GA1528594@bjorn-Precision-5520/ Link: https://lore.kernel.org/r/20200707224604.3737893-3-rajatja@google.com Signed-off-by: Rajat Jain <rajatja@google.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
2020-05-18PCI: of: Zero max-link-speed value is invalidPali Rohár
Interpret zero value of max-link-speed property as invalid, as the device tree bindings documentation specifies. Link: https://lore.kernel.org/r/20200430080625.26070-4-pali@kernel.org Tested-by: Tomasz Maciej Nowak <tmn505@gmail.com> Signed-off-by: Pali Rohár <pali@kernel.org> Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> Acked-by: Rob Herring <robh@kernel.org> Acked-by: Thomas Petazzoni <thomas.petazzoni@bootlin.com>
2019-11-20PCI: Make devm_of_pci_get_host_bridge_resources() staticRob Herring
Now that all the PCI host drivers are using pci_parse_request_of_pci_ranges(), make devm_of_pci_get_host_bridge_resources() static. Signed-off-by: Rob Herring <robh@kernel.org> Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> Cc: Bjorn Helgaas <bhelgaas@google.com>
2019-11-20PCI: of: Add inbound resource parsing to helpersRob Herring
Extend devm_of_pci_get_host_bridge_resources() and pci_parse_request_of_pci_ranges() helpers to also parse the inbound addresses from DT 'dma-ranges' and populate a resource list with the translated addresses. This will help ensure 'dma-ranges' is always parsed in a consistent way. Tested-by: Srinath Mannam <srinath.mannam@broadcom.com> Tested-by: Thomas Petazzoni <thomas.petazzoni@bootlin.com> # for AArdvark Signed-off-by: Rob Herring <robh@kernel.org> Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> Reviewed-by: Srinath Mannam <srinath.mannam@broadcom.com> Reviewed-by: Andrew Murray <andrew.murray@arm.com> Acked-by: Gustavo Pimentel <gustavo.pimentel@synopsys.com> Cc: Jingoo Han <jingoohan1@gmail.com> Cc: Gustavo Pimentel <gustavo.pimentel@synopsys.com> Cc: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> Cc: Bjorn Helgaas <bhelgaas@google.com> Cc: Thomas Petazzoni <thomas.petazzoni@bootlin.com> Cc: Will Deacon <will@kernel.org> Cc: Linus Walleij <linus.walleij@linaro.org> Cc: Toan Le <toan@os.amperecomputing.com> Cc: Ley Foon Tan <lftan@altera.com> Cc: Tom Joseph <tjoseph@cadence.com> Cc: Ray Jui <rjui@broadcom.com> Cc: Scott Branden <sbranden@broadcom.com> Cc: bcm-kernel-feedback-list@broadcom.com Cc: Ryder Lee <ryder.lee@mediatek.com> Cc: Karthikeyan Mitran <m.karthikeyan@mobiveil.co.in> Cc: Hou Zhiqiang <Zhiqiang.Hou@nxp.com> Cc: Simon Horman <horms@verge.net.au> Cc: Shawn Lin <shawn.lin@rock-chips.com> Cc: Heiko Stuebner <heiko@sntech.de> Cc: Michal Simek <michal.simek@xilinx.com> Cc: rfi@lists.rocketboards.org Cc: linux-mediatek@lists.infradead.org Cc: linux-renesas-soc@vger.kernel.org Cc: linux-rockchip@lists.infradead.org
2019-10-29PCI: Export pci_parse_request_of_pci_ranges()Rob Herring
pci_parse_request_of_pci_ranges() is missing a module export, so add it. Signed-off-by: Rob Herring <robh@kernel.org> Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> Reviewed-by: Andrew Murray <andrew.murray@arm.com> Cc: Bjorn Helgaas <bhelgaas@google.com>
2019-08-30PCI: OF: Correct of_irq_parse_pci() documentationLubomir Rintel
530210c7814e ("of/irq: Replace of_irq with of_phandle_args") changed the of_irq_parse_pci() parameter type but didn't change the corresponding documentation. Update the function doc to match. Link: https://lore.kernel.org/r/20190807132049.10304-1-lkundrak@v3.sk Signed-off-by: Lubomir Rintel <lkundrak@v3.sk> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
2019-06-06PCI: OF: Initialize dev->fwnode appropriatelyJean-Philippe Brucker
For PCI devices that have an OF node, set the fwnode as well. This way drivers that rely on fwnode don't need the special case described by commit f94277af03ea ("of/platform: Initialise dev->fwnode appropriately"). Acked-by: Bjorn Helgaas <bhelgaas@google.com> Signed-off-by: Jean-Philippe Brucker <jean-philippe.brucker@arm.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
2019-05-13Merge branch 'remotes/lorenzo/pci/keystone'Bjorn Helgaas
- Move IRQ register address computation inside macros (Kishon Vijay Abraham I) - Separate legacy IRQ and MSI configuration (Kishon Vijay Abraham I) - Use hwirq, not virq, to get MSI IRQ number offset (Kishon Vijay Abraham I) - Squash ks_pcie_handle_msi_irq() into ks_pcie_msi_irq_handler() (Kishon Vijay Abraham I) - Add dwc support for platforms with custom MSI controllers (Kishon Vijay Abraham I) - Add keystone-specific MSI controller (Kishon Vijay Abraham I) - Remove dwc host_ops previously used for keystone-specific MSI (Kishon Vijay Abraham I) - Skip dwc default MSI init if platform has custom MSI controller (Kishon Vijay Abraham I) - Implement .start_link() and .stop_link() for keystone endpoint support (Kishon Vijay Abraham I) - Add keystone "reg-names" DT binding (Kishon Vijay Abraham I) - Squash ks_pcie_dw_host_init() into ks_pcie_add_pcie_port() (Kishon Vijay Abraham I) - Get keystone register resources from DT by name, not index (Kishon Vijay Abraham I) - Get DT resources in .probe() to prepare for endpoint support (Kishon Vijay Abraham I) - Add "ti,syscon-pcie-mode" DT property for PCIe mode configuration (Kishon Vijay Abraham I) - Explicitly set keystone to host mode (Kishon Vijay Abraham I) - Document DT "atu" reg-names requirement for DesignWare core >= 4.80 (Kishon Vijay Abraham I) - Enable dwc iATU unroll for endpoint mode as well as host mode (Kishon Vijay Abraham I) - Add dwc "version" to identify core >= 4.80 for ATU programming (Kishon Vijay Abraham I) - Don't build ARM32-specific keystone code on ARM64 (Kishon Vijay Abraham I) - Add DT binding for keystone PCIe RC in AM654 SoC (Kishon Vijay Abraham I) - Add keystone support for AM654 SoC PCIe RC (Kishon Vijay Abraham I) - Reset keystone PHYs before enabling them (Kishon Vijay Abraham I) - Make of_pci_get_max_link_speed() available to endpoint drivers as well as host drivers (Kishon Vijay Abraham I) - Add keystone support for DT "max-link-speed" property (Kishon Vijay Abraham I) - Add endpoint library support for BAR buffer alignment (Kishon Vijay Abraham I) - Make all dw_pcie_ep_ops structs const (Kishon Vijay Abraham I) - Fix fencepost error in dw_pcie_ep_find_capability() (Kishon Vijay Abraham I) - Add dwc hooks for dbi/dbi2 that share the same address space (Kishon Vijay Abraham I) - Add keystone support for TI AM654x in endpoint mode (Kishon Vijay Abraham I) - Configure designware endpoints to advertise smallest resizable BAR (1MB) (Kishon Vijay Abraham I) - Align designware endpoint ATU windows for raising MSIs (Kishon Vijay Abraham I) - Add endpoint test support for TI AM654x (Kishon Vijay Abraham I) - Fix endpoint test test_reg_bar issue (Kishon Vijay Abraham I) * remotes/lorenzo/pci/keystone: misc: pci_endpoint_test: Fix test_reg_bar to be updated in pci_endpoint_test misc: pci_endpoint_test: Add support to test PCI EP in AM654x PCI: designware-ep: Use aligned ATU window for raising MSI interrupts PCI: designware-ep: Configure Resizable BAR cap to advertise the smallest size PCI: keystone: Add support for PCIe EP in AM654x Platforms dt-bindings: PCI: Add PCI EP DT binding documentation for AM654 PCI: dwc: Add callbacks for accessing dbi2 address space PCI: dwc: Fix dw_pcie_ep_find_capability() to return correct capability offset PCI: dwc: Add const qualifier to struct dw_pcie_ep_ops PCI: endpoint: Add support to specify alignment for buffers allocated to BARs PCI: keystone: Add support to set the max link speed from DT PCI: OF: Allow of_pci_get_max_link_speed() to be used by PCI Endpoint drivers PCI: keystone: Invoke phy_reset() API before enabling PHY PCI: keystone: Add support for PCIe RC in AM654x Platforms dt-bindings: PCI: Add PCI RC DT binding documentation for AM654 PCI: keystone: Prevent ARM32 specific code to be compiled for ARM64 PCI: dwc: Fix ATU identification for designware version >= 4.80 PCI: dwc: Enable iATU unroll for endpoint too dt-bindings: PCI: Document "atu" reg-names PCI: keystone: Explicitly set the PCIe mode dt-bindings: PCI: Add dt-binding to configure PCIe mode PCI: keystone: Move resources initialization to prepare for EP support PCI: keystone: Use platform_get_resource_byname() to get memory resources PCI: keystone: Perform host initialization in a single function dt-bindings: PCI: keystone: Add "reg-names" binding information PCI: keystone: Cleanup error_irq configuration PCI: keystone: Add start_link()/stop_link() dw_pcie_ops PCI: dwc: Remove default MSI initialization for platform specific MSI chips PCI: dwc: Remove Keystone specific dw_pcie_host_ops PCI: keystone: Use Keystone specific msi_irq_chip PCI: dwc: Add support to use non default msi_irq_chip PCI: keystone: Cleanup ks_pcie_msi_irq_handler() PCI: keystone: Use hwirq to get the MSI IRQ number offset PCI: keystone: Add separate functions for configuring MSI and legacy interrupt PCI: keystone: Cleanup interrupt related macros # Conflicts: # drivers/pci/controller/dwc/pcie-designware.h
2019-04-15PCI: OF: Allow of_pci_get_max_link_speed() to be used by PCI Endpoint driversKishon Vijay Abraham I
of_pci_get_max_link_speed() is built only if CONFIG_PCI is enabled. Make of_pci_get_max_link_speed() to be also used by PCI Endpoint controllers with just CONFIG_PCI_ENDPOINT enabled. Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com> Signed-off-by: Sekhar Nori <nsekhar@ti.com> Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> Acked-by: Bjorn Helgaas <bhelgaas@google.com>
2019-04-11PCI: OF: Support "external-facing" propertyJean-Philippe Brucker
Set the "untrusted" attribute to any PCIe port that has an "external-facing" device tree property. Any device downstream of this port will inherit the attribute and have only the strictest IOMMU protection. Signed-off-by: Jean-Philippe Brucker <jean-philippe.brucker@arm.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
2019-01-22PCI: Use of_node_name_eq() for node name comparisonsRob Herring
Convert string compares of DT node names to use of_node_name_eq() helper instead. This removes direct access to the node name pointer. Signed-off-by: Rob Herring <robh@kernel.org> [bhelgaas: drop similar rpaphp_core.c change to avoid merge conflict] Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
2018-09-25iommu/of: make of_pci_map_rid() available for other devices tooNipun Gupta
iommu-map property is also used by devices with fsl-mc. This patch moves the of_pci_map_rid to generic location, so that it can be used by other busses too. 'of_pci_map_rid' is renamed here to 'of_map_rid' and there is no functional change done in the API. Signed-off-by: Nipun Gupta <nipun.gupta@nxp.com> Reviewed-by: Rob Herring <robh@kernel.org> Reviewed-by: Robin Murphy <robin.murphy@arm.com> Acked-by: Bjorn Helgaas <bhelgaas@google.com> Signed-off-by: Joerg Roedel <jroedel@suse.de>
2018-08-15Merge branch 'pci/resource'Bjorn Helgaas
- Clean up devm_of_pci_get_host_bridge_resources() resource allocation (Jan Kiszka) - Fixup resizable BARs after suspend/resume (Christian König) - Make "pci=earlydump" generic (Sinan Kaya) - Fix ROM BAR access routines to stay in bounds and check for signature correctly (Rex Zhu) * pci/resource: PCI: Make pci_get_rom_size() static PCI: Add check code for last image indicator not set PCI: Avoid accessing memory outside the ROM BAR PCI: Make early dump functionality generic PCI: Cleanup PCI_REBAR_CTRL_BAR_SHIFT handling PCI: Restore resized BAR state on resume PCI: Clean up resource allocation in devm_of_pci_get_host_bridge_resources() # Conflicts: # Documentation/admin-guide/kernel-parameters.txt
2018-07-18PCI: OF: Fix I/O space page leakSergei Shtylyov
When testing the R-Car PCIe driver on the Condor board, if the PCIe PHY driver was left disabled, the kernel crashed with this BUG: kernel BUG at lib/ioremap.c:72! Internal error: Oops - BUG: 0 [#1] PREEMPT SMP Modules linked in: CPU: 0 PID: 39 Comm: kworker/0:1 Not tainted 4.17.0-dirty #1092 Hardware name: Renesas Condor board based on r8a77980 (DT) Workqueue: events deferred_probe_work_func pstate: 80000005 (Nzcv daif -PAN -UAO) pc : ioremap_page_range+0x370/0x3c8 lr : ioremap_page_range+0x40/0x3c8 sp : ffff000008da39e0 x29: ffff000008da39e0 x28: 00e8000000000f07 x27: ffff7dfffee00000 x26: 0140000000000000 x25: ffff7dfffef00000 x24: 00000000000fe100 x23: ffff80007b906000 x22: ffff000008ab8000 x21: ffff000008bb1d58 x20: ffff7dfffef00000 x19: ffff800009c30fb8 x18: 0000000000000001 x17: 00000000000152d0 x16: 00000000014012d0 x15: 0000000000000000 x14: 0720072007200720 x13: 0720072007200720 x12: 0720072007200720 x11: 0720072007300730 x10: 00000000000000ae x9 : 0000000000000000 x8 : ffff7dffff000000 x7 : 0000000000000000 x6 : 0000000000000100 x5 : 0000000000000000 x4 : 000000007b906000 x3 : ffff80007c61a880 x2 : ffff7dfffeefffff x1 : 0000000040000000 x0 : 00e80000fe100f07 Process kworker/0:1 (pid: 39, stack limit = 0x (ptrval)) Call trace: ioremap_page_range+0x370/0x3c8 pci_remap_iospace+0x7c/0xac pci_parse_request_of_pci_ranges+0x13c/0x190 rcar_pcie_probe+0x4c/0xb04 platform_drv_probe+0x50/0xbc driver_probe_device+0x21c/0x308 __device_attach_driver+0x98/0xc8 bus_for_each_drv+0x54/0x94 __device_attach+0xc4/0x12c device_initial_probe+0x10/0x18 bus_probe_device+0x90/0x98 deferred_probe_work_func+0xb0/0x150 process_one_work+0x12c/0x29c worker_thread+0x200/0x3fc kthread+0x108/0x134 ret_from_fork+0x10/0x18 Code: f9004ba2 54000080 aa0003fb 17ffff48 (d4210000) It turned out that pci_remap_iospace() wasn't undone when the driver's probe failed, and since devm_phy_optional_get() returned -EPROBE_DEFER, the probe was retried, finally causing the BUG due to trying to remap already remapped pages. Introduce the devm_pci_remap_iospace() managed API and replace the pci_remap_iospace() call with it to fix the bug. Fixes: dbf9826d5797 ("PCI: generic: Convert to DT resource parsing API") Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com> [lorenzo.pieralisi@arm.com: split commit/updated the commit log] Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
2018-06-19PCI: Clean up resource allocation in devm_of_pci_get_host_bridge_resources()Jan Kiszka
Instead of first allocating and then freeing memory for struct resource in case we cannot parse a PCI resource from the device tree, work against a local struct and kmemdup() it when we decide to go with it. Suggested-by: Andy Shevchenko <andy.shevchenko@gmail.com> Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Reviewed-by: Vladimir Zapolskiy <vladimir_zapolskiy@mentor.com>
2018-05-30PCI: Rework of_pci_get_host_bridge_resources() to ↵Jan Kiszka
devm_of_pci_get_host_bridge_resources() of_pci_get_host_bridge_resources() allocates the resource structures it fills dynamically, but none of its callers care to release them so far. Rather than requiring everyone to do this explicitly, convert the existing function to a managed version. Tested-by: Vladimir Zapolskiy <vladimir_zapolskiy@mentor.com> Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Reviewed-by: Vladimir Zapolskiy <vladimir_zapolskiy@mentor.com> Acked-by: Joao Pinto <jpinto@synopsys.com> Acked-by: Jingoo Han <jingoohan1@gmail.com> CC: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
2018-05-30PCI: Use dev_printk() in of_pci_get_host_bridge_resources()Jan Kiszka
Now that we have a device reference, make use of it for printing. Tested-by: Vladimir Zapolskiy <vladimir_zapolskiy@mentor.com> Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Reviewed-by: Vladimir Zapolskiy <vladimir_zapolskiy@mentor.com>
2018-05-30PCI: Pass struct device to of_pci_get_host_bridge_resources()Jan Kiszka
Another step towards a managed version of of_pci_get_host_bridge_resources(): Feed in the underlying device, rather than just the OF node. This will allow us to use managed resource allocation internally later on. Tested-by: Vladimir Zapolskiy <vladimir_zapolskiy@mentor.com> Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Reviewed-by: Vladimir Zapolskiy <vladimir_zapolskiy@mentor.com> Acked-by: Jingoo Han <jingoohan1@gmail.com> CC: Joao Pinto <Joao.Pinto@synopsys.com> CC: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
2018-05-30PCI: Rename of_pci_get_host_bridge_resources() device node parameterJan Kiszka
We will add a "struct device *dev" parameter to this function soon, so rename the existing "struct device_node *dev" parameter to "dev_node". Tested-by: Vladimir Zapolskiy <vladimir_zapolskiy@mentor.com> Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Reviewed-by: Vladimir Zapolskiy <vladimir_zapolskiy@mentor.com>
2018-02-01Merge branch 'pci/spdx' into nextBjorn Helgaas
* pci/spdx: PCI: Add SPDX GPL-2.0+ to replace implicit GPL v2 or later statement PCI: Add SPDX GPL-2.0+ to replace GPL v2 or later boilerplate PCI: Add SPDX GPL-2.0 to replace COPYING boilerplate PCI: Add SPDX GPL-2.0 to replace GPL v2 boilerplate PCI: Add SPDX GPL-2.0 when no license was specified
2018-01-31Merge remote-tracking branch 'lorenzo/pci/cadence' into nextBjorn Helgaas
* lorenzo/pci/cadence: PCI: cadence: Add EndPoint Controller driver for Cadence PCIe controller dt-bindings: PCI: cadence: Add DT bindings for Cadence PCIe endpoint controller PCI: endpoint: Fix EPF device name to support multi-function devices PCI: endpoint: Add the function number as argument to EPC ops PCI: cadence: Add host driver for Cadence PCIe controller dt-bindings: PCI: cadence: Add DT bindings for Cadence PCIe host controller PCI: Add vendor ID for Cadence PCI: Add generic function to probe PCI host controllers PCI: generic: fix missing call of pci_free_resource_list() PCI: OF: Add generic function to parse and allocate PCI resources PCI: Regroup all PCI related entries into drivers/pci/Makefile Conflicts: drivers/pci/of.c include/linux/pci.h
2018-01-31PCI: OF: Add generic function to parse and allocate PCI resourcesCyrille Pitchen
The patch moves the gen_pci_parse_request_of_pci_ranges() function from drivers/pci/host/pci-host-common.c into drivers/pci/of.c to easily share common source code between PCI host drivers. Signed-off-by: Cyrille Pitchen <cyrille.pitchen@free-electrons.com> Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
2018-01-28PCI: Add SPDX GPL-2.0+ to replace GPL v2 or later boilerplateBjorn Helgaas
Add SPDX GPL-2.0+ to all PCI files that specified the GPL and allowed either GPL version 2 or any later version. Remove the boilerplate GPL version 2 or later language, relying on the assertion in b24413180f56 ("License cleanup: add SPDX GPL-2.0 license identifier to files with no license") that the SPDX identifier may be used instead of the full boilerplate text. Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Reviewed-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2018-01-25PCI: Make of_irq_parse_pci() staticRob Herring
Now that the DT PCI code is merged into drivers/pci, of_irq_parse_pci() can be static. Signed-off-by: Rob Herring <robh@kernel.org> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Cc: Frank Rowand <frowand.list@gmail.com>
2018-01-17PCI: Move OF-related PCI functions into PCI coreRob Herring
Following what has been done for other subsystems, move the remaining PCI related code out of drivers/of/ and into drivers/pci/of.c With this, we can kill a few kconfig symbols. Signed-off-by: Rob Herring <robh@kernel.org> [bhelgaas: minor whitespace, comment cleanups] Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Cc: Frank Rowand <frowand.list@gmail.com>
2015-10-16PCI/MSI: Use of_msi_get_domain instead of open-coded "msi-parent" parsingMarc Zyngier
Now that we have a function that implements the complexity of the "msi-parent" property parsing, switch to that. Acked-by: Rob Herring <robh@kernel.org> Acked-by: Bjorn Helgaas <bhelgaas@google.com> Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
2015-07-30PCI/MSI: Allow msi_domain lookup using the host bridge nodeMarc Zyngier
A number of platforms do not need to use the msi-parent property, as the host bridge itself provides the MSI controller. Allow this configuration by performing an irq domain lookup based on the host bridge node if it doesn't have a valid msi-parent property. Acked-by: Bjorn Helgaas <bhelgaas@google.com> Signed-off-by: Marc Zyngier <marc.zyngier@arm.com> Cc: <linux-arm-kernel@lists.infradead.org> Cc: Yijing Wang <wangyijing@huawei.com> Cc: Ma Jun <majun258@huawei.com> Cc: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> Cc: Duc Dang <dhdang@apm.com> Cc: Hanjun Guo <hanjun.guo@linaro.org> Cc: Jiang Liu <jiang.liu@linux.intel.com> Cc: Jason Cooper <jason@lakedaemon.net> Link: http://lkml.kernel.org/r/1438091186-10244-7-git-send-email-marc.zyngier@arm.com Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
2015-07-30PCI/MSI: Add support for OF-provided msi_domainMarc Zyngier
In order to populate the PCI host bridge msi_domain, use the "msi-parent" attribute to lookup a corresponding irq domain. If found, this is our MSI domain. This gets plugged into the core PCI code. Acked-by: Bjorn Helgaas <bhelgaas@google.com> Signed-off-by: Marc Zyngier <marc.zyngier@arm.com> Cc: <linux-arm-kernel@lists.infradead.org> Cc: Yijing Wang <wangyijing@huawei.com> Cc: Ma Jun <majun258@huawei.com> Cc: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> Cc: Duc Dang <dhdang@apm.com> Cc: Hanjun Guo <hanjun.guo@linaro.org> Cc: Jiang Liu <jiang.liu@linux.intel.com> Cc: Jason Cooper <jason@lakedaemon.net> Link: http://lkml.kernel.org/r/1438091186-10244-6-git-send-email-marc.zyngier@arm.com Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
2011-08-19PCI: OF: Don't crash when bridge parent is NULL.David Daney
In pcibios_get_phb_of_node(), we will crash while booting if bus->bridge->parent is NULL. Check for this case and avoid dereferencing the NULL pointer. Signed-off-by: David Daney <david.daney@cavium.com> Acked-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Acked-by: Grant Likely <grant.likely@secretlab.ca> Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
2011-06-08pci/of: Match PCI devices to OF nodes dynamicallyBenjamin Herrenschmidt
powerpc has two different ways of matching PCI devices to their corresponding OF node (if any) for historical reasons. The ppc64 one does a scan looking for matching bus/dev/fn, while the ppc32 one does a scan looking only for matching dev/fn on each level in order to be agnostic to busses being renumbered (which Linux does on some platforms). This removes both and instead moves the matching code to the PCI core itself. It's the most logical place to do it: when a pci_dev is created, we know the parent and thus can do a single level scan for the matching device_node (if any). The benefit is that all archs now get the matching for free. There's one hook the arch might want to provide to match a PHB bus to its device node. A default weak implementation is provided that looks for the parent device device node, but it's not entirely reliable on powerpc for various reasons so powerpc provides its own. Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Acked-by: Michal Simek <monstr@monstr.eu> Acked-by: Jesse Barnes <jbarnes@virtuousgeek.org>
generated by cgit (git 2.34.1) at 2024-05-29 20:21:40 +0000