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path: root/drivers/phy/marvell
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2023-10-13phy: Use device_get_match_data()Rob Herring
Use preferred device_get_match_data() instead of of_match_device() to get the driver match data. With this, adjust the includes to explicitly include the correct headers. Signed-off-by: Rob Herring <robh@kernel.org> Reviewed-by: Heiko Stuebner <heiko@sntech.de> Link: https://lore.kernel.org/r/20231009172923.2457844-15-robh@kernel.org Signed-off-by: Vinod Koul <vkoul@kernel.org>
2023-08-11phy: marvell pxa-usb: fix Wvoid-pointer-to-enum-cast warningKrzysztof Kozlowski
'version' is an enum, thus cast of pointer on 64-bit compile test with W=1 causes: phy-pxa-usb.c:299:26: error: cast to smaller integer type 'enum pxa_usb_phy_version' from 'const void *' [-Werror,-Wvoid-pointer-to-enum-cast] Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20230810111958.205705-4-krzysztof.kozlowski@linaro.org Signed-off-by: Vinod Koul <vkoul@kernel.org>
2023-07-17phy: Explicitly include correct DT includesRob Herring
The DT of_device.h and of_platform.h date back to the separate of_platform_bus_type before it as merged into the regular platform bus. As part of that merge prepping Arm DT support 13 years ago, they "temporarily" include each other. They also include platform_device.h and of.h. As a result, there's a pretty much random mix of those include files used throughout the tree. In order to detangle these headers and replace the implicit includes with struct declarations, users need to explicitly include the correct includes. Signed-off-by: Rob Herring <robh@kernel.org> Acked-by: Marc Kleine-Budde <mkl@pengutronix.de> # for drivers/phy/phy-can-transceiver.c Acked-by: Heiko Stuebner <heiko@sntech.de> Acked-by: Sergio Paracuellos <sergio.paracuellos@gmail.com> Link: https://lore.kernel.org/r/20230714174841.4061919-1-robh@kernel.org Signed-off-by: Vinod Koul <vkoul@kernel.org>
2023-07-12phy: marvell: phy-mvebu-cp110-comphy: Use ↵Yangtao Li
devm_platform_get_and_ioremap_resource() Convert platform_get_resource(), devm_ioremap_resource() to a single call to devm_platform_get_and_ioremap_resource(), as this is exactly what this function does. Signed-off-by: Yangtao Li <frank.li@vivo.com> Link: https://lore.kernel.org/r/20230705090126.26854-1-frank.li@vivo.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
2023-03-20phy: marvell: drop of_match_ptr for ID tableKrzysztof Kozlowski
The driver can match only via the DT table so the table should be always used and the of_match_ptr does not have any sense (this also allows ACPI matching via PRP0001, even though it might not be relevant here). This also fixes !CONFIG_OF error: drivers/phy/marvell/phy-pxa-28nm-hsic.c:192:34: error: ‘mv_hsic_phy_dt_match’ defined but not used [-Werror=unused-const-variable=] drivers/phy/marvell/phy-pxa-28nm-usb2.c:324:34: error: ‘mv_usbphy_dt_match’ defined but not used [-Werror=unused-const-variable=] Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20230312132611.352654-1-krzysztof.kozlowski@linaro.org Signed-off-by: Vinod Koul <vkoul@kernel.org>
2022-11-24phy: use devm_platform_get_and_ioremap_resource()Minghao Chi
Convert platform_get_resource(), devm_ioremap_resource() to a single call to devm_platform_get_and_ioremap_resource(), as this is exactly what this function does. Signed-off-by: Minghao Chi <chi.minghao@zte.com.cn> Signed-off-by: ye xingchen <ye.xingchen@zte.com.cn> Link: https://lore.kernel.org/r/202211171411439883050@zte.com.cn Signed-off-by: Vinod Koul <vkoul@kernel.org>
2022-10-17phy: marvell: phy-mvebu-a3700-comphy: Reset COMPHY registers before USB 3.0 ↵Pali Rohár
power on Turris MOX board with older ARM Trusted Firmware version v1.5 is not able to detect any USB 3.0 device connected to USB-A port on Mox-A module after commit 0a6fc70d76bd ("phy: marvell: phy-mvebu-a3700-comphy: Remove broken reset support"). On the other hand USB 2.0 devices connected to the same USB-A port are working fine. It looks as if the older firmware configures COMPHY registers for USB 3.0 somehow incompatibly for kernel driver. Experiments show that resetting COMPHY registers via setting SFT_RST auto-clearing bit in COMPHY_SFT_RESET register fixes this issue. Reset the COMPHY in mvebu_a3700_comphy_usb3_power_on() function as a first step after selecting COMPHY lane and USB 3.0 function. With this change Turris MOX board can successfully detect USB 3.0 devices again. Before the above mentioned commit this reset was implemented in PHY reset method, so this is the reason why there was no issue with older firmware version then. Fixes: 0a6fc70d76bd ("phy: marvell: phy-mvebu-a3700-comphy: Remove broken reset support") Reported-by: Marek Behún <kabel@kernel.org> Signed-off-by: Pali Rohár <pali@kernel.org> Tested-by: Shin'ichiro Kawasaki <shinichiro.kawasaki@wdc.com> Link: https://lore.kernel.org/r/20220920121154.30115-1-pali@kernel.org Signed-off-by: Vinod Koul <vkoul@kernel.org>
2022-08-30phy: marvell: phy-mvebu-a3700-comphy: Remove broken reset supportPali Rohár
Reset support for SATA PHY is somehow broken and after calling it, kernel is not able to detect and initialize SATA disk Samsung SSD 850 EMT0 [1]. Reset support was introduced in commit 934337080c6c ("phy: marvell: phy-mvebu-a3700-comphy: Add native kernel implementation") as part of complete rewrite of this driver. v1 patch series of that commit [2] did not contain reset support and was tested that is working fine with Ethernet, SATA and USB PHYs without issues too. So for now remove broken reset support and change implementation of power_off callback to power off all functions on specified lane (and not only selected function) because during startup kernel does not know which function was selected and configured by bootloader. Same logic was used also in v1 patch series of that commit. This change fixes issues with initialization of SATA disk Samsung SSD 850 and disk is working again, like before mentioned commit. Once problem with PHY reset callback is solved its functionality could be re-introduced. But for now it is unknown why it does not work. [1] - https://lore.kernel.org/r/20220531124159.3e4lgn2v462irbtz@shindev/ [2] - https://lore.kernel.org/r/20211028184242.22105-1-kabel@kernel.org/ Reported-by: Shinichiro Kawasaki <shinichiro.kawasaki@wdc.com> Fixes: 934337080c6c ("phy: marvell: phy-mvebu-a3700-comphy: Add native kernel implementation") Cc: stable@vger.kernel.org # v5.18+ Signed-off-by: Pali Rohár <pali@kernel.org> Tested-by: Shinichiro Kawasaki <shinichiro.kawasaki@wdc.com> Link: https://lore.kernel.org/r/20220829083046.15082-1-pali@kernel.org Signed-off-by: Vinod Koul <vkoul@kernel.org>
2022-02-25phy: marvell: phy-mvebu-a3700-comphy: Add native kernel implementationPali Rohár
Remove old RPC implementation and add a new native kernel implementation. The old implementation uses ARM SMC API to issue RPC calls to ARM Trusted Firmware which provides real implementation of PHY configuration. But older versions of ARM Trusted Firmware do not provide this PHY configuration functionality, simply returning: operation not supported; or worse, some versions provide the configuration functionality incorrectly. For example the firmware shipped in ESPRESSObin board has this older version of ARM Trusted Firmware and therefore SATA, USB 3.0 and PCIe functionality do not work with newer versions of Linux kernel. Due to the above reasons, the following commits were introduced into Linux, to workaround these issues by ignoring -EOPNOTSUPP error code from phy-mvebu-a3700-comphy driver function phy_power_on(): commit 45aefe3d2251 ("ata: ahci: mvebu: Make SATA PHY optional for Armada 3720") commit 3241929b67d2 ("usb: host: xhci: mvebu: make USB 3.0 PHY optional for Armada 3720") commit b0c6ae0f8948 ("PCI: aardvark: Fix initialization with old Marvell's Arm Trusted Firmware") Replace this RPC implementation with proper native kernel implementation, which is independent on the firmware. Never return -EOPNOTSUPP for proper arguments. This should solve multiple issues with real-world boards, where it is not possible or really inconvenient to change the firmware. Let's eliminate these issues. This implementation is ported directly from Armada 3720 comphy driver found in newest version of ARM Trusted Firmware source code, but with various fixes of register names, some added comments, some refactoring due to the original code not conforming to kernel standards. Also PCIe mode poweroff support was added here, and PHY reset support. These changes are also going to be sent to ARM Trusted Firmware. [ Pali did the porting from ATF. I (Marek) then fixed some register names, some various other things, added some comments and refactored the code to kernel standards. Also fixed PHY poweroff and added PHY reset. ] Signed-off-by: Pali Rohár <pali@kernel.org> Acked-by: Miquel Raynal <miquel.raynal@bootlin.com> Signed-off-by: Marek Behún <kabel@kernel.org> Link: https://lore.kernel.org/r/20220203214444.1508-3-kabel@kernel.org Signed-off-by: Vinod Koul <vkoul@kernel.org>
2022-02-25phy: marvell: phy-mvebu-a3700-comphy: Remove port from driver configurationPali Rohár
Port number is encoded into argument for SMC call. It is zero for SATA, PCIe and also both USB 3.0 PHYs. It is non-zero only for Ethernet PHY (incorrectly called SGMII) on lane 0. Ethernet PHY on lane 1 also uses zero port number. So construct "port" bits for SMC call argument can be constructed directly from PHY type and lane number. Change driver code to always pass zero port number for non-ethernet PHYs and for ethernet PHYs determinate port number from lane number. This simplifies the driver. As port number from DT PHY configuration is not used anymore, remove whole driver code which parses it. This also simplifies the driver. Signed-off-by: Pali Rohár <pali@kernel.org> Signed-off-by: Marek Behún <kabel@kernel.org> Reviewed-by: Miquel Raynal <miquel.raynal@bootlin.com> Link: https://lore.kernel.org/r/20220203214444.1508-2-kabel@kernel.org Signed-off-by: Vinod Koul <vkoul@kernel.org>
2021-12-16Merge git://git.kernel.org/pub/scm/linux/kernel/git/netdev/netJakub Kicinski
No conflicts. Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2021-11-23phy: marvell: phy-mvebu-cp110-comphy: add support for 5gbase-rMarek Behún
Add support for PHY_INTERFACE_MODE_5GBASER mode within the Marvell CP110 common PHY driver. This is currently only supported via SMC calls to TF-A. Legacy support may be added later, if needed. Signed-off-by: Marek Behún <kabel@kernel.org> Signed-off-by: David S. Miller <davem@davemloft.net>
2021-11-20phy: mvebu-cp110-utmi: Fix kernel-doc warnsVinod Koul
Fix the format and add description for ops to fix the below warnings: drivers/phy/marvell/phy-mvebu-cp110-utmi.c:94: warning: Function parameter or member 'syscon' not described in 'mvebu_cp110_utmi' drivers/phy/marvell/phy-mvebu-cp110-utmi.c:94: warning: Function parameter or member 'ops' not described in 'mvebu_cp110_utmi' Signed-off-by: Vinod Koul <vkoul@kernel.org> Link: https://lore.kernel.org/r/20211116103951.34482-1-vkoul@kernel.org Signed-off-by: Vinod Koul <vkoul@kernel.org>
2021-08-27phy: marvell: phy-mvebu-a3700-comphy: Remove unsupported modesPali Rohár
Armada 3700 does not support RXAUI, XFI and neither SFI. Remove unused macros for these unsupported modes. Signed-off-by: Pali Rohár <pali@kernel.org> Fixes: 9695375a3f4a ("phy: add A3700 COMPHY support") Signed-off-by: David S. Miller <davem@davemloft.net>
2021-08-27phy: marvell: phy-mvebu-a3700-comphy: Rename HS-SGMMI to 2500Base-XPali Rohár
Comphy phy mode 0x3 is incorrectly named. It is not SGMII but rather 2500Base-X mode which runs at 3.125 Gbps speed. Rename macro names and comments to 2500Base-X. Signed-off-by: Pali Rohár <pali@kernel.org> Fixes: 9695375a3f4a ("phy: add A3700 COMPHY support") Signed-off-by: David S. Miller <davem@davemloft.net>
2021-08-27phy: marvell: phy-mvebu-cp110-comphy: Rename HS-SGMMI to 2500Base-XPali Rohár
Comphy phy mode 0x3 is incorrectly named. It is not SGMII but rather 2500Base-X mode which runs at 3.125 Gbps speed. Rename macro names and comments to 2500Base-X. Signed-off-by: Pali Rohár <pali@kernel.org> Fixes: eb6a1fcb53e2 ("phy: mvebu-cp110-comphy: Add SMC call support") Fixes: c2afb2fef595 ("phy: mvebu-cp110-comphy: Rename the macro handling only Ethernet modes") Signed-off-by: David S. Miller <davem@davemloft.net>
2021-06-14phy: phy-mmp3-hsic: Remove redundant dev_err call in mmp3_hsic_phy_probe()He Ying
There is a error message within devm_ioremap_resource already, so remove the dev_err call to avoid redundant error message. Reported-by: Hulk Robot <hulkci@huawei.com> Signed-off-by: He Ying <heying24@huawei.com> Link: https://lore.kernel.org/r/20210408090806.247325-1-heying24@huawei.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
2021-04-06phy: marvell: phy-mvebu-cp11i-utmi needs USB_COMMONRandy Dunlap
When USB and USB_COMMON are not enabled, phy-mvebu-cp110-utmi suffers a build error due to a missing interface that is provided by CONFIG_USB_COMMON, so make the driver depend on USB_COMMON. ld: drivers/phy/marvell/phy-mvebu-cp110-utmi.o: in function `mvebu_cp110_utmi_phy_probe': phy-mvebu-cp110-utmi.c:(.text+0x152): undefined reference to `of_usb_get_dr_mode_by_phy' Signed-off-by: Randy Dunlap <rdunlap@infradead.org> Cc: Kostya Porotchkin <kostap@marvell.com> Cc: Kishon Vijay Abraham I <kishon@ti.com> Cc: Vinod Koul <vkoul@kernel.org> Cc: linux-phy@lists.infradead.org Link: https://lore.kernel.org/r/20210401210045.23525-1-rdunlap@infradead.org Signed-off-by: Vinod Koul <vkoul@kernel.org>
2021-03-30phy: marvell: ARMADA375_USBCLUSTER_PHY should not default to y, unconditionallyGeert Uytterhoeven
Merely enabling CONFIG_COMPILE_TEST should not enable additional code. To fix this, restrict the automatic enabling of ARMADA375_USBCLUSTER_PHY to MACH_ARMADA_375, and ask the user in case of compile-testing. Fixes: eee47538ec1f2619 ("phy: add support for USB cluster on the Armada 375 SoC") Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://lore.kernel.org/r/20210208150252.424706-1-geert+renesas@glider.be Signed-off-by: Vinod Koul <vkoul@kernel.org>
2021-03-30drivers: phy: add support for Armada CP110 UTMI PHYKonstantin Porotchkin
Add support for Marvell CP110 UTMI PHY driver allowing the USB2 port configuration independently from the boot loader setup. The CP110/CP115 dies have 2 UTMI PHYs that could be connected to two USB host controllers or to single USB device controller. Since there is only one USB device controller on die, only one of the UTMI PHYs could work in USB device mode. The CONFIG_PHY_MVEBU_CP110_UTMI should be enabled for usage of this driver. Signed-off-by: Konstantin Porotchkin <kostap@marvell.com> Link: https://lore.kernel.org/r/20210307163343.25684-2-kostap@marvell.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
2020-11-16phy: marvell: convert to devm_platform_ioremap_resourceChunfeng Yun
Use devm_platform_ioremap_resource to simplify code Signed-off-by: Chunfeng Yun <chunfeng.yun@mediatek.com> Reviewed-by: Jisheng Zhang <Jisheng.Zhang@synaptics.com> Link: https://lore.kernel.org/r/1604642930-29019-7-git-send-email-chunfeng.yun@mediatek.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
2020-11-02phy: Add USB HSIC PHY driver for Marvell MMP3 SoCLubomir Rintel
Add PHY driver for the HSICs found on Marvell MMP3 SoC. The driver is rather straightforward -- the PHY essentially just needs to be enabled. Signed-off-by: Lubomir Rintel <lkundrak@v3.sk> Link: https://lore.kernel.org/r/20200925235828.228626-4-lkundrak@v3.sk Signed-off-by: Vinod Koul <vkoul@kernel.org>
2020-10-22Merge tag 'pci-v5.10-changes' of ↵Linus Torvalds
git://git.kernel.org/pub/scm/linux/kernel/git/helgaas/pci Pull PCI updates from Bjorn Helgaas: "Enumeration: - Print IRQ number used by PCIe Link Bandwidth Notification (Dongdong Liu) - Add schedule point in pci_read_config() to reduce max latency (Jiang Biao) - Add Kconfig options for MPS/MRRS strategy (Jim Quinlan) Resource management: - Fix pci_iounmap() memory leak when !CONFIG_GENERIC_IOMAP (Lorenzo Pieralisi) PCIe native device hotplug: - Reduce noisiness on hot removal (Lukas Wunner) Power management: - Revert "PCI/PM: Apply D2 delay as milliseconds, not microseconds" that was done on the basis of spec typo (Bjorn Helgaas) - Rename pci_dev.d3_delay to d3hot_delay to remove D3hot/D3cold ambiguity (Krzysztof Wilczyński) - Remove unused pcibios_pm_ops (Vaibhav Gupta) IOMMU: - Enable Translation Blocking for external devices to harden against DMA attacks (Rajat Jain) Error handling: - Add an ACPI APEI notifier chain for vendor CPER records to enable device-specific error handling (Shiju Jose) ASPM: - Remove struct aspm_register_info to simplify code (Saheed O. Bolarinwa) Amlogic Meson PCIe controller driver: - Build as module by default (Kevin Hilman) Ampere Altra PCIe controller driver: - Add MCFG quirk to work around non-standard ECAM implementation (Tuan Phan) Broadcom iProc PCIe controller driver: - Set affinity mask on MSI interrupts (Mark Tomlinson) Broadcom STB PCIe controller driver: - Make PCIE_BRCMSTB depend on ARCH_BRCMSTB (Jim Quinlan) - Add DT bindings for more Brcmstb chips (Jim Quinlan) - Add bcm7278 register info (Jim Quinlan) - Add bcm7278 PERST# support (Jim Quinlan) - Add suspend and resume pm_ops (Jim Quinlan) - Add control of rescal reset (Jim Quinlan) - Set additional internal memory DMA viewport sizes (Jim Quinlan) - Accommodate MSI for older chips (Jim Quinlan) - Set bus max burst size by chip type (Jim Quinlan) - Add support for bcm7211, bcm7216, bcm7445, bcm7278 (Jim Quinlan) Freescale i.MX6 PCIe controller driver: - Use dev_err_probe() to reduce redundant messages (Anson Huang) Freescale Layerscape PCIe controller driver: - Enforce 4K DMA buffer alignment in endpoint test (Hou Zhiqiang) - Add DT compatible strings for ls1088a, ls2088a (Xiaowei Bao) - Add endpoint support for ls1088a, ls2088a (Xiaowei Bao) - Add endpoint test support for lS1088a (Xiaowei Bao) - Add MSI-X support for ls1088a (Xiaowei Bao) HiSilicon HIP PCIe controller driver: - Handle HIP-specific errors via ACPI APEI (Yicong Yang) HiSilicon Kirin PCIe controller driver: - Return -EPROBE_DEFER if the GPIO isn't ready (Bean Huo) Intel VMD host bridge driver: - Factor out physical offset, bus offset, IRQ domain, IRQ allocation (Jon Derrick) - Use generic PCI PM correctly (Jon Derrick) Marvell Aardvark PCIe controller driver: - Fix compilation on s390 (Pali Rohár) - Implement driver 'remove' function and allow to build it as module (Pali Rohár) - Move PCIe reset card code to advk_pcie_train_link() (Pali Rohár) - Convert mvebu a3700 internal SMCC firmware return codes to errno (Pali Rohár) - Fix initialization with old Marvell's Arm Trusted Firmware (Pali Rohár) Microsoft Hyper-V host bridge driver: - Fix hibernation in case interrupts are not re-created (Dexuan Cui) NVIDIA Tegra PCIe controller driver: - Stop checking return value of debugfs_create() functions (Greg Kroah-Hartman) - Convert to use DEFINE_SEQ_ATTRIBUTE macro (Liu Shixin) Qualcomm PCIe controller driver: - Reset PCIe to work around Qsdk U-Boot issue (Ansuel Smith) Renesas R-Car PCIe controller driver: - Add DT documentation for r8a774a1, r8a774b1, r8a774e1 endpoints (Lad Prabhakar) - Add RZ/G2M, RZ/G2N, RZ/G2H IDs to endpoint test (Lad Prabhakar) - Add DT support for r8a7742 (Lad Prabhakar) Socionext UniPhier Pro5 controller driver: - Add DT descriptions of iATU register (host and endpoint) (Kunihiko Hayashi) Synopsys DesignWare PCIe controller driver: - Add link up check in dw_child_pcie_ops.map_bus() (racy, but seems unavoidable) (Hou Zhiqiang) - Fix endpoint Header Type check so multi-function devices work (Hou Zhiqiang) - Skip PCIE_MSI_INTR0* programming if MSI is disabled (Jisheng Zhang) - Stop leaking MSI page in suspend/resume (Jisheng Zhang) - Add common iATU register support instead of keystone-specific code (Kunihiko Hayashi) - Major config space access and other cleanups in dwc core and drivers that use it (al, exynos, histb, imx6, intel-gw, keystone, kirin, meson, qcom, tegra) (Rob Herring) - Add multiple PFs support for endpoint (Xiaowei Bao) - Add MSI-X doorbell mode in endpoint mode (Xiaowei Bao) Miscellaneous: - Use fallthrough pseudo-keyword (Gustavo A. R. Silva) - Fix "0 used as NULL pointer" warnings (Gustavo Pimentel) - Fix "cast truncates bits from constant value" warnings (Gustavo Pimentel) - Remove redundant zeroing for sg_init_table() (Julia Lawall) - Use scnprintf(), not snprintf(), in sysfs "show" functions (Krzysztof Wilczyński) - Remove unused assignments (Krzysztof Wilczyński) - Fix "0 used as NULL pointer" warning (Krzysztof Wilczyński) - Simplify bool comparisons (Krzysztof Wilczyński) - Use for_each_child_of_node() and for_each_node_by_name() (Qinglang Miao) - Simplify return expressions (Qinglang Miao)" * tag 'pci-v5.10-changes' of git://git.kernel.org/pub/scm/linux/kernel/git/helgaas/pci: (147 commits) PCI: vmd: Update VMD PM to correctly use generic PCI PM PCI: vmd: Create IRQ allocation helper PCI: vmd: Create IRQ Domain configuration helper PCI: vmd: Create bus offset configuration helper PCI: vmd: Create physical offset helper PCI: v3-semi: Remove unneeded break PCI: dwc: Add link up check in dw_child_pcie_ops.map_bus() PCI/ASPM: Remove struct pcie_link_state.l1ss PCI/ASPM: Remove struct aspm_register_info.l1ss_cap PCI/ASPM: Pass L1SS Capabilities value, not struct aspm_register_info PCI/ASPM: Remove struct aspm_register_info.l1ss_ctl1 PCI/ASPM: Remove struct aspm_register_info.l1ss_ctl2 (unused) PCI/ASPM: Remove struct aspm_register_info.l1ss_cap_ptr PCI/ASPM: Remove struct aspm_register_info.latency_encoding PCI/ASPM: Remove struct aspm_register_info.enabled PCI/ASPM: Remove struct aspm_register_info.support PCI/ASPM: Use 'parent' and 'child' for readability PCI/ASPM: Move LTR path check to where it's used PCI/ASPM: Move pci_clear_and_set_dword() earlier PCI: dwc: Fix MSI page leakage in suspend/resume ...
2020-10-02phy: marvell: comphy: Convert internal SMCC firmware return codes to errnoPali Rohár
Driver ->power_on and ->power_off callbacks leaks internal SMCC firmware return codes to phy caller. This patch converts SMCC error codes to standard linux errno codes. Include file linux/arm-smccc.h already provides defines for SMCC error codes, so use them instead of custom driver defines. Note that return value is signed 32bit, but stored in unsigned long type with zero padding. Tested-by: Tomasz Maciej Nowak <tmn505@gmail.com> Link: https://lore.kernel.org/r/20200902144344.16684-2-pali@kernel.org Signed-off-by: Pali Rohár <pali@kernel.org> Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> Reviewed-by: Rob Herring <robh@kernel.org>
2020-09-08phy: phy-pxa-28nm-usb2: convert to readl_poll_timeout()Chunfeng Yun
Use readl_poll_timeout() to simplify code Signed-off-by: Chunfeng Yun <chunfeng.yun@mediatek.com> Link: https://lore.kernel.org/r/1598320987-25518-6-git-send-email-chunfeng.yun@mediatek.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
2020-09-08phy: phy-pxa-28nm-hsic: convert to readl_poll_timeout()Chunfeng Yun
Use readl_poll_timeout() to simplify code Signed-off-by: Chunfeng Yun <chunfeng.yun@mediatek.com> Link: https://lore.kernel.org/r/1598320987-25518-5-git-send-email-chunfeng.yun@mediatek.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
2020-07-21phy: armada-38x: fix NETA lockup when repeatedly switching speedsRussell King
The mvneta hardware appears to lock up in various random ways when repeatedly switching speeds between 1G and 2.5G, which involves reprogramming the COMPHY. It is not entirely clear why this happens, but best guess is that reprogramming the COMPHY glitches mvneta clocks causing the hardware to fail. It seems that rebooting resolves the failure, but not down/up cycling the interface alone. Various other approaches have been tried, such as trying to cleanly power down the COMPHY and then take it back through the power up initialisation, but this does not seem to help. It was finally noticed that u-boot's last step when configuring a COMPHY for "SGMII" mode was to poke at a register described as "GBE_CONFIGURATION_REG", which is undocumented in any external documentation. All that we have is the fact that u-boot sets a bit corresponding to the "SGMII" lane at the end of COMPHY initialisation. Experimentation shows that if we clear this bit prior to changing the speed, and then set it afterwards, mvneta does not suffer this problem on the SolidRun Clearfog when switching speeds between 1G and 2.5G. This problem was found while script-testing phylink. This fix also requires the corresponding change to DT to be effective. See "ARM: dts: armada-38x: fix NETA lockup when repeatedly switching speeds". Fixes: 14dc100b4411 ("phy: armada38x: add common phy support") Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk> Reviewed-by: Andrew Lunn <andrew@lunn.ch> Link: https://lore.kernel.org/r/E1jxtRj-0003Tz-CG@rmk-PC.armlinux.org.uk Signed-off-by: Vinod Koul <vkoul@kernel.org>
2020-07-13phy-mvebu-a3700-utmi: correct typo in struct mvebu_a3700_utmi commentsVinod Koul
We get warning with W=1 build: drivers/phy/marvell/phy-mvebu-a3700-utmi.c:84: warning: Function parameter or member 'usb_misc' not described in 'mvebu_a3700_utmi' Fix that by correcting the typo usb_mis Link: https://lore.kernel.org/r/20200708132809.265967-1-vkoul@kernel.org Signed-off-by: Vinod Koul <vkoul@kernel.org>
2020-01-29Merge tag 'usb-5.6-rc1' of ↵Linus Torvalds
git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/usb Pull USB/Thunderbolt/PHY driver updates from Greg KH: "Here is the big USB and Thunderbolt and PHY driver updates for 5.6-rc1. With the advent of USB4, "Thunderbolt" has really become USB4, so the renaming of the Kconfig option and starting to share subsystem code has begun, hence both subsystems coming in through the same tree here. PHY driver updates also touched USB drivers, so that is coming in through here as well. Major stuff included in here are: - USB 4 initial support added (i.e. Thunderbolt) - musb driver updates - USB gadget driver updates - PHY driver updates - USB PHY driver updates - lots of USB serial stuff fixed up - USB typec updates - USB-IP fixes - lots of other smaller USB driver updates All of these have been in linux-next for a while now (the usb-serial tree is already tested in linux-next on its own before merged into here), with no reported issues" [ Removed an incorrect compile test enablement for PHY_EXYNOS5250_SATA that causes configuration warnings - Linus ] * tag 'usb-5.6-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/usb: (207 commits) Doc: ABI: add usb charger uevent usb: phy: show USB charger type for user usb: cdns3: fix spelling mistake and rework grammar in text usb: phy: phy-gpio-vbus-usb: Convert to GPIO descriptors USB: serial: cyberjack: fix spelling mistake "To" -> "Too" USB: serial: ir-usb: simplify endpoint check USB: serial: ir-usb: make set_termios synchronous USB: serial: ir-usb: fix IrLAP framing USB: serial: ir-usb: fix link-speed handling USB: serial: ir-usb: add missing endpoint sanity check usb: typec: fusb302: fix "op-sink-microwatt" default that was in mW usb: typec: wcove: fix "op-sink-microwatt" default that was in mW usb: dwc3: pci: add ID for the Intel Comet Lake -V variant usb: typec: tcpci: mask event interrupts when remove driver usb: host: xhci-tegra: set MODULE_FIRMWARE for tegra186 usb: chipidea: add inline for ci_hdrc_host_driver_init if host is not defined usb: chipidea: handle single role for usb role class usb: musb: fix spelling mistake: "periperal" -> "peripheral" phy: ti: j721e-wiz: Fix build error without CONFIG_OF_ADDRESS USB: usbfs: Always unlink URBs in reverse order ...
2020-01-06phy: Enable compile testing for some of driversKrzysztof Kozlowski
Some of the phy drivers can be compile tested to increase build coverage. Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org> Link: https://lore.kernel.org/r/20200103164710.4829-2-krzk@kernel.org Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2020-01-05net: switch to using PHY_INTERFACE_MODE_10GBASER rather than 10GKRRussell King
Switch network drivers, phy drivers, and SFP/phylink over to use the more correct 10GBASE-R, rather than 10GBASE-KR. 10GBASE-KR is backplane ethernet, which is 10GBASE-R with autonegotiation on top, which our current usage on the affected platforms does not have. The only remaining user of PHY_INTERFACE_MODE_10GKR is the Aquantia PHY, which has a separate mode for 10GBASE-KR. For Marvell mvpp2, we detect 10GBASE-KR, and rewrite it to 10GBASE-R for compatibility with existing DT - this is the only network driver at present that makes use of PHY_INTERFACE_MODE_10GKR. Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk> Reviewed-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: David S. Miller <davem@davemloft.net>
2019-12-05Merge tag 'armsoc-drivers' of ↵Linus Torvalds
git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc Pull ARM SoC driver updates from Olof Johansson: "Various driver updates for platforms: - A larger set of work on Tegra 2/3 around memory controller and regulator features, some fuse cleanups, etc.. - MMP platform drivers, in particular for USB PHY, and other smaller additions. - Samsung Exynos 5422 driver for DMC (dynamic memory configuration), and ASV (adaptive voltage), allowing the platform to run at more optimal operating points. - Misc refactorings and support for RZ/G2N and R8A774B1 from Renesas - Clock/reset control driver for TI/OMAP - Meson-A1 reset controller support - Qualcomm sdm845 and sda845 SoC IDs for socinfo" * tag 'armsoc-drivers' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (150 commits) firmware: arm_scmi: Fix doorbell ring logic for !CONFIG_64BIT soc: fsl: add RCPM driver dt-bindings: fsl: rcpm: Add 'little-endian' and update Chassis definition memory: tegra: Consolidate registers definition into common header memory: tegra: Ensure timing control debug features are disabled memory: tegra: Introduce Tegra30 EMC driver memory: tegra: Do not handle error from wait_for_completion_timeout() memory: tegra: Increase handshake timeout on Tegra20 memory: tegra: Print a brief info message about EMC timings memory: tegra: Pre-configure debug register on Tegra20 memory: tegra: Include io.h instead of iopoll.h memory: tegra: Adapt for Tegra20 clock driver changes memory: tegra: Don't set EMC rate to maximum on probe for Tegra20 memory: tegra: Add gr2d and gr3d to DRM IOMMU group memory: tegra: Set DMA mask based on supported address bits soc: at91: Add Atmel SFR SN (Serial Number) support memory: atmel-ebi: switch to SPDX license identifiers memory: atmel-ebi: move NUM_CS definition inside EBI driver soc: mediatek: Refactor bus protection control soc: mediatek: Refactor sram control ...
2019-10-23phy-mvebu-a3700-utmi: Use devm_platform_ioremap_resource() in ↵Markus Elfring
mvebu_a3700_utmi_phy_probe() Simplify this function implementation by using a known wrapper function. This issue was detected by using the Coccinelle software. Signed-off-by: Markus Elfring <elfring@users.sourceforge.net> Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
2019-10-17phy: Add USB2 PHY driver for Marvell MMP3 SoCLubomir Rintel
Add PHY driver for the USB2 PHY found on Marvell MMP3 SoC. Signed-off-by: Lubomir Rintel <lkundrak@v3.sk> Acked-by: Kishon Vijay Abraham I <kishon@ti.com>
2019-08-27phy: marvell: phy-mvebu-cp110-comphy: rename instances of DLTMatt Pelland
The documentation for Marvell's cp110 phy refers to these registers/register regions as DTL control, DTL frequency loop enable, etc. This patch aligns the relevant code for these accordingly. Signed-off-by: Matt Pelland <mpelland@starry.com> Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
2019-08-27phy: marvell: phy-mvebu-cp110-comphy: implement RXAUI supportMatt Pelland
Marvell's cp110 phy supports RXAUI on lanes 2, 3, 4, and 5 when connected to port zero. When used in this mode, lanes operate in pairs of two (2 and 3, 4 and 5). Signed-off-by: Matt Pelland <mpelland@starry.com> Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
2019-08-27phy: mvebu-cp110-comphy: Update comment about powering off all lanes at bootMiquel Raynal
Now that all COMPHY modes are supported by the driver, update the comment stating that mvebu_comphy_power_off() should be called for each lane. This is still wrong because for compatibility reasons, it might break users running an old firmware (the driver only uses SMC calls for SATA, USB and PCIe configuration, there is no code in Linux to fallback on in these cases. Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
2019-08-27phy: mvebu-cp110-comphy: Add PCIe supportGrzegorz Jaszczyk
Add PCIe support by filling the COMPHY modes table. Also add a new macro to generate the right value for the firmware depending on the width (PCI x1, x2, x4, etc). The width will be passed by the core as the "submode" argument of the ->set_mode() callback. If this argument is zero, default to x1 mode. Signed-off-by: Grzegorz Jaszczyk <jaz@semihalf.com> [miquel.raynal@bootlin.com: adapt the content to the mainline driver] Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
2019-08-27phy: mvebu-cp110-comphy: Cosmetic change in a helperMiquel Raynal
Before adding more logic, simplify a bit the writing of the mvebu_comphy_get_mode() helper by using a pointer instead of referencing a configuration with the entire table name. Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
2019-08-27phy: mvebu-cp110-comphy: Add SATA supportGrzegorz Jaszczyk
Add the corresponding entries in the COMPHY modes table. SATA support does not need any additional care. Signed-off-by: Grzegorz Jaszczyk <jaz@semihalf.com> [miquel.raynal@bootlin.com: adapt the content to the mainline driver] Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
2019-08-27phy: mvebu-cp110-comphy: Add USB3 host/device supportGrzegorz Jaszczyk
Add USB3 host/device support by adding the right entries in the COMPHY modes table. A new macro is created to instantiate a "generic" mode ie. not an Ethernet one. This macro will be re-used when adding SATA support. Signed-off-by: Grzegorz Jaszczyk <jaz@semihalf.com> [miquel.raynal@bootlin.com: adapt the content to the mainline driver] Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
2019-08-27phy: mvebu-cp110-comphy: Allow non-Ethernet modes to be configuredMiquel Raynal
The COMPHY can configure the SERDES lanes in several non-Ethernet modes: SATA, USB3, PCIe. Drop the condition limiting the driver to Ethernet modes only before adding support for more. Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
2019-08-27phy: mvebu-cp110-comphy: Rename the macro handling only Ethernet modesMiquel Raynal
Before adding support for other PHY modes (not Ethernet ones), let's rename the MVEBU_COMPHY_CONF macro to a more specific (and shorter) appellation. Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
2019-08-27phy: mvebu-cp110-comphy: Add RXAUI supportGrzegorz Jaszczyk
Add support for RXAUI mode by adding an entry in the COMPHY modes list. There is no user for this mode yet so we can enforce an up-to-date firmware and return an error otherwise without breaking anywone. Signed-off-by: Grzegorz Jaszczyk <jaz@semihalf.com> [miquel.raynal@bootlin.com: adapt the content to the mainline driver] Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
2019-08-27phy: mvebu-cp110-comphy: List already supported Ethernet modesMiquel Raynal
Currently, the driver supports setting lanes to 1000BASEX, 2500BASEX, 10GKR. Complete the COMPHY modes list by adding two (already supported) cases for lane 4. Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
2019-08-27phy: mvebu-cp110-comphy: Add SMC call supportGrzegorz Jaszczyk
Keep the exact same list of supported configurations but first try to use the firmware's implementation. If it fails, try the legacy method: Linux implementation. Signed-off-by: Grzegorz Jaszczyk <jaz@semihalf.com> [miquel.raynal@bootlin.com: adapt the content to the mainline driver] Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Tested-by: Maxime Chevallier <maxime.chevallier@bootlin.com> Tested-by: Grzegorz Jaszczyk <jaz@semihalf.com> Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
2019-08-27phy: mvebu-cp110-comphy: Explicitly initialize the lane submodeMiquel Raynal
Explicitly set the lane submode (enum) to a known invalid value. Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
2019-08-27phy: mvebu-cp110-comphy: Add clocks supportMiquel Raynal
There is no public clock tree that implies such dependencies between the MG/MG-core/AXI clocks and the COMPHY IP but accessing the COMPHY registers while one of the three clocks are disabled stalls the CPU. This happens if, for instance, the COMPHY driver probe is deferred (eg. the USB Vbus regulator driver is not yet visible). The MVPP2 driver which also needs these clocks (among others) will prepare/enable the clocks, then be deferred, and disable/unprepare them. Next COMPHY lane to be configured would produce an infinite stall. Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Tested-by: Grzegorz Jaszczyk <jaz@semihalf.com> Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
2019-08-23phy: mvebu-a3700-comphy: Inform users if their firmware is too oldMiquel Raynal
PHY configuration has been implemented in the firmware and accessed through SMC calls. In the past, it worked magically if the bootloader was correctly doing the initializations. With up-to-date bindings, the kernel will need a recent firmware in order to do the initializations himself (we assume people must update their firmware along with their kernel). People might not understand why IPs that were working correctly before stopped to be probed suddendly. In this case, let's advise the users to update their firmware with a visual warning. Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
2019-08-23phy: marvell: phy-mvebu-a3700-comphy: Add of_node_put() before returnNishka Dasgupta
Each iteration of for_each_available_child_of_node puts the previous node, but in the case of a return from the middle of the loop, there is no put, thus causing a memory leak. Hence add an of_node_put before the return in two places. Issue found with Coccinelle. Signed-off-by: Nishka Dasgupta <nishkadg.linux@gmail.com> Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>