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2024-08-23pinctrl: meson: Constify some structuresChristophe JAILLET
The following structures are not modified in these drivers. - struct meson_bank - struct meson_pmx_bank - struct meson_pmx_func - struct meson_pmx_group - struct meson_pinctrl_data - struct meson_axg_pmx_data Constifying these structures moves some data to a read-only section, so increase overall security. On a x86_64, with allmodconfig: Before: ====== text data bss dec hex filename 10818 11696 0 22514 57f2 drivers/pinctrl/meson/pinctrl-amlogic-c3.o 17198 17680 0 34878 883e drivers/pinctrl/meson/pinctrl-amlogic-t7.o 14161 11200 0 25361 6311 drivers/pinctrl/meson/pinctrl-meson8b.o 17348 12512 0 29860 74a4 drivers/pinctrl/meson/pinctrl-meson8.o 3070 324 0 3394 d42 drivers/pinctrl/meson/pinctrl-meson8-pmx.o 9317 9648 0 18965 4a15 drivers/pinctrl/meson/pinctrl-meson-a1.o 12115 11664 0 23779 5ce3 drivers/pinctrl/meson/pinctrl-meson-axg.o 2470 120 0 2590 a1e drivers/pinctrl/meson/pinctrl-meson-axg-pmx.o 15125 15224 0 30349 768d drivers/pinctrl/meson/pinctrl-meson-g12a.o 13800 10160 0 23960 5d98 drivers/pinctrl/meson/pinctrl-meson-gxbb.o 13040 9648 0 22688 58a0 drivers/pinctrl/meson/pinctrl-meson-gxl.o 20507 1132 48 21687 54b7 drivers/pinctrl/meson/pinctrl-meson.o 12212 12880 0 25092 6204 drivers/pinctrl/meson/pinctrl-meson-s4.o After: ===== text data bss dec hex filename 22242 248 0 22490 57da drivers/pinctrl/meson/pinctrl-amlogic-c3.o 34638 248 0 34886 8846 drivers/pinctrl/meson/pinctrl-amlogic-t7.o 25137 232 0 25369 6319 drivers/pinctrl/meson/pinctrl-meson8b.o 29604 232 0 29836 748c drivers/pinctrl/meson/pinctrl-meson8.o 3070 324 0 3394 d42 drivers/pinctrl/meson/pinctrl-meson8-pmx.o 18725 248 0 18973 4a1d drivers/pinctrl/meson/pinctrl-meson-a1.o 23539 248 0 23787 5ceb drivers/pinctrl/meson/pinctrl-meson-axg.o 2470 120 0 2590 a1e drivers/pinctrl/meson/pinctrl-meson-axg-pmx.o 30101 256 0 30357 7695 drivers/pinctrl/meson/pinctrl-meson-g12a.o 23688 248 0 23936 5d80 drivers/pinctrl/meson/pinctrl-meson-gxbb.o 22416 248 0 22664 5888 drivers/pinctrl/meson/pinctrl-meson-gxl.o 20507 1132 48 21687 54b7 drivers/pinctrl/meson/pinctrl-meson.o 24820 248 0 25068 61ec drivers/pinctrl/meson/pinctrl-meson-s4.o Signed-off-by: Christophe JAILLET <christophe.jaillet@wanadoo.fr> Reviewed-by: Jerome Brunet <jbrunet@baylibre.com> Tested-by: Jerome Brunet <jbrunet@baylibre.com> Link: https://lore.kernel.org/f74e326bd7d48003c06219545bad7c2ef1a84bf8.1723053850.git.christophe.jaillet@wanadoo.fr Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2024-06-17pinctrl: add missing MODULE_DESCRIPTION() macrosJeff Johnson
When ARCH=x86, make allmodconfig && make W=1 C=1 reports: WARNING: modpost: missing MODULE_DESCRIPTION() in drivers/pinctrl/bcm/pinctrl-bcm4908.o WARNING: modpost: missing MODULE_DESCRIPTION() in drivers/pinctrl/pinctrl-mcp23s08_i2c.o WARNING: modpost: missing MODULE_DESCRIPTION() in drivers/pinctrl/pinctrl-mcp23s08_spi.o WARNING: modpost: missing MODULE_DESCRIPTION() in drivers/pinctrl/pinctrl-mcp23s08.o WARNING: modpost: missing MODULE_DESCRIPTION() in drivers/pinctrl/meson/pinctrl-meson.o Add the missing invocation of the MODULE_DESCRIPTION() macro to all files which have a MODULE_LICENSE(). This includes many meson drivers which, although they did not produce a warning with the x86 allmodconfig configuration, may cause this warning with ARM or ARM64 configurations. Signed-off-by: Jeff Johnson <quic_jjohnson@quicinc.com> Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org> # for Amlogic Pinctrl drivers Link: https://lore.kernel.org/r/20240610-md-drivers-pinctrl-v1-1-68462e3d960c@quicinc.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2023-08-23pinctrl: use capital "OR" for multiple licenses in SPDXKrzysztof Kozlowski
Documentation/process/license-rules.rst and checkpatch expect the SPDX identifier syntax for multiple licenses to use capital "OR". Correct it to keep consistent format and avoid copy-paste issues. Correct also the placement of SPDX identifier in pinctrl-meson-axg files: WARNING: Misplaced SPDX-License-Identifier tag - use line 1 instead Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org> Link: https://lore.kernel.org/r/20230823085546.116494-1-krzysztof.kozlowski@linaro.org Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2023-08-07pinctrl: Replace the IRQ number in the driver with the IRQID macro definitionHuqiang Qin
Replacing IRQ numbers with IRQID macro definitions makes driver code easier to understand. Associated platforms: - Amlogic Meson-G12A - Amlogic Meson-G12B - Amlogic Meson-SM1 Signed-off-by: Huqiang Qin <huqiang.qin@amlogic.com> Acked-by: Linus Walleij <linus.walleij@linaro.org> Link: https://lore.kernel.org/r/20230724060108.1403662-3-huqiang.qin@amlogic.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2022-01-24pinctrl: meson-g12a: add more pwm_f optionsGary Bisson
Add missing PWM_F pin muxing for GPIOA_11 and GPIOZ_12. Signed-off-by: Gary Bisson <gary.bisson@boundarydevices.com> Reviewed-by: Neil Armstrong <narmstrong@baylibre.com> Link: https://lore.kernel.org/r/20220112211642.2248901-2-gary.bisson@boundarydevices.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2020-11-05pinctrl/meson: enable building as modulesKevin Hilman
Enable pinctrl drivers for 64-bit Amlogic SoCs to be built as modules. The default is still built-in, this only adds the option of building as modules. Signed-off-by: Kevin Hilman <khilman@baylibre.com> Link: https://lore.kernel.org/r/20201026183025.31768-1-khilman@baylibre.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2019-11-19pinctrl: meson: add a new callback for SoCs fixupQianggui Song
In meson_pinctrl_parse_dt, it contains two parts: reg parsing and SoC relative fixup for AO. Several fixups in the same code make it hard to maintain, so move all fixups to each SoC's callback and make meson_pinctrl_parse_dt just do the reg parsing, separate these two parts.Overview of all current Meson SoCs fixup is as below: +------+--------------------------------------+--------------------------+ | | | | | SoC | EE domain | AO domain | +------+--------------------------------------+--------------------------+ |m8 | parse regs: | parse regs: | |m8b | gpio,mux,pull,pull-enable(skip ds) | gpio,mux,pull(skip ds)| |gxl | fixup: | fixup: | |gxbb | no | pull-enable = pull; | |axg | | | +------+--------------------------------------+--------------------------+ |g12a | parse regs: | parse regs: | |sm1 | gpio,mux,pull,pull-enable,ds | gpio,mux,ds | | | fixup: | fixup: | | | no | pull = gpio; | | | | pull-enable = gpio; | +------+--------------------------------------+--------------------------+ |a1 or | parse regs: | |later | gpio/mux (without ao domain) | |SoCs | fixup: | | | pull = gpio; pull-enable = gpio; ds = gpio; | +------+-----------------------------------------------------------------+ Since m8-axg share the same ao fixup, make a common function meson8_aobus_parse_dt_extra to do the job. Signed-off-by: Qianggui Song <qianggui.song@amlogic.com> Link: https://lore.kernel.org/r/1573819429-6937-2-git-send-email-qianggui.song@amlogic.com Reviewed-by: Neil Armstrong <narmstrong@baylibre.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2019-08-05pinctrl: meson-g12a: add pwm_a on GPIOE_2 pinmuxNeil Armstrong
Add the missing pinmux for the pwm_a function on the GPIOE_2 pin. Reviewed-by: Kevin Hilman <khilman@baylibre.com> Reviewed-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> Signed-off-by: Neil Armstrong <narmstrong@baylibre.com> Link: https://lore.kernel.org/r/20190729125838.6498-1-narmstrong@baylibre.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2019-05-23pinctrl: meson: g12a: add DS bank valueGuillaume La Roque
add drive-strength bank regiter and bit value for G12A SoC Signed-off-by: Guillaume La Roque <glaroque@baylibre.com> Reviewed-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2018-08-29pinctrl: meson-g12a: add pinctrl driver supportYixun Lan
Add the pinctrl driver for Meson-G12A SoC which share the similar IP as the previous Meson-AXG SoC, both use same pinmux ops (register layout). A new driver is needed here due to the differences in the pins. Starting from Meson-AXG SoC, the pinctrl controller block use 4 continues register bits to specific the pin mux function, while comparing to old generation SoC which using variable length register bits for the pin mux definition. The new design greatly simplify the software model. For the detail example, one 32bit register can be divided into 8 parts, each has 4 bits whose value start from 0 - 7, each can describe one pin, the value 0 is always devoted to GPIO function, while 1 - 7 devoted to the mux pin function. Please note, the GPIOE is actually located at AO (always on) bank. Acked-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> Signed-off-by: Xingyu Chen <xingyu.chen@amlogic.com> Signed-off-by: Yixun Lan <yixun.lan@amlogic.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
generated by cgit (git 2.34.1) at 2025-03-21 02:52:20 +0000