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A pretty clever static checker found a bug in my patch: I added more
bits to a bitmask but didn't extend the array indexed to the same
bitmask.
Fixes: 756a024f3983 ("pinctrl: gemini: Fix GMAC groups")
Reported-by: Dan Carpenter <dan.carpenter@oracle.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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The GMII groups need to be split across GMAC0 and GMAC1 since
GMAC0 is always available but GMAC1 masks GPIO2 lines 0-7
so we might want just one interface out.
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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This enabled pin config on the Gemini driver and implements
pin skew/delay so that the ethernet pins clocking can be
properly configured.
Acked-by: Hans Ulli Kroll <ulli.kroll@googlemail.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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We can just use the generic Device Tree parser code
in this driver and save some code.
Acked-by: Hans Ulli Kroll <ulli.kroll@googlemail.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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Some two functions were missing from the Gemini pin control
driver. Noticed when trying to use ethernet. Fix it up by
adding them.
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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This adds a pin control (only multiplexing) driver for the Gemini
SoC so we can sort out this complex platform in an orderly manner.
This driver will detect the chip/package version as SL3512 or SL3516
(also known as CS3512 and CS3516 etc) and register the apropriate
pin set.
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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