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path: root/drivers/pinctrl/qcom/pinctrl-ipq4019.c
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2016-03-31pinctrl: qcom: ipq4019: fix register offsetsMatthew McClintock
For this SoC the register offsets changed from previous versions to be separated by a larger amount. Signed-off-by: Matthew McClintock <mmcclint@codeaurora.org> Acked-by: Björn Andersson <bjorn.andersson@linaro.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2016-03-31pinctrl: qcom: ipq4019: fix the function enum for gpio modeMatthew McClintock
Without this, we would fail to set the mode to gpio if trying to configure for that mode Signed-off-by: Matthew McClintock <mmcclint@codeaurora.org> Acked-by: Björn Andersson <bjorn.andersson@linaro.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2016-03-31pinctrl: qcom: ipq4019: set ngpios to correct valueMatthew McClintock
This should have been bumped to 100 when the extra pins were added in the original pinctrl patch Signed-off-by: Matthew McClintock <mmcclint@codeaurora.org> Acked-by: Björn Andersson <bjorn.andersson@linaro.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2016-02-16pinctrl: qcom: ipq4019: Add IPQ4019 pinctrl supportVaradarajan Narayanan
Add pinctrl driver support for IPQ4019 platform Signed-off-by: Sricharan R <sricharan@codeaurora.org> Signed-off-by: Mathieu Olivari <mathieu@codeaurora.org> Signed-off-by: Varadarajan Narayanan <varada@codeaurora.org> Signed-off-by: Matthew McClintock <mmcclint@codeaurora.org> Acked-by: Rob Herring <robh@kernel.org> Reviewed-by: Andy Gross <andy.gross@linaro.org> Acked-by: Bjorn Andersson <bjorn.andersson@linaro.org> [Dropped .owner assignment] Signed-off-by: Linus Walleij <linus.walleij@linaro.org>