| Age | Commit message (Collapse) | Author | |
|---|---|---|---|
| 2017-08-14 | pinctrl: sunxi: fix V3s pinctrl driver IRQ bank base | Icenowy Zheng | |
| The V3s pin controller doesn't have the bank 0 (starts at address 0x200), which is like A33. However, this is not worked around when developing the driver, which makes IRQ not working. Fix the IRQ bank base. Fixes: 56d9e4a76039 ("pinctrl: sunxi: add driver for V3s SoC") Signed-off-by: Icenowy Zheng <icenowy@aosc.io> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org> | |||
| 2017-01-11 | pinctrl: sunxi: add driver for V3s SoC | Icenowy Zheng | |
| V3s SoC features only a pin controller (for the lack of CPUs part). Add a driver for this controller. Signed-off-by: Icenowy Zheng <icenowy@aosc.xyz> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org> | |||
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index : linux-arm.git | |
| Russell King's ARM Linux kernel tree | Russell King |
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