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path: root/drivers/pinctrl
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2020-04-20pinctrl: rza1: Fix wrong array assignment of rza1l_swio_entriesJason Yan
The rza1l_swio_entries referred to the wrong array rza1h_swio_pins, which was intended to be rza1l_swio_pins. So let's fix it. This is detected by the following gcc warning: drivers/pinctrl/pinctrl-rza1.c:401:35: warning: ‘rza1l_swio_pins’ defined but not used [-Wunused-const-variable=] static const struct rza1_swio_pin rza1l_swio_pins[] = { ^~~~~~~~~~~~~~~ Fixes: 039bc58e73b77723 ("pinctrl: rza1: Add support for RZ/A1L") Reported-by: Hulk Robot <hulkci@huawei.com> Signed-off-by: Jason Yan <yanaijie@huawei.com> Link: https://lore.kernel.org/r/20200417111604.19143-1-yanaijie@huawei.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2020-04-17Merge tag 'intel-pinctrl-v5.7-2' of ↵Linus Walleij
git://git.kernel.org/pub/scm/linux/kernel/git/pinctrl/intel into fixes intel-pinctrl for v5.7-2 * Enable pin configuration setting for Baytrail * Fix interrupt handling due to hardware sighting for Cherryview * Fix PAD lock offset for Sunrisepoint-H The following is an automated git shortlog grouped by driver: baytrail: - Enable pin configuration setting for GPIO chip cherryview: - Add missing spinlock usage in chv_gpio_irq_handler sunrisepoint: - Fix PAD lock register offset for SPT-H
2020-04-17pinctrl: cherryview: Add missing spinlock usage in chv_gpio_irq_handlerGrace Kao
According to Braswell NDA Specification Update (#557593), concurrent read accesses may result in returning 0xffffffff and write instructions may be dropped. We have an established format for the commit references, i.e. cdca06e4e859 ("pinctrl: baytrail: Add missing spinlock usage in byt_gpio_irq_handler") Fixes: 0bd50d719b00 ("pinctrl: cherryview: prevent concurrent access to GPIO controllers") Signed-off-by: Grace Kao <grace.kao@intel.com> Reported-by: Brian Norris <briannorris@chromium.org> Reviewed-by: Brian Norris <briannorris@chromium.org> Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com> Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
2020-04-17pinctrl: cherryview: Add missing spinlock usage in chv_gpio_irq_handlerGrace Kao
According to Braswell NDA Specification Update (#557593), concurrent read accesses may result in returning 0xffffffff and write instructions may be dropped. We have an established format for the commit references, i.e. cdca06e4e859 ("pinctrl: baytrail: Add missing spinlock usage in byt_gpio_irq_handler") Fixes: 0bd50d719b00 ("pinctrl: cherryview: prevent concurrent access to GPIO controllers") Signed-off-by: Grace Kao <grace.kao@intel.com> Reported-by: Brian Norris <briannorris@chromium.org> Reviewed-by: Brian Norris <briannorris@chromium.org> Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com> Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
2020-04-17pinctrl: mcp23s08: add module licenseJason Yan
Fix the following build warning: WARNING: modpost: missing MODULE_LICENSE() in drivers/pinctrl/pinctrl-mcp23s08.o see include/linux/module.h for more information Signed-off-by: Jason Yan <yanaijie@huawei.com> Link: https://lore.kernel.org/r/20200417092125.12513-1-yanaijie@huawei.com Reported-by: Randy Dunlap <rdunlap@infradead.org> Reported-by: Stephen Rothwell <sfr@canb.auug.org.au> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2020-04-17pinctrl: qcom: Remove duplicated include from pinctrl-msm.cYueHaibing
Remove duplicated include. Fixes: 13bec8d49bdf ("pinctrl: qcom: use scm_call to route GPIO irq to Apps") Signed-off-by: YueHaibing <yuehaibing@huawei.com> Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20200408070504.134847-1-yuehaibing@huawei.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2020-04-16pinctrl: lynxpoint: Use platform_get_irq_optional() explicitlyAndy Shevchenko
There is no need to repeat functionality of platform_get_irq_optional() in the driver. Replace it with explicit call to the helper. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com> Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
2020-04-16pinctrl: mcp23s08: Split to three parts: core, I²C, SPIAndy Shevchenko
Split the driver to three parts: core, I²C, SPI. No functional change intended. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Link: https://lore.kernel.org/r/20200407173849.43628-9-andriy.shevchenko@linux.intel.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2020-04-16pinctrl: mcp23s08: Use for_each_set_bit() and hweight_long()Andy Shevchenko
Here is a simplification of SPI code by using for_each_set_bit() and hweight_long() library functions. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Link: https://lore.kernel.org/r/20200407173849.43628-8-andriy.shevchenko@linux.intel.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2020-04-16pinctrl: mcp23s08: Make use of device propertiesAndy Shevchenko
Device property API allows to gather device resources from different sources, such as ACPI. Convert the drivers to unleash the power of device property API. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Link: https://lore.kernel.org/r/20200407173849.43628-7-andriy.shevchenko@linux.intel.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2020-04-16pinctrl: mcp23s08: Propagate error code from device_property_read_u32()Andy Shevchenko
Return error code from device_property_read_u32() as is in mcp23s08_probe(). While here, drop status variable in mcp23s08_irq_set_type() which always 0. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Link: https://lore.kernel.org/r/20200407173849.43628-6-andriy.shevchenko@linux.intel.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2020-04-16pinctrl: mcp23s08: Refactor mcp23s08_spi_regmap_init()Andy Shevchenko
There is a lot of duplication for one small helper function. Refactor mcp23s08_spi_regmap_init() to prepare everything first and then register regmap at the end. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Link: https://lore.kernel.org/r/20200407173849.43628-5-andriy.shevchenko@linux.intel.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2020-04-16pinctrl: mcp23s08: Drop unused parameter in mcp23s08_probe_one()Andy Shevchenko
The cs parameter in mcp23s08_probe_one() is never used. Drop it for good. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Link: https://lore.kernel.org/r/20200407173849.43628-4-andriy.shevchenko@linux.intel.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2020-04-16pinctrl: mcp23s08: Consolidate SPI and I²C codeAndy Shevchenko
There are three parts of each, SPI and I²C, driver spread over the code under ifdeffery. Consolidate them so it will be only one for SPI and one for I²C. The code has been cosmetically changed to avoid intrusive change. Clean up is considered in the nearest future. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Link: https://lore.kernel.org/r/20200407173849.43628-3-andriy.shevchenko@linux.intel.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2020-04-16pinctrl: mcp23s08: Deduplicate IRQ chip fillingAndy Shevchenko
In both cases, SPI and I²C, IRQ chip is filled in the same way. Deduplicate this by moving common part to mcp23s08_probe_one(). Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Link: https://lore.kernel.org/r/20200407173849.43628-2-andriy.shevchenko@linux.intel.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2020-04-16pinctrl: mcp23s08: Get rid of legacy platform dataAndy Shevchenko
Platform data is a legacy interface to supply device properties to the driver. In this case we even don't have in-kernel users for it. Just remove it for good. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Link: https://lore.kernel.org/r/20200407173849.43628-1-andriy.shevchenko@linux.intel.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2020-04-16pinctrl: imx: Add imx8dxl driverAnson Huang
i.MX8DXL contains a system controller that is responsible for controlling the pad setting of the IPs that are present. Communication between the host processor running an OS and the system controller happens through a SCU protocol, add support for the SCU based i.MX8DXL pinctrl driver. Signed-off-by: Anson Huang <Anson.Huang@nxp.com> Link: https://lore.kernel.org/r/1585306559-13973-2-git-send-email-Anson.Huang@nxp.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2020-04-16pinctrl: qcom: fix wrong write in update_dual_edgeAnsuel Smith
Fix a typo in the readl/writel accessor conversion where val is used instead of pol changing the behavior of the original code. Cc: stable@vger.kernel.org Fixes: 6c73698904aa pinctrl: qcom: Introduce readl/writel accessors Signed-off-by: Ansuel Smith <ansuelsmth@gmail.com> Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20200414003726.25347-1-ansuelsmth@gmail.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2020-04-16pinctrl: actions: fix function group name for i2c0_groupAmit Singh Tomar
After commit 6f87359e8bca ("pinctrl: actions: Fix functions groups names for S700 SoC") following error has been observed while booting Linux on Cubieboard7-lite(based on S700 SoC). [ 1.206245] pinctrl-s700 e01b0000.pinctrl: invalid group "i2c0_mfp" for function "i2c0" This commit fixes it by using correct name for i2c0_group. Fixes: 6f87359e8bca ("pinctrl: actions: Fix functions groups names for S700 SoC") Signed-off-by: Amit Singh Tomar <amittomer25@gmail.com> Link: https://lore.kernel.org/r/1586757913-5438-1-git-send-email-amittomer25@gmail.com Reviewed-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2020-04-16pinctrl: sunxi: handle probe defferalCorentin Labbe
When checking the logs on my sun8i-a33-olinuxino I saw: sun8i-a23-r-pinctrl 1f02c00.pinctrl: Reset controller missing but this driver was working after. This message is just here because the reset controller was still not probed. So don't say anything if the return code say to wait. Signed-off-by: Corentin Labbe <clabbe@baylibre.com> Link: https://lore.kernel.org/r/1585818532-23051-1-git-send-email-clabbe@baylibre.com Acked-by: Maxime Ripard <mripard@kernel.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2020-04-16pinctrl: mediatek: remove shadow variable declarationLight Hsieh
Remove shadow declaration of variable 'pullup' in mtk_pinconf_get() Signed-off-by: Light Hsieh <light.hsieh@mediatek.com> Reviewed-by: Stanley Chu <stanley.chu@mediatek.com> Link: https://lore.kernel.org/r/1586255632-27528-1-git-send-email-light.hsieh@mediatek.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2020-04-16pinctrl: mediatek: make MediaTek MT6765 pinctrl ready for buiding loadable ↵Light Hsieh
module This patch make pinctrl-mt6765 ready for building as loadable module. Signed-off-by: Sean Wang <sean.wang@mediatek.com> Signed-off-by: Light Hsieh <light.hsieh@mediatek.com> Link: https://lore.kernel.org/r/42100afe6f97d28447c153bea6b54ea556cf95ca.1586289920.git.sean.wang@mediatek.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2020-04-16pinctrl: mediatek: make MediaTek pinctrl v2 driver ready for buidling ↵Light Hsieh
loadable module In the future we want to be able to build the MediaTek pinctrl driver, based on paris, as kernel module. This patch allows pinctrl-paris.c, the external interrupt controller mtk-eint.c, and pinctrl-mtk-common-v2.c to be loadable as module. Signed-off-by: Sean Wang <sean.wang@mediatek.com> Signed-off-by: Light Hsieh <light.hsieh@mediatek.com> Reviewed-by: Matthias Brugger <matthias.bgg@gmail.com> Link: https://lore.kernel.org/r/9feeb04805e5a406fe22a92e3f280abda39ddda4.1586289920.git.sean.wang@mediatek.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2020-04-16pinctrl: nomadik:remove unneeded variableDing Xiang
ret is unneeded, just return 0. Signed-off-by: Ding Xiang <dingxiang@cmss.chinamobile.com> Link: https://lore.kernel.org/r/1585554986-26521-1-git-send-email-dingxiang@cmss.chinamobile.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2020-04-15pinctrl: baytrail: Use platform_get_irq_optional() explicitlyAndy Shevchenko
There is no need to repeat functionality of platform_get_irq_optional() in the driver. Replace it with explicit call to the helper. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com>
2020-04-14pinctrl: intel: Add Intel Jasper Lake pin controller supportAndy Shevchenko
This driver adds pinctrl/GPIO support for Intel Jasper Lake SoC. The GPIO controller is based on the next generation GPIO hardware but still compatible with the one supported by the Intel core pinctrl/GPIO driver. Cc: Mika Westerberg <mika.westerberg@linux.intel.com> Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com>
2020-04-14pinctrl: intel: Introduce new flag to force GPIO base to be 0Andy Shevchenko
In some cases not the first group would like to have GPIO base to be 0. It's not possible right now due to 0 has special meaning already. Thus, introduce a new flag to allow drivers to force GPIO base to be 0 on a certain group. It's assumed that it can be only one group per device with such flag enabled. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com>
2020-04-14pinctrl: tigerlake: Use generic flag for special GPIO base treatmentAndy Shevchenko
Since we have a generic flag for special GPIO base treatment, use it in the driver. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com>
2020-04-14pinctrl: icelake: Use generic flag for special GPIO base treatmentAndy Shevchenko
Since we have a generic flag for special GPIO base treatment, use it in the driver. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com>
2020-04-14pinctrl: cannonlake: Use generic flag for special GPIO base treatmentAndy Shevchenko
Since we have a generic flag for special GPIO base treatment, use it in the driver. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com>
2020-04-14pinctrl: intel: Introduce common flags for GPIO mapping schemeAndy Shevchenko
Few drivers are using the same flag to tell Intel pin control core how to interpret GPIO base. Provide a generic flags so all drivers can use. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com>
2020-04-13pinctrl: baytrail: Enable pin configuration setting for GPIO chipAndy Shevchenko
It appears that pin configuration for GPIO chip hasn't been enabled yet due to absence of ->set_config() callback. Enable it here for Intel Baytrail. Fixes: c501d0b149de ("pinctrl: baytrail: Add pin control operations") Depends-on: 2956b5d94a76 ("pinctrl / gpio: Introduce .set_config() callback for GPIO chips") Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com>
2020-04-13pinctrl: cherryview: Use GENMASK() consistentlyAndy Shevchenko
Use GENMASK() macro for all definitions where it's appropriate. No functional change intended. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com>
2020-04-13pinctrl: sunrisepoint: Fix PAD lock register offset for SPT-HAndy Shevchenko
It appears that SPT-H variant has different offset for PAD locking registers. Fix it here. Fixes: 551fa5801ef1 ("pinctrl: intel: sunrisepoint: Add Intel Sunrisepoint-H support") Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com>
2020-04-13pinctrl: cherryview: Re-use data structures from pinctrl-intel.h (part 2)Andy Shevchenko
We have some data structures duplicated across the drivers. Let's deduplicate them by using ones that being provided by pinctrl-intel.h. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com>
2020-04-13pinctrl: samsung: Correct setting of eint wakeup mask on s5pv210Jonathan Bakker
Commit a8be2af0218c ("pinctrl: samsung: Write external wakeup interrupt mask") started writing the eint wakeup mask from the pinctrl driver. Unfortunately, it made the assumption that the private retention data was always a regmap while in the case of s5pv210 it is a raw pointer to the clock base (as the eint wakeup mask not in the PMU as with newer Exynos platforms). Fixes: a8be2af0218c ("pinctrl: samsung: Write external wakeup interrupt mask") Cc: <stable@vger.kernel.org> Signed-off-by: Jonathan Bakker <xc-racer2@live.ca> Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
2020-04-04Merge tag 'gpio-v5.7-1' of ↵Linus Torvalds
git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-gpio Pull GPIO updates from Linus Walleij: "This is the bulk of GPIO development for the v5.7 kernel cycle. Core and userspace API: - The userspace API KFIFOs have been imoproved with locks that do not block interrupts. This makes us better at getting events to userspace without blocking or disturbing new events arriving in the same time. This was reviewed by the KFIFO maintainer Stefani. This is a generic improvement which paves the road for similar improvements in other subsystems. - We provide a new ioctl() for monitoring changes in the line information, such as when multiple clients are taking lines and giving them back, possibly reconfiguring them in the process: we can now monitor that and not get stuck with stale static information. - An example tool 'gpio-watch' is provided to showcase this functionality. - Timestamps for events are switched to ktime_get_ns() which is monotonic. We previously had a 'realtime' stamp which could move forward and *backward* in time, which probably would just cause silent bugs and weird behaviour. In the long run we see two relevant timestamps: ktime_get_ns() or the timestamp sometimes provided by the GPIO hardware itself, if that exists. - Device Tree overlay support for GPIO hogs. On systems that load overlays, these overlays can now contain hogs, and will then be respected. - Handle pin control interaction with nonexisting pin ranges in the GPIO library core instead of in the individual drivers. New drivers: - New driver for the Mellanox BlueField 2 GPIO controller. Driver improvements: - Introduce the BGPIOF_NO_SET_ON_INPUT flag to the generic MMIO GPIO library and use this flag in the MT7621 driver. - Texas Instruments OMAP CPU power management improvements, such as blocking of idle on pending GPIO interrupts" * tag 'gpio-v5.7-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-gpio: (59 commits) Revert "gpio: eic-sprd: Use devm_platform_ioremap_resource()" pinctrl: Unconditionally assign .request()/.free() gpio: Unconditionally assign .request()/.free() gpio: export of_pinctrl_get to modules pinctrl: Define of_pinctrl_get() dummy for !PINCTRL gpio: Rename variable in core APIs gpio: Avoid using pin ranges with !PINCTRL gpiolib: Remove unused gpio_chip parameter from gpio_set_bias() gpiolib: Pass gpio_desc to gpio_set_config() gpiolib: Introduce gpiod_set_config() tools: gpio: Fix out-of-tree build regression gpio: gpiolib: fix a doc warning gpio: tegra186: Add Tegra194 pin ranges for GG.0 and GG.1 gpio: tegra186: Add support for pin ranges gpio: Support GPIO controllers without pin-ranges ARM: integrator: impd1: Use GPIO_LOOKUP() helper macro gpio: brcmstb: support gpio-line-names property tools: gpio: Fix typo in gpio-utils tools: gpio-hammer: Apply scripts/Lindent and retain good changes gpiolib: gpio_name_to_desc: factor out !name check ...
2020-04-02Merge tag 'pinctrl-v5.7-1' of ↵Linus Torvalds
git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl Pull pin control updates from Linus Walleij: "This is the bulk of pin control changes for the v5.7 kernel cycle. There are no core changes this time, only driver developments: - New driver for the Dialog Semiconductor DA9062 Power Management Integrated Circuit (PMIC). - Renesas SH-PFC has improved consistency, with group and register checks in the configuration checker. - New subdriver for the Qualcomm IPQ6018. - Add the RGMII pin control functionality to Qualcomm IPQ8064. - Performance and code quality cleanups in the Mediatek driver. - Improve the Broadcom BCM2835 support to cover all the GPIOs that exist in it. - The Allwinner/Sunxi driver properly masks non-wakeup IRQs on suspend. - Add some missing groups and functions to the Ingenic driver. - Convert some of the Freescale device tree bindings to use the new and all improved JSON YAML markup. - Refactorings and support for the SFIO/GPIO in the Tegra194 SoC driver. - Support high impedance mode in the Spreadtrum/Unisoc driver" * tag 'pinctrl-v5.7-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl: (64 commits) pinctrl: qcom: fix compilation error pinctrl: qcom: use scm_call to route GPIO irq to Apps pinctrl: sprd: Add pin high impedance mode support pinctrl: sprd: Use the correct pin output configuration pinctrl: tegra: Add SFIO/GPIO programming on Tegra194 pinctrl: tegra: Renumber the GG.0 and GG.1 pins pinctrl: tegra: Do not add default pin range on Tegra194 pinctrl: tegra: Pass struct tegra_pmx for pin range check pinctrl: tegra: Fix "Scmitt" -> "Schmitt" typo pinctrl: tegra: Fix whitespace issues for improved readability pinctrl: mediatek: Use scnprintf() for avoiding potential buffer overflow pinctrl: freescale: drop the dependency on ARM64 for i.MX8M Revert "pinctrl: mvebu: armada-37xx: use use platform api" dt-bindings: pinctrl: at91: Fix a typo ("descibe") pinctrl: meson: add tsin pinctrl for meson gxbb/gxl/gxm pinctrl: sprd: Fix the kconfig warning pinctrl: ingenic: add hdmi-ddc pin control group pinctrl: sirf/atlas7: Replace zero-length array with flexible-array member pinctrl: sprd: Allow the SPRD pinctrl driver building into a module pinctrl: Export some needed symbols at module load time ...
2020-04-02pinctrl: Unconditionally assign .request()/.free()Thierry Reding
The gpiochip_generic_request() and gpiochip_generic_free() functions can now deal properly with chips that don't have any pin-ranges defined, so they can be assigned unconditionally. Suggested-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Thierry Reding <treding@nvidia.com> Link: https://lore.kernel.org/r/20200401200527.2982450-2-thierry.reding@gmail.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2020-04-01gpio: export of_pinctrl_get to modulesStephen Rothwell
Signed-off-by: Stephen Rothwell <sfr@canb.auug.org.au> Link: https://lore.kernel.org/r/20200401151904.6948af20@canb.auug.org.au Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2020-03-31pinctrl: qcom: fix compilation errorAnsuel Smith
pinctrl: qcom: use scm_call to route GPIO irq to Apps has a typo in the patch and introduced a compilation error. Fixes: 13bec8d4 pinctrl: qcom: use scm_call to route GPIO irq to Apps Signed-off-by: Ansuel Smith <ansuelsmth@gmail.com> Link: https://lore.kernel.org/r/20200331134603.13513-1-ansuelsmth@gmail.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2020-03-30Merge tag 'irq-core-2020-03-30' of ↵Linus Torvalds
git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip Pull irq updates from Thomas Gleixner: "Updates for the interrupt subsystem: Treewide: - Cleanup of setup_irq() which is not longer required because the memory allocator is available early. Most cleanup changes come through the various maintainer trees, so the final removal of setup_irq() is postponed towards the end of the merge window. Core: - Protection against unsafe invocation of interrupt handlers and unsafe interrupt injection including a fixup of the offending PCI/AER error injection mechanism. Invoking interrupt handlers from arbitrary contexts, i.e. outside of an actual interrupt, can cause inconsistent state on the fragile x86 interrupt affinity changing hardware trainwreck. Drivers: - Second wave of support for the new ARM GICv4.1 - Multi-instance support for Xilinx and PLIC interrupt controllers - CPU-Hotplug support for PLIC - The obligatory new driver for X1000 TCU - Enhancements, cleanups and fixes all over the place" * tag 'irq-core-2020-03-30' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip: (58 commits) unicore32: Replace setup_irq() by request_irq() sh: Replace setup_irq() by request_irq() hexagon: Replace setup_irq() by request_irq() c6x: Replace setup_irq() by request_irq() alpha: Replace setup_irq() by request_irq() irqchip/gic-v4.1: Eagerly vmap vPEs irqchip/gic-v4.1: Add VSGI property setup irqchip/gic-v4.1: Add VSGI allocation/teardown irqchip/gic-v4.1: Move doorbell management to the GICv4 abstraction layer irqchip/gic-v4.1: Plumb set_vcpu_affinity SGI callbacks irqchip/gic-v4.1: Plumb get/set_irqchip_state SGI callbacks irqchip/gic-v4.1: Plumb mask/unmask SGI callbacks irqchip/gic-v4.1: Add initial SGI configuration irqchip/gic-v4.1: Plumb skeletal VSGI irqchip irqchip/stm32: Retrigger both in eoi and unmask callbacks irqchip/gic-v3: Move irq_domain_update_bus_token to after checking for NULL domain irqchip/xilinx: Do not call irq_set_default_host() irqchip/xilinx: Enable generic irq multi handler irqchip/xilinx: Fill error code when irq domain registration fails irqchip/xilinx: Add support for multiple instances ...
2020-03-30Merge tag 'driver-core-5.7-rc1' of ↵Linus Torvalds
git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/driver-core Pull driver core updates from Greg KH: "Here is the "big" set of driver core changes for 5.7-rc1. Nothing huge in here, just lots of little firmware core changes and use of new apis, a libfs fix, a debugfs api change, and some driver core deferred probe rework. All of these have been in linux-next for a while with no reported issues" * tag 'driver-core-5.7-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/driver-core: (44 commits) Revert "driver core: Set fw_devlink to "permissive" behavior by default" driver core: Set fw_devlink to "permissive" behavior by default driver core: Replace open-coded list_last_entry() driver core: Read atomic counter once in driver_probe_done() libfs: fix infoleak in simple_attr_read() driver core: Add device links from fwnode only for the primary device platform/x86: touchscreen_dmi: Add info for the Chuwi Vi8 Plus tablet platform/x86: touchscreen_dmi: Add EFI embedded firmware info support Input: icn8505 - Switch to firmware_request_platform for retreiving the fw Input: silead - Switch to firmware_request_platform for retreiving the fw selftests: firmware: Add firmware_request_platform tests test_firmware: add support for firmware_request_platform firmware: Add new platform fallback mechanism and firmware_request_platform() Revert "drivers: base: power: wakeup.c: Use built-in RCU list checking" drivers: base: power: wakeup.c: Use built-in RCU list checking component: allow missing unbind callback debugfs: remove return value of debugfs_create_file_size() debugfs: Check module state before warning in {full/open}_proxy_open() firmware: fix a double abort case with fw_load_sysfs_fallback arch_topology: Fix putting invalid cpu clk ...
2020-03-28pinctrl: qcom: use scm_call to route GPIO irq to AppsAjay Kishore
For IPQ806x targets, TZ protects the registers that are used to configure the routing of interrupts to a target processor. To resolve this, this patch uses scm call to route GPIO interrupts to application processor. Also the scm call interface is changed. Signed-off-by: Ajay Kishore <akisho@codeaurora.org> Signed-off-by: Ansuel Smith <ansuelsmth@gmail.com> Link: https://lore.kernel.org/r/20200327223209.20409-1-ansuelsmth@gmail.com Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2020-03-27pinctrl: sprd: Add pin high impedance mode supportLinhua Xu
For Spreadtrum pin controller, it will be the high impedance mode if disable input and output mode for a pin. Thus add PIN_CONFIG_BIAS_HIGH_IMPEDANCE configuration to support it. Signed-off-by: Linhua Xu <linhua.xu@unisoc.com> Signed-off-by: Baolin Wang <baolin.wang7@gmail.com> Link: https://lore.kernel.org/r/3bdac4c2673b54c940e511f3fa569ee33b87b8d5.1585124562.git.baolin.wang7@gmail.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2020-03-27pinctrl: sprd: Use the correct pin output configurationLinhua Xu
The Spreadtrum pin controller did not supply registers to set high level or low level for output mode, instead we should let the pin controller current configuration drive values on the line. So we should use the PIN_CONFIG_OUTPUT_ENABLE configuration to enable or disable the output mode. [Baolin Wang changes the commit message] Fixes: 41d32cfce1ae ("pinctrl: sprd: Add Spreadtrum pin control driver") Signed-off-by: Linhua Xu <linhua.xu@unisoc.com> Signed-off-by: Baolin Wang <baolin.wang7@gmail.com> Link: https://lore.kernel.org/r/8a6f91b49c17beb218e46b23084f59a7c7260f86.1585124562.git.baolin.wang7@gmail.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2020-03-27pinctrl: tegra: Add SFIO/GPIO programming on Tegra194Thierry Reding
Prior to Tegra186, the selection of SFIO vs. GPIO modes was done as part of the GPIO controller's register programming. Starting with Tegra186, a pin is configured as GPIO or SFIO with a bit in a configuration register of the pin controller. Signed-off-by: Thierry Reding <treding@nvidia.com> Link: https://lore.kernel.org/r/20200319122737.3063291-10-thierry.reding@gmail.com Tested-by: Vidya Sagar <vidyas@nvidia.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2020-03-27pinctrl: tegra: Renumber the GG.0 and GG.1 pinsThierry Reding
There is no need to define these at a specific offset since they are the only pins defined for this SoC generation. Begin numbering them at 0. Signed-off-by: Thierry Reding <treding@nvidia.com> Link: https://lore.kernel.org/r/20200319122737.3063291-9-thierry.reding@gmail.com Tested-by: Vidya Sagar <vidyas@nvidia.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2020-03-27pinctrl: tegra: Do not add default pin range on Tegra194Thierry Reding
On Tegra194, almost all of the pin control programming happens in early boot firmware, so there is no use in having a pin range defined for all the pins. Signed-off-by: Thierry Reding <treding@nvidia.com> Link: https://lore.kernel.org/r/20200319122737.3063291-8-thierry.reding@gmail.com Tested-by: Vidya Sagar <vidyas@nvidia.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2020-03-27pinctrl: tegra: Pass struct tegra_pmx for pin range checkThierry Reding
Pass the struct tegra_pmx when checking for the pin range in device tree. This makes the call site a bit easier to read and will help keep that readability in a subsequent patch. Signed-off-by: Thierry Reding <treding@nvidia.com> Link: https://lore.kernel.org/r/20200319122737.3063291-7-thierry.reding@gmail.com Tested-by: Vidya Sagar <vidyas@nvidia.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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