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path: root/drivers/pinctrl
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2022-02-28pinctrl: sunxi: Use unique lockdep classes for IRQsSamuel Holland
This driver, like several others, uses a chained IRQ for each GPIO bank, and forwards .irq_set_wake to the GPIO bank's upstream IRQ. As a result, a call to irq_set_irq_wake() needs to lock both the upstream and downstream irq_desc's. Lockdep considers this to be a possible deadlock when the irq_desc's share lockdep classes, which they do by default: ============================================ WARNING: possible recursive locking detected 5.17.0-rc3-00394-gc849047c2473 #1 Not tainted -------------------------------------------- init/307 is trying to acquire lock: c2dfe27c (&irq_desc_lock_class){-.-.}-{2:2}, at: __irq_get_desc_lock+0x58/0xa0 but task is already holding lock: c3c0ac7c (&irq_desc_lock_class){-.-.}-{2:2}, at: __irq_get_desc_lock+0x58/0xa0 other info that might help us debug this: Possible unsafe locking scenario: CPU0 ---- lock(&irq_desc_lock_class); lock(&irq_desc_lock_class); *** DEADLOCK *** May be due to missing lock nesting notation 4 locks held by init/307: #0: c1f29f18 (system_transition_mutex){+.+.}-{3:3}, at: __do_sys_reboot+0x90/0x23c #1: c20f7760 (&dev->mutex){....}-{3:3}, at: device_shutdown+0xf4/0x224 #2: c2e804d8 (&dev->mutex){....}-{3:3}, at: device_shutdown+0x104/0x224 #3: c3c0ac7c (&irq_desc_lock_class){-.-.}-{2:2}, at: __irq_get_desc_lock+0x58/0xa0 stack backtrace: CPU: 0 PID: 307 Comm: init Not tainted 5.17.0-rc3-00394-gc849047c2473 #1 Hardware name: Allwinner sun8i Family unwind_backtrace from show_stack+0x10/0x14 show_stack from dump_stack_lvl+0x68/0x90 dump_stack_lvl from __lock_acquire+0x1680/0x31a0 __lock_acquire from lock_acquire+0x148/0x3dc lock_acquire from _raw_spin_lock_irqsave+0x50/0x6c _raw_spin_lock_irqsave from __irq_get_desc_lock+0x58/0xa0 __irq_get_desc_lock from irq_set_irq_wake+0x2c/0x19c irq_set_irq_wake from irq_set_irq_wake+0x13c/0x19c [tail call from sunxi_pinctrl_irq_set_wake] irq_set_irq_wake from gpio_keys_suspend+0x80/0x1a4 gpio_keys_suspend from gpio_keys_shutdown+0x10/0x2c gpio_keys_shutdown from device_shutdown+0x180/0x224 device_shutdown from __do_sys_reboot+0x134/0x23c __do_sys_reboot from ret_fast_syscall+0x0/0x1c However, this can never deadlock because the upstream and downstream IRQs are never the same (nor do they even involve the same irqchip). Silence this erroneous lockdep splat by applying what appears to be the usual fix of moving the GPIO IRQs to separate lockdep classes. Fixes: a59c99d9eaf9 ("pinctrl: sunxi: Forward calls to irq_set_irq_wake") Reported-by: Guenter Roeck <linux@roeck-us.net> Signed-off-by: Samuel Holland <samuel@sholland.org> Reviewed-by: Jernej Skrabec <jernej.skrabec@gmail.com> Tested-by: Guenter Roeck <linux@roeck-us.net> Link: https://lore.kernel.org/r/20220216040037.22730-1-samuel@sholland.org Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2022-02-28pinctrl-sunxi: sunxi_pinctrl_gpio_direction_in/output: use correct offsetHans Verkuil
The commit that sets the direction directly without calling pinctrl_gpio_direction(), forgot to add chip->base to the offset when calling sunxi_pmx_gpio_set_direction(). This caused failures for various Allwinner boards which have two GPIO blocks. Signed-off-by: Hans Verkuil <hverkuil-cisco@xs4all.nl> Reported-by: 5kft <5kft@5kft.org> Suggested-by: 5kft <5kft@5kft.org> Reported-by: Corentin Labbe <clabbe.montjoie@gmail.com> Fixes: 8df89a7cbc63 (pinctrl-sunxi: don't call pinctrl_gpio_direction()) Tested-by: Corentin Labbe <clabbe.montjoie@gmail.com> Tested-by: Jernej Skrabec <jernej.skrabec@gmail.com> Acked-by: Jernej Skrabec <jernej.skrabec@gmail.com> Link: https://lore.kernel.org/r/0f536cd8-01db-5d16-2cec-ec6d19409a49@xs4all.nl Signed-off-by: Guenter Roeck <linux@roeck-us.net> [Picked from linux-next to pinctrl fixes] Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2022-02-19Merge tag 'intel-pinctrl-v5.17-5' of ↵Linus Walleij
gitolite.kernel.org:pub/scm/linux/kernel/git/pinctrl/intel into fixes intel-pinctrl for v5.17-5 * Revert misplaced ID The following is an automated git shortlog grouped by driver: tigerlake: - Revert "Add Alder Lake-M ACPI ID"
2022-02-19pinctrl: starfive: Use a static name for the GPIO irq_chipMarc Zyngier
Drop the device name used for the GPIO irq_chip and replace it with something static. The information is still available from debugfs and carried as part of the irqdomain. Suggested-by: Emil Renner Berthing <kernel@esmil.dk> Signed-off-by: Marc Zyngier <maz@kernel.org> Cc: Linus Walleij <linus.walleij@linaro.org> Cc: Bartosz Golaszewski <brgl@bgdev.pl> Link: https://lore.kernel.org/r/20220211092345.1093332-1-maz@kernel.org Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2022-02-15pinctrl: tigerlake: Revert "Add Alder Lake-M ACPI ID"Andy Shevchenko
It appears that last minute change moved ACPI ID of Alder Lake-M to the INTC1055, which is already in the driver. This ID on the other hand will be used elsewhere. This reverts commit 258435a1c8187f559549e515d2f77fa0b57bcd27. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
2022-02-11pinctrl: k210: Fix bias-pull-upSean Anderson
Using bias-pull-up would actually cause the pin to have its pull-down enabled. Fix this. Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Damien Le Moal <damien.lemoal@opensource.wdc.com> Fixes: d4c34d09ab03 ("pinctrl: Add RISC-V Canaan Kendryte K210 FPIOA driver") Link: https://lore.kernel.org/r/20220209182822.640905-1-seanga2@gmail.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2022-02-11pinctrl: fix loop in k210_pinconf_get_drive()Dan Carpenter
The loop exited too early so the k210_pinconf_drive_strength[0] array element was never used. Fixes: d4c34d09ab03 ("pinctrl: Add RISC-V Canaan Kendryte K210 FPIOA driver") Signed-off-by: Dan Carpenter <dan.carpenter@oracle.com> Reviewed-by: Damien Le Moal <damien.lemoal@opensource.wdc.com> Reviewed-by: Sean Anderson <seanga2@gmail.com> Link: https://lore.kernel.org/r/20220209180804.GA18385@kili Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2022-01-31pinctrl: microchip-sgpio: Fix support for regmapHoratiu Vultur
Initially the driver accessed the registers using u32 __iomem but then in the blamed commit it changed it to use regmap. The problem is that now the offset of the registers is not calculated anymore at word offset but at byte offset. Therefore make sure to multiply the offset with word size. Acked-by: Steen Hegelund <Steen.Hegelund@microchip.com> Reviewed-by: Colin Foster <colin.foster@in-advantage.com> Fixes: 2afbbab45c261a ("pinctrl: microchip-sgpio: update to support regmap") Signed-off-by: Horatiu Vultur <horatiu.vultur@microchip.com> Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com> Link: https://lore.kernel.org/r/20220131085201.307031-1-horatiu.vultur@microchip.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2022-01-30pinctrl: bcm63xx: fix unmet dependency on REGMAP for GPIO_REGMAPJulian Braha
When PINCTRL_BCM63XX is selected, and REGMAP is not selected, Kbuild gives the following warning: WARNING: unmet direct dependencies detected for GPIO_REGMAP Depends on [n]: GPIOLIB [=y] && REGMAP [=n] Selected by [y]: - PINCTRL_BCM63XX [=y] && PINCTRL [=y] This is because PINCTRL_BCM63XX selects GPIO_REGMAP without selecting or depending on REGMAP, despite GPIO_REGMAP depending on REGMAP. This unmet dependency bug was detected by Kismet, a static analysis tool for Kconfig. Please advise if this is not the appropriate solution. Signed-off-by: Julian Braha <julianbraha@gmail.com> Link: https://lore.kernel.org/r/20220117062557.89568-1-julianbraha@gmail.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2022-01-30pinctrl: bcm2835: Fix a few error pathsFlorian Fainelli
After commit 266423e60ea1 ("pinctrl: bcm2835: Change init order for gpio hogs") a few error paths would not unwind properly the registration of gpio ranges. Correct that by assigning a single error label and goto it whenever we encounter a fatal error. Fixes: 266423e60ea1 ("pinctrl: bcm2835: Change init order for gpio hogs") Signed-off-by: Florian Fainelli <f.fainelli@gmail.com> Link: https://lore.kernel.org/r/20220127215033.267227-1-f.fainelli@gmail.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2022-01-30Merge tag 'intel-pinctrl-v5.17-4' of ↵Linus Walleij
gitolite.kernel.org:pub/scm/linux/kernel/git/pinctrl/intel into fixes intel-pinctrl for v5.17-4 * Couple of fixes on how Intel driver handles an interrupt * Revert pin renaming change in ZynqMQ as it appears to be part of the Device Tree bindings * Fix ordering of the files in the Makefile The following is an automated git shortlog grouped by driver: intel: - Fix a glitch when updating IRQ flags on a preconfigured line - fix unexpected interrupt Place correctly CONFIG_PINCTRL_ST in the Makefile: - Place correctly CONFIG_PINCTRL_ST in the Makefile zynqmp: - Revert "Unify pin naming"
2022-01-28pinctrl: zynqmp: Revert "Unify pin naming"Gerhard Engleder
This reverts commit 54784ff24971ed5bd3f1056edce998148709d0a7. This patch changes the pin names from "MIO%d" to "MIO-%d", but all dts in arch/arm64/boot/dts/xilinx still use the old name. As a result my ZCU104 has no output on serial terminal and is not reachable over network. Signed-off-by: Gerhard Engleder <gerhard@engleder-embedded.com> Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
2022-01-24pinctrl: intel: Fix a glitch when updating IRQ flags on a preconfigured lineAndy Shevchenko
The commit af7e3eeb84e2 ("pinctrl: intel: Disable input and output buffer when switching to GPIO") hadn't taken into account an update of the IRQ flags scenario. When updating the IRQ flags on the preconfigured line the ->irq_set_type() is called again. In such case the sequential Rx buffer configuration changes may trigger a falling or rising edge interrupt that may lead, on some platforms, to an undesired event. This may happen because each of intel_gpio_set_gpio_mode() and __intel_gpio_set_direction() updates the pad configuration with a different value of the GPIORXDIS bit. Notable, that the intel_gpio_set_gpio_mode() is called only for the pads that are configured as an input. Due to this fact, integrate the logic of __intel_gpio_set_direction() call into the intel_gpio_set_gpio_mode() so that the Rx buffer won't be disabled and immediately re-enabled. Fixes: af7e3eeb84e2 ("pinctrl: intel: Disable input and output buffer when switching to GPIO") Reported-by: Kane Chen <kane.chen@intel.com> Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com> Tested-by: Grace Kao <grace.kao@intel.com>
2022-01-24pinctrl: intel: fix unexpected interruptŁukasz Bartosik
ASUS Chromebook C223 with Celeron N3350 crashes sometimes during cold booot. Inspection of the kernel log showed that it gets into an inifite loop logging the following message: ->handle_irq(): 000000009cdb51e8, handle_bad_irq+0x0/0x251 ->irq_data.chip(): 000000005ec212a7, 0xffffa043009d8e7 ->action(): 00000 IRQ_NOPROBE set unexpected IRQ trap at vector 7c The issue happens during cold boot but only if cold boot happens at most several dozen seconds after Chromebook is powered off. For longer intervals between power off and power on (cold boot) the issue does not reproduce. The unexpected interrupt is sourced from INT3452 GPIO pin which is used for SD card detect. Investigation relevealed that when the interval between power off and power on (cold boot) is less than several dozen seconds then values of INT3452 GPIO interrupt enable and interrupt pending registers survive power off and power on sequence and interrupt for SD card detect pin is enabled and pending during probe of SD controller which causes the unexpected IRQ message. "Intel Pentium and Celeron Processor N- and J- Series" volume 3 doc mentions that GPIO interrupt enable and status registers default value is 0x0. The fix clears INT3452 GPIO interrupt enabled and interrupt pending registers in its probe function. Fixes: 7981c0015af2 ("pinctrl: intel: Add Intel Sunrisepoint pin controller and GPIO support") Signed-off-by: Łukasz Bartosik <lb@semihalf.com> Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
2022-01-24pinctrl: Place correctly CONFIG_PINCTRL_ST in the MakefileAndy Shevchenko
Keep Makefile entries ordered in the same way as Kconfig ones. Reported-by: Linus Torvalds <torvalds@linux-foundation.org> Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
2022-01-24pinctrl: sunxi: Fix H616 I2S3 pin dataAndre Przywara
Two bugs have sneaked in the H616 pinctrl data: - PH9 uses the mux value of 0x3 twice (one should be 0x5 instead) - PH8 and PH9 use the "i2s3" function name twice in each pin For the double pin name we use the same trick we pulled for i2s0: append the pin function to the group name to designate the special function. Fixes: 25adc29407fb ("pinctrl: sunxi: Add support for the Allwinner H616 pin controller") Reported-by: SASANO Takayoshi <uaa@mx5.nisiq.net> Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jernej Skrabec <jernej.skrabec@gmail.com> Reviewed-by: Samuel Holland <samuel@sholland.org> Link: https://lore.kernel.org/r/20220105172952.23347-1-andre.przywara@arm.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2022-01-24pinctrl: cherryview: Trigger hwirq0 for interrupt-lines without a mappingHans de Goede
Commit bdfbef2d29dc ("pinctrl: cherryview: Don't use selection 0 to mark an interrupt line as unused") made the code properly differentiate between unset vs (hwirq) 0 entries in the GPIO-controller interrupt-line to GPIO pinnumber/hwirq mapping. This is causing some boards to not boot. This commit restores the old behavior of triggering hwirq 0 when receiving an interrupt on an interrupt-line for which there is no mapping. Fixes: bdfbef2d29dc ("pinctrl: cherryview: Don't use selection 0 to mark an interrupt line as unused") Reported-and-tested-by: Jarkko Nikula <jarkko.nikula@linux.intel.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com> Link: https://lore.kernel.org/r/20220104164238.253142-1-hdegoede@redhat.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2022-01-24pinctrl: thunderbay: rework loops looking for groups namesRafał Miłecki
Make the outer loop iterate over functions as that's the real subject. This simplifies code (and reduces amount of lines of code) as allocating memory for names doesn't require extra checks anymore. While at it use local "group_names" variable. It fixes: drivers/pinctrl/pinctrl-thunderbay.c: In function 'thunderbay_add_functions': drivers/pinctrl/pinctrl-thunderbay.c:815:8: warning: assignment discards 'const' qualifier from pointer target type [-Wdiscarded-qualifiers] 815 | grp = func->group_names; | ^ Ref: c26c4bfc1040 ("pinctrl: keembay: rework loops looking for groups names") Reported-by: Nathan Chancellor <nathan@kernel.org> Signed-off-by: Rafał Miłecki <rafal@milecki.pl> Link: https://lore.kernel.org/r/20220111172919.6567-2-zajec5@gmail.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2022-01-24pinctrl: thunderbay: comment process of building functions a bitRafał Miłecki
This should make code a bit easier to follow. While at it use some "for" loops to simplify array iteration loops. Ref: 5d0674999cc5 ("pinctrl: keembay: comment process of building functions a bit") Signed-off-by: Rafał Miłecki <rafal@milecki.pl> Link: https://lore.kernel.org/r/20220111172919.6567-1-zajec5@gmail.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2022-01-12Merge tag 'pinctrl-v5.17-1' of ↵Linus Torvalds
git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl Pull pin control bulk updates from Linus Walleij: "Core changes: - New standard enumerator and corresponding device tree bindings for output impedance pin configuration. (Implemented and used in the Renesas rzg2l driver.) - Cleanup of Kconfig and Makefile to be somewhat orderly and alphabetic. New drivers: - Samsung Exynos 7885 pin controller. - Ocelot LAN966x pin controller. - Qualcomm SDX65 pin controller. - Qualcomm SM8450 pin controller. - Qualcomm PM8019, PM8226 and PM2250 pin controllers. - NXP/Freescale i.MXRT1050 pin controller. - Intel Thunder Bay pin controller. Enhancements: - Introduction of the string library helper function "kasprintf_strarray()" and subsequent use in Rockchip, ST and Armada pin control drivers, as well as the GPIO mockup driver. - The Ocelot pin controller has been extensively rewritten to use regmap and other modern kernel infrastructure. - The Microchip SGPIO driver has been converted to use regmap. - The SPEAr driver had been converted to use regmap. - Substantial cleanups and janitorial on the Apple pin control driver that was merged for v5.16. - Janitorial to remove of_node assignments in the GPIO portions that anyway get this handled in the GPIO core. - Minor cleanups and improvements in several pin controllers" * tag 'pinctrl-v5.17-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl: (98 commits) pinctrl: imx: fix assigning groups names dt-bindings: pinctrl: mt8195: add wrapping node of pin configurations pinctrl: bcm: ns: use generic groups & functions helpers pinctrl: imx: fix allocation result check pinctrl: samsung: Use platform_get_irq_optional() to get the interrupt pinctrl: Propagate firmware node from a parent device dt-bindings: pinctrl: qcom: Add SDX65 pinctrl bindings pinctrl: add one more "const" for generic function groups pinctrl: keembay: rework loops looking for groups names pinctrl: keembay: comment process of building functions a bit pinctrl: imx: prepare for making "group_names" in "function_desc" const ARM: dts: gpio-ranges property is now required pinctrl: aspeed: fix unmet dependencies on MFD_SYSCON for PINCTRL_ASPEED pinctrl: Get rid of duplicate of_node assignment in the drivers pinctrl-sunxi: don't call pinctrl_gpio_direction() pinctrl-bcm2835: don't call pinctrl_gpio_direction() pinctrl: bcm2835: Silence uninit warning pinctrl: Sort Kconfig and Makefile entries alphabetically pinctrl: Add Intel Thunder Bay pinctrl driver dt-bindings: pinctrl: Add bindings for Intel Thunderbay pinctrl driver ...
2022-01-10Merge tag 'newsoc-5.17' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/socLinus Torvalds
Pull RISC-V SoC updates from Arnd Bergmann: "Add support for StarFive JH7100 RISC-V SoC This adds support for the StarFive JH7100, including the necessary device drivers and DT files for the BeagleV Starlight prototype board, with additional boards to be added later. This SoC promises to be the first usable low-cost platform for RISC-V. I've taken this through the SoC tree in the anticipation of adding a few other Arm based SoCs as well, but those did not pass the review in time, so it's only this one" * tag 'newsoc-5.17' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: reset: starfive-jh7100: Fix 32bit compilation RISC-V: Add BeagleV Starlight Beta device tree RISC-V: Add initial StarFive JH7100 device tree serial: 8250_dw: Add StarFive JH7100 quirk dt-bindings: serial: snps-dw-apb-uart: Add JH7100 uarts pinctrl: starfive: Add pinctrl driver for StarFive SoCs dt-bindings: pinctrl: Add StarFive JH7100 bindings dt-bindings: pinctrl: Add StarFive pinctrl definitions reset: starfive-jh7100: Add StarFive JH7100 reset driver dt-bindings: reset: Add Starfive JH7100 reset bindings dt-bindings: reset: Add StarFive JH7100 reset definitions clk: starfive: Add JH7100 clock generator driver dt-bindings: clock: starfive: Add JH7100 bindings dt-bindings: clock: starfive: Add JH7100 clock definitions dt-bindings: interrupt-controller: Add StarFive JH7100 plic dt-bindings: timer: Add StarFive JH7100 clint RISC-V: Add StarFive SoC Kconfig option
2022-01-02pinctrl: imx: fix assigning groups namesRafał Miłecki
This fixes regression caused by incorrect array indexing. Reported-by: Fabio Estevam <festevam@gmail.com> Fixes: 02f117134952 ("pinctrl: imx: prepare for making "group_names" in "function_desc" const") Signed-off-by: Rafał Miłecki <rafal@milecki.pl> Tested-by: Fabio Estevam <festevam@gmail.com> Link: https://lore.kernel.org/r/20211227122237.6363-1-zajec5@gmail.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2021-12-26Merge tag 'samsung-pinctrl-5.17' of ↵Linus Walleij
https://git.kernel.org/pub/scm/linux/kernel/git/pinctrl/samsung into devel Samsung pinctrl drivers changes for v5.17 1. Add support for Exynos7885. 2. Drop usage of platform_get_resource().
2021-12-26pinctrl: bcm: ns: use generic groups & functions helpersRafał Miłecki
This simplifies ns driver and gets rid of ~70 lines of code. "const" had to be dropped from "struct ns_pinctrl_group" @pins to match "struct group_desc" @pins and pinctrl_generic_add_group(). Otherwise it would cause: drivers/pinctrl/bcm/pinctrl-ns.c: In function 'ns_pinctrl_probe': drivers/pinctrl/bcm/pinctrl-ns.c:277:13: warning: passing argument 3 of 'pinctrl_generic_add_group' discards 'const' qualifier from pointer target type [-Wdiscarded-qualifiers] 277 | group->pins, group->num_pins, NULL); | ~~~~~^~~~~~ Signed-off-by: Rafał Miłecki <rafal@milecki.pl> Link: https://lore.kernel.org/r/20211222064344.14624-1-zajec5@gmail.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2021-12-26pinctrl: imx: fix allocation result checkRafał Miłecki
Fix code to check correct variable value. Reported-by: Abel Vesa <abel.vesa@nxp.com> Fixes: 02f117134952 ("pinctrl: imx: prepare for making "group_names" in "function_desc" const") Signed-off-by: Rafał Miłecki <rafal@milecki.pl> Reviewed-by: Abel Vesa <abel.vesa@nxp.com> Link: https://lore.kernel.org/r/20211222212807.27122-1-zajec5@gmail.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2021-12-25pinctrl: samsung: Use platform_get_irq_optional() to get the interruptLad Prabhakar
platform_get_resource(pdev, IORESOURCE_IRQ, ..) relies on static allocation of IRQ resources in DT core code, this causes an issue when using hierarchical interrupt domains using "interrupts" property in the node as this bypasses the hierarchical setup and messes up the irq chaining. In preparation for removal of static setup of IRQ resource from DT core code use platform_get_irq_optional(). Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> Link: https://lore.kernel.org/r/20211224145748.18754-2-prabhakar.mahadev-lad.rj@bp.renesas.com Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
2021-12-22pinctrl: Propagate firmware node from a parent deviceAndy Shevchenko
When creating MFD platform devices the firmware node is left unset. This, in particular, prevents GPIO library to use it for different purposes. Propagate firmware node from the parent device and let GPIO library do the right thing. While at it, slightly modify the headers to reflect the usage of APIs. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Acked-by: Charles Keepax <ckeepax@opensource.cirrus.com> Reviewed-by: Adam Thomson <Adam.Thomson.Opensource@diasemi.com> Link: https://lore.kernel.org/r/20211216151227.58687-1-andriy.shevchenko@linux.intel.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2021-12-22pinctrl: add one more "const" for generic function groupsRafał Miłecki
Generic code doesn't modify those strings and .get_function_groups callback has that extra "const" as well. This allows more flexibility in GENERIC_PINMUX_FUNCTIONS users. Signed-off-by: Rafał Miłecki <rafal@milecki.pl> Link: https://lore.kernel.org/r/20211216162206.8027-4-zajec5@gmail.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2021-12-22pinctrl: keembay: rework loops looking for groups namesRafał Miłecki
Make the outer loop iterate over functions as that's the real subject. This simplifies code (and reduces amount of lines of code) as allocating memory for names doesn't require extra checks anymore. While at it use local "group_names" variable. The plan for "struct function_desc" is to make its "group_names" /double/ const. That will allow drivers to use it with static const data. This keembay "group_names" change is required to avoid: drivers/pinctrl/pinctrl-keembay.c: In function 'keembay_add_functions': drivers/pinctrl/pinctrl-keembay.c:1594:8: warning: assignment discards 'const' qualifier from pointer target type [-Wdiscarded-qualifiers] 1594 | grp = func->group_names; | ^ Signed-off-by: Rafał Miłecki <rafal@milecki.pl> Link: https://lore.kernel.org/r/20211216162206.8027-3-zajec5@gmail.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2021-12-22pinctrl: keembay: comment process of building functions a bitRafał Miłecki
This should make code a bit easier to follow. While at it use some "for" loops to simplify array iteration loops. Signed-off-by: Rafał Miłecki <rafal@milecki.pl> Link: https://lore.kernel.org/r/20211216162206.8027-2-zajec5@gmail.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2021-12-22pinctrl: imx: prepare for making "group_names" in "function_desc" constRafał Miłecki
The plan for "struct function_desc" is to make its "group_names" /double/ const. That will allow drivers to use it with static const data. This imx change is required to avoid: drivers/pinctrl/freescale/pinctrl-imx.c: In function 'imx_pinctrl_parse_functions': drivers/pinctrl/freescale/pinctrl-imx.c:672:24: error: assignment of read-only location '*(func->group_names + (sizetype)(i * 4))' 672 | func->group_names[i] = child->name; | ^ Signed-off-by: Rafał Miłecki <rafal@milecki.pl> Link: https://lore.kernel.org/r/20211216162206.8027-1-zajec5@gmail.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2021-12-20Merge tag 'renesas-pinctrl-for-v5.17-tag2' of ↵Linus Walleij
git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-drivers into devel pinctrl: renesas: Updates for v5.17 (take two) - Align comments in the R-Car V3U pin control driver.
2021-12-16Merge tag 'jh7100-for-5.17' of https://github.com/esmil/linux into arm/newsocArnd Bergmann
Basic StarFive JH7100 RISC-V SoC support This adds support for the StarFive JH7100 RISC-V SoC. The SoC has many devices that need non-coherent DMA operations to work which isn't upstream yet[1], so this just adds basic support to boot up, get a serial console, blink an LED and reboot itself. Unlike the Allwinner D1 this chip doesn't use any extra pagetable bits, but instead the DDR RAM appears twice in the memory map, with and without the cache. The JH7100 is a test chip for the upcoming JH7110 and about 300 BeagleV Starlight Beta boards were sent out with them as part of a now cancelled BeagleBoard.org project. However StarFive has produced more of the JH7100s and will be selling VisionFive boards with them soon[2]. [1]: https://lore.kernel.org/linux-riscv/20210723214031.3251801-2-atish.patra@wdc.com/ [2]: https://www.cnx-software.com/2021/12/09/starfive-visionfive-single-board-computer-for-sale-accelerating-risc-v-ecosystem-development/ * tag 'jh7100-for-5.17' of https://github.com/esmil/linux: RISC-V: Add BeagleV Starlight Beta device tree RISC-V: Add initial StarFive JH7100 device tree serial: 8250_dw: Add StarFive JH7100 quirk dt-bindings: serial: snps-dw-apb-uart: Add JH7100 uarts pinctrl: starfive: Add pinctrl driver for StarFive SoCs dt-bindings: pinctrl: Add StarFive JH7100 bindings dt-bindings: pinctrl: Add StarFive pinctrl definitions reset: starfive-jh7100: Add StarFive JH7100 reset driver dt-bindings: reset: Add Starfive JH7100 reset bindings dt-bindings: reset: Add StarFive JH7100 reset definitions clk: starfive: Add JH7100 clock generator driver dt-bindings: clock: starfive: Add JH7100 bindings dt-bindings: clock: starfive: Add JH7100 clock definitions dt-bindings: interrupt-controller: Add StarFive JH7100 plic dt-bindings: timer: Add StarFive JH7100 clint RISC-V: Add StarFive SoC Kconfig option Link: https://lore.kernel.org/r/20211216164205.286138-1-kernel@esmil.dk Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2021-12-16pinctrl: starfive: Add pinctrl driver for StarFive SoCsEmil Renner Berthing
Add a combined pinctrl and GPIO driver for the JH7100 RISC-V SoC by StarFive Ltd. This is a test chip for their upcoming JH7110 SoC, which is said to feature only minor changes to these pinctrl/GPIO parts. For each "GPIO" there are two registers for configuring the output and output enable signals which may come from other peripherals. Among these are two special signals that are constant 0 and constant 1 respectively. Controlling the GPIOs from software is done by choosing one of these signals. In other words the same registers are used for both pin muxing and controlling the GPIOs, which makes it easier to combine the pinctrl and GPIO driver in one. I wrote the pinconf and pinmux parts, but the GPIO part of the code is based on the GPIO driver in the vendor tree written by Huan Feng with cleanups and fixes by Drew and me. Datasheet: https://github.com/starfive-tech/JH7100_Docs/blob/main/JH7100%20Data%20Sheet%20V01.01.04-EN%20(4-21-2021).pdf Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com> Reviewed-by: Linus Walleij <linus.walleij@linaro.org> Co-developed-by: Huan Feng <huan.feng@starfivetech.com> Signed-off-by: Huan Feng <huan.feng@starfivetech.com> Co-developed-by: Drew Fustini <drew@beagleboard.org> Signed-off-by: Drew Fustini <drew@beagleboard.org> Signed-off-by: Emil Renner Berthing <kernel@esmil.dk>
2021-12-16pinctrl: aspeed: fix unmet dependencies on MFD_SYSCON for PINCTRL_ASPEEDJulian Braha
When PINCTRL_ASPEED_G* is selected, and MFD_SYSCON is not selected, Kbuild gives the following warnings: WARNING: unmet direct dependencies detected for PINCTRL_ASPEED Depends on [n]: PINCTRL [=y] && (ARCH_ASPEED [=n] || COMPILE_TEST [=y]) && OF [=y] && MFD_SYSCON [=n] Selected by [y]: - PINCTRL_ASPEED_G4 [=y] && PINCTRL [=y] && (MACH_ASPEED_G4 [=n] || COMPILE_TEST [=y]) && OF [=y] WARNING: unmet direct dependencies detected for PINCTRL_ASPEED Depends on [n]: PINCTRL [=y] && (ARCH_ASPEED [=n] || COMPILE_TEST [=y]) && OF [=y] && MFD_S> Selected by [y]: - PINCTRL_ASPEED_G5 [=y] && PINCTRL [=y] && (MACH_ASPEED_G5 [=n] || COMPILE_TEST [=y]) && O> WARNING: unmet direct dependencies detected for PINCTRL_ASPEED Depends on [n]: PINCTRL [=y] && (ARCH_ASPEED [=n] || COMPILE_TEST [=y]) && OF [=y] && MFD_S> Selected by [y]: - PINCTRL_ASPEED_G6 [=y] && PINCTRL [=y] && (MACH_ASPEED_G6 [=n] || COMPILE_TEST [=y]) && O> This is because MACH_ASPEED_G* depend on (ARCH_ASPEED || COMPILE_TEST). ARCH_ASPEED enables the MFD_SYSCON dependency, but COMPILE_TEST doesn't. These unmet dependency bugs were detected by Kismet, a static analysis tool for Kconfig. Please advise if this is not the appropriate solution. Signed-off-by: Julian Braha <julianbraha@gmail.com> Reviewed-by: Andrew Jeffery <andrew@aj.id.au> Link: https://lore.kernel.org/r/20211215214022.146391-1-julianbraha@gmail.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2021-12-16Merge tag 'intel-pinctrl-v5.17-3' of ↵Linus Walleij
gitolite.kernel.org:pub/scm/linux/kernel/git/pinctrl/intel into devel intel-pinctrl for v5.17-3 * Intel Baytrail and Cherryview IRQ related fixes The following is an automated git shortlog grouped by driver: baytrail: - Set IRQCHIP_SET_TYPE_MASKED flag on the irqchip cherryview: - Use temporary variable for struct device - Do not allow the same interrupt line to be used by 2 pins - Don't use selection 0 to mark an interrupt line as unused
2021-12-16pinctrl: Get rid of duplicate of_node assignment in the driversAndy Shevchenko
GPIO library does copy the of_node from the parent device of the GPIO chip, there is no need to repeat this in the individual drivers. Remove these assignment all at once. For the details one may look into the of_gpio_dev_init() implementation. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Link: https://lore.kernel.org/r/20211214125855.33207-1-andriy.shevchenko@linux.intel.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2021-12-16pinctrl: stm32: consider the GPIO offset to expose all the GPIO linesFabien Dessenne
Consider the GPIO controller offset (from "gpio-ranges") to compute the maximum GPIO line number. This fixes an issue where gpio-ranges uses a non-null offset. e.g.: gpio-ranges = <&pinctrl 6 86 10> In that case the last valid GPIO line is not 9 but 15 (6 + 10 - 1) Cc: stable@vger.kernel.org Fixes: 67e2996f72c7 ("pinctrl: stm32: fix the reported number of GPIO lines per bank") Reported-by: Christoph Fritz <chf.fritz@googlemail.com> Signed-off-by: Fabien Dessenne <fabien.dessenne@foss.st.com> Link: https://lore.kernel.org/r/20211215095808.621716-1-fabien.dessenne@foss.st.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2021-12-16pinctrl-sunxi: don't call pinctrl_gpio_direction()Hans Verkuil
Set the direction directly without calling pinctrl_gpio_direction(). This avoids the mutex_lock() calls in that function, which would invalid the can_sleep = false. Signed-off-by: Hans Verkuil <hverkuil-cisco@xs4all.nl> Link: https://lore.kernel.org/r/20211206131648.1521868-4-hverkuil-cisco@xs4all.nl Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2021-12-16pinctrl-bcm2835: don't call pinctrl_gpio_direction()Hans Verkuil
Set the direction directly without calling pinctrl_gpio_direction(). This avoids the mutex_lock() calls in that function, which would invalid the can_sleep = false. Signed-off-by: Hans Verkuil <hverkuil-cisco@xs4all.nl> Reviewed-by: Florian Fainelli <f.fainelli@gmail.com> Link: https://lore.kernel.org/r/20211206131648.1521868-3-hverkuil-cisco@xs4all.nl Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2021-12-10pinctrl: bcm2835: Change init order for gpio hogsPhil Elwell
...and gpio-ranges pinctrl-bcm2835 is a combined pinctrl/gpio driver. Currently the gpio side is registered first, but this breaks gpio hogs (which are configured during gpiochip_add_data). Part of the hog initialisation is a call to pinctrl_gpio_request, and since the pinctrl driver hasn't yet been registered this results in an -EPROBE_DEFER from which it can never recover. Change the initialisation sequence to register the pinctrl driver first. This also solves a similar problem with the gpio-ranges property, which is required in order for released pins to be returned to inputs. Fixes: 73345a18d464b ("pinctrl: bcm2835: Pass irqchip when adding gpiochip") Signed-off-by: Phil Elwell <phil@raspberrypi.com> Reviewed-by: Florian Fainelli <f.fainelli@gmail.com> Link: https://lore.kernel.org/r/20211206092237.4105895-2-phil@raspberrypi.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2021-12-10pinctrl: bcm2835: Silence uninit warningLinus Walleij
The uninitialized variable would be caught by the BUG_ON() logic below, but the kernel test robot cannot see that. Silence the warning by initializing the variable. Reported-by: kernel test robot <lkp@intel.com> Link: https://lore.kernel.org/r/20211209134513.306212-1-linus.walleij@linaro.org Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2021-12-09pinctrl: Sort Kconfig and Makefile entries alphabeticallyAndy Shevchenko
Sort Kconfig and Makefile entries alphabetically for better maintenance in the future. While at it fix some style issues, such as: - "Say Y"/"Say yes"/"Say Yes" --> "Say Y" - "pullup/pulldown" --> "pull-up and pull-down" - wrong indentation Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Link: https://lore.kernel.org/r/20211209113456.33977-1-andriy.shevchenko@linux.intel.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2021-12-09pinctrl: Add Intel Thunder Bay pinctrl driverLakshmi Sowjanya D
About Intel Thunder Bay: ----------------------- Intel Thunder Bay is a computer vision AI accelerator SoC based on ARM CPU. Pinctrl IP: ---------- The SoC has a customised pinmux controller IP which controls pin multiplexing and configuration. Thunder Bay pinctrl IP is not based on and have nothing in common with the existing pinctrl drivers. The registers used are incompatible with the existing drivers, so it requires a new driver. Add pinctrl driver to enable pin control support in the Intel Thunder Bay SoC. Co-developed-by: Kiran Kumar S <kiran.kumar1.s@intel.com> Signed-off-by: Kiran Kumar S <kiran.kumar1.s@intel.com> Signed-off-by: Lakshmi Sowjanya D <lakshmi.sowjanya.d@intel.com> Link: https://lore.kernel.org/r/20211201072626.19599-3-lakshmi.sowjanya.d@intel.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2021-12-09pinctrl: qcom: Add SM8450 pinctrl driverVinod Koul
This adds pincontrol driver for tlmm block found in SM8450 SoC This patch is based on initial code downstream by Elliot Berman <eberman@codeaurora.org> Signed-off-by: Vinod Koul <vkoul@kernel.org> Tested-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20211201072434.3968768-3-vkoul@kernel.org Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2021-12-07pinctrl: renesas: r8a779a0: Align commentsGeert Uytterhoeven
Align the CANFD4_TX and AVB2_MDC comments with all others. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://lore.kernel.org/r/886ef84ea6b8314d348953792c9616b3e5dc28c0.1638537704.git.geert+renesas@glider.be
2021-12-05Merge tag 'renesas-pinctrl-for-v5.17-tag1' of ↵Linus Walleij
git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-drivers into devel pinctrl: renesas: Updates for v5.17 - Add generic support for output impedance, - Add drive strength and output impedance support for the RZ/G2L SoC, - Miscellaneous fixes and improvements.
2021-12-05pinctrl: spear: plgpio: Introduce regmap phandleHerve Codina
Resources need to be shared between pinmux and plgpio. Introduce regmap phandle in order to retrieve the regmap from the phandle if the property is present. This allows to retrieve an external regmap (ie the one used by pinmux if the phandle references the pinmux node) from plgpio. Signed-off-by: Herve Codina <herve.codina@bootlin.com> Acked-by: Viresh Kumar <viresh.kumar@linaro.org> Link: https://lore.kernel.org/r/20211202095255.165797-4-herve.codina@bootlin.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2021-12-05pinctrl: spear: plgpio: Convert to regmapHerve Codina
Resources need to be shared between pinmux and plgpio. Use regmap (syscon) to access resources to allow an easy way to share resources. Signed-off-by: Herve Codina <herve.codina@bootlin.com> Acked-by: Viresh Kumar <viresh.kumar@linaro.org> Link: https://lore.kernel.org/r/20211202095255.165797-3-herve.codina@bootlin.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2021-12-05pinctrl: spear: spear: Convert to regmapHerve Codina
Resources need to be shared between pinmux and plgpio. Use regmap (syscon) to access resources to allow an easy way to share resources. Signed-off-by: Herve Codina <herve.codina@bootlin.com> Acked-by: Viresh Kumar <viresh.kumar@linaro.org> Link: https://lore.kernel.org/r/20211202095255.165797-2-herve.codina@bootlin.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
generated by cgit (git 2.34.1) at 2024-06-21 16:19:24 +0000