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path: root/drivers/platform/x86/mlx-platform.c
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2024-03-06Normalise "name (ad@dr)" MODULE_AUTHORs to "name <ad@dr>"Ahelenia Ziemiańska
Found with git grep 'MODULE_AUTHOR(".*([^)]*@' Fixed with sed -i '/MODULE_AUTHOR(".*([^)]*@/{s/ (/ </g;s/)"/>"/;s/)and/> and/}' \ $(git grep -l 'MODULE_AUTHOR(".*([^)]*@') Also: in drivers/media/usb/siano/smsusb.c normalise ", INC" to ", Inc"; this is what every other MODULE_AUTHOR for this company says, and it's what the header says in drivers/sbus/char/openprom.c normalise a double-spaced separator; this is clearly copied from the copyright header, where the names are aligned on consecutive lines thusly: * Linux/SPARC PROM Configuration Driver * Copyright (C) 1996 Thomas K. Dyas (tdyas@noc.rutgers.edu) * Copyright (C) 1996 Eddie C. Dost (ecd@skynet.be) but the authorship branding is single-line Link: https://lkml.kernel.org/r/mk3geln4azm5binjjlfsgjepow4o73domjv6ajybws3tz22vb3@tarta.nabijaczleweli.xyz Signed-off-by: Ahelenia Ziemiańska <nabijaczleweli@nabijaczleweli.xyz> Cc: Joe Perches <joe@perches.com> Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
2023-10-06Merge branch 'pdx86/platform-drivers-x86-mellanox-init' into review-ilpoIlpo Järvinen
2023-10-06platform: mellanox: Fix misspelling error in routine nameVadim Pasternak
Change mlxplat_i2c_main_complition_notify() to mlxplat_i2c_main_completion_notify(). Signed-off-by: Vadim Pasternak <vadimp@nvidia.com> Link: https://lore.kernel.org/r/20231005075616.42777-3-vadimp@nvidia.com Reviewed-by: Ilpo Järvinen <ilpo.jarvinen@linux.intel.com> Signed-off-by: Ilpo Järvinen <ilpo.jarvinen@linux.intel.com>
2023-10-06platform: mellanox: Rename some init()/exit() functions for consistent namingVadim Pasternak
Currently some names of init()/exit() pairing function are not consistent. Rename pair mlxplat_pre_init()/mlxplat_post_exit() to respectively mlxplat_logicdev_init()/mlxplat_logicdev_exit(). Rename pair mlxplat_post_init()/mlxplat_pre_exit() to respectively mlxplat_platdevs_init()/mlxplat_platdevs_exit(). Signed-off-by: Vadim Pasternak <vadimp@nvidia.com> Link: https://lore.kernel.org/r/20231005075616.42777-4-vadimp@nvidia.com Reviewed-by: Ilpo Järvinen <ilpo.jarvinen@linux.intel.com> Signed-off-by: Ilpo Järvinen <ilpo.jarvinen@linux.intel.com>
2023-10-06platform: mellanox: Fix a resource leak in an error handling path in probing ↵Vadim Pasternak
flow Fix missed resource deallocation in rollback flows. Currently if an error occurs after a successful mlxplat_i2c_main_init(), mlxplat_i2c_main_exit() call is missed in rollback flow. Thus, some resources are not de-allocated. Move mlxplat_pre_exit() call from mlxplat_remove() into mlxplat_i2c_main_exit(). Call mlxplat_i2c_main_exit() instead of calling mlxplat_pre_exit() in mlxplat_probe() error handling flow. Unregister 'priv->pdev_i2c' device in mlxplat_i2c_main_init() cleanup flow if this device was successfully registered. Fixes: 158cd8320776 ("platform: mellanox: Split logic in init and exit flow") Reported-by: Christophe JAILLET <christophe.jaillet@wanadoo.fr> Closes: https://lore.kernel.org/lkml/70165032-796e-6f5c-6748-f514e3b9d08c@linux.intel.com/T/ Signed-off-by: Vadim Pasternak <vadimp@nvidia.com> Reviewed-by: Ilpo Järvinen <ilpo.jarvinen@linux.intel.com> Link: https://lore.kernel.org/r/20231005075616.42777-2-vadimp@nvidia.com Signed-off-by: Ilpo Järvinen <ilpo.jarvinen@linux.intel.com>
2023-09-28platform/x86: mlx-platform: Convert to platform remove callback returning voidUwe Kleine-König
The .remove() callback for a platform driver returns an int which makes many driver authors wrongly assume it's possible to do error handling by returning an error code. However the value returned is ignored (apart from emitting a warning) and this typically results in resource leaks. To improve here there is a quest to make the remove callback return void. In the first step of this quest all drivers are converted to .remove_new(), which already returns void. Eventually after all drivers are converted, .remove_new() will be renamed to .remove(). Trivially convert this driver from always returning zero in the remove callback to the void returning variant. Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de> Link: https://lore.kernel.org/r/20230927081040.2198742-22-u.kleine-koenig@pengutronix.de Reviewed-by: Ilpo Järvinen <ilpo.jarvinen@linux.intel.com> Signed-off-by: Ilpo Järvinen <ilpo.jarvinen@linux.intel.com>
2023-08-23platform: mellanox: Add initial support for PCIe based programming logic deviceVadim Pasternak
Extend driver to support logic implemented by FPGA device connected through PCIe bus. The motivation two support new generation of Nvidia COME module equipped with Lattice LFD2NX-40 FPGA device. In order to support new Nvidia COME module FPGA device driver initialization flow is modified. In case FPGA device is detected, system resources are to be mapped to this device, otherwise system resources are to be mapped same as it has been done before for Lattice LPC based CPLD. FPGA device is associated with three PCIe devices: - PCIe-LPC bridge for main register space access. - PCIe-I2C bridge for I2C controller access. - PCIe-JTAG bridge for JTAG access. Signed-off-by: Vadim Pasternak <vadimp@nvidia.com> Reviewed-by: Michael Shych <michaelsh@nvidia.com> Reviewed-by: Hans de Goede <hdegoede@redhat.com> Reviewed-by: Ilpo Järvinen <ilpo.jarvinen@linux.intel.com> Link: https://lore.kernel.org/r/20230822113451.13785-14-vadimp@nvidia.com Signed-off-by: Hans de Goede <hdegoede@redhat.com>
2023-08-23platform: mellanox: mlx-platform: Get interrupt line through ACPIVadim Pasternak
Add support for getting system interrupt line from ACPI table. Signed-off-by: Vadim Pasternak <vadimp@nvidia.com> Reviewed-by: Michael Shych <michaelsh@nvidia.com> Reviewed-by: Hans de Goede <hdegoede@redhat.com> Reviewed-by: Ilpo Järvinen <ilpo.jarvinen@linux.intel.com> Link: https://lore.kernel.org/r/20230822113451.13785-13-vadimp@nvidia.com Signed-off-by: Hans de Goede <hdegoede@redhat.com>
2023-08-23platform: mellanox: mlx-platform: Introduce ACPI init flowVadim Pasternak
Introduce support for ACPI initialization flow - add ACPI match hook. Signed-off-by: Vadim Pasternak <vadimp@nvidia.com> Reviewed-by: Michael Shych <michaelsh@nvidia.com> Reviewed-by: Hans de Goede <hdegoede@redhat.com> Reviewed-by: Ilpo Järvinen <ilpo.jarvinen@linux.intel.com> Link: https://lore.kernel.org/r/20230822113451.13785-12-vadimp@nvidia.com Signed-off-by: Hans de Goede <hdegoede@redhat.com>
2023-08-23platform: mellanox: mlx-platform: Prepare driver to allow probing through ↵Vadim Pasternak
ACPI infrastructure Currently driver is activated through DMI hooks. Prepare driver to allow activation also through ACPI trigger. Modify mlxplat_init()/mlxplat_exit() routines. Add mlxplat_probe()/mlxplat_remove() routines and "mlxplat_driver" structure. Signed-off-by: Vadim Pasternak <vadimp@nvidia.com> Reviewed-by: Michael Shych <michaelsh@nvidia.com> Reviewed-by: Hans de Goede <hdegoede@redhat.com> Reviewed-by: Ilpo Järvinen <ilpo.jarvinen@linux.intel.com> Link: https://lore.kernel.org/r/20230822113451.13785-11-vadimp@nvidia.com Signed-off-by: Hans de Goede <hdegoede@redhat.com>
2023-08-23platform: mellanox: mlx-platform: Add reset callbackVadim Pasternak
On L1 switches reset should include special actions against CPLD device for performing graceful operations. For that purpose, special PLATFORM_RESET# signal should be indicated. Signed-off-by: Vadim Pasternak <vadimp@nvidia.com> Reviewed-by: Michael Shych <michaelsh@nvidia.com> Reviewed-by: Hans de Goede <hdegoede@redhat.com> Reviewed-by: Ilpo Järvinen <ilpo.jarvinen@linux.intel.com> Link: https://lore.kernel.org/r/20230822113451.13785-10-vadimp@nvidia.com Signed-off-by: Hans de Goede <hdegoede@redhat.com>
2023-08-23platform: mellanox: Cosmetic changesVadim Pasternak
Fix routines and labels names by s/topolgy/topology. Signed-off-by: Vadim Pasternak <vadimp@nvidia.com> Reviewed-by: Michael Shych <michaelsh@nvidia.com> Reviewed-by: Hans de Goede <hdegoede@redhat.com> Reviewed-by: Ilpo Järvinen <ilpo.jarvinen@linux.intel.com> Link: https://lore.kernel.org/r/20230822113451.13785-9-vadimp@nvidia.com Signed-off-by: Hans de Goede <hdegoede@redhat.com>
2023-08-23platform: mellanox: mlx-platform: Modify power off callbackVadim Pasternak
Extend platform power off callback with kernel_halt() call. When powering off, the process involves setting a halt bit in the register space, which is then activated after a certain delay and power off auxiliary power. By invoking `kernel_halt()` within this timeframe, the intention is to facilitate a clean system power-off sequence. Signed-off-by: Vadim Pasternak <vadimp@nvidia.com> Reviewed-by: Michael Shych <michaelsh@nvidia.com> Reviewed-by: Hans de Goede <hdegoede@redhat.com> Reviewed-by: Ilpo Järvinen <ilpo.jarvinen@linux.intel.com> Link: https://lore.kernel.org/r/20230822113451.13785-8-vadimp@nvidia.com Signed-off-by: Hans de Goede <hdegoede@redhat.com>
2023-08-23platform: mellanox: mlx-platform: add support for additional CPLDVadim Pasternak
Extend to support 5-th CPLD version, PN and minimal version registers. Signed-off-by: Vadim Pasternak <vadimp@nvidia.com> Reviewed-by: Michael Shych <michaelsh@nvidia.com> Reviewed-by: Hans de Goede <hdegoede@redhat.com> Reviewed-by: Ilpo Järvinen <ilpo.jarvinen@linux.intel.com> Link: https://lore.kernel.org/r/20230822113451.13785-7-vadimp@nvidia.com Signed-off-by: Hans de Goede <hdegoede@redhat.com>
2023-08-23platform: mellanox: mlx-platform: Add reset cause attributeVadim Pasternak
Extend IO registers description for some system types with reset cause attribute "reset_swb_dc_dc_pwr_fail" to indicate reset caused by switch board DC-DC power failure. Signed-off-by: Vadim Pasternak <vadimp@nvidia.com> Reviewed-by: Michael Shych <michaelsh@nvidia.com> Reviewed-by: Hans de Goede <hdegoede@redhat.com> Reviewed-by: Ilpo Järvinen <ilpo.jarvinen@linux.intel.com> Link: https://lore.kernel.org/r/20230822113451.13785-6-vadimp@nvidia.com Signed-off-by: Hans de Goede <hdegoede@redhat.com>
2023-08-23platform: mellanox: mlx-platform: Modify health and power hotplug actionVadim Pasternak
Set explicitly hotplug event action for health and power signals for L1 switch as "MLXREG_HOTPLUG_DEVICE_NO_ACTION" in order to allow processing of notification callback even I2C parent bus is not specified. Signed-off-by: Vadim Pasternak <vadimp@nvidia.com> Reviewed-by: Michael Shych <michaelsh@nvidia.com> Reviewed-by: Hans de Goede <hdegoede@redhat.com> Reviewed-by: Ilpo Järvinen <ilpo.jarvinen@linux.intel.com> Link: https://lore.kernel.org/r/20230822113451.13785-5-vadimp@nvidia.com Signed-off-by: Hans de Goede <hdegoede@redhat.com>
2023-08-23platform: mellanox: Modify reset causes descriptionVadim Pasternak
For system of classes VMOD0005, VMOD0010: - remove "reset_from_comex", since this cause doesn't define specific reason. - add more specific reason "reset_sw_reset", which is set along with removed "reset_from_comex". Signed-off-by: Vadim Pasternak <vadimp@nvidia.com> Reviewed-by: Michael Shych <michaelsh@nvidia.com> Reviewed-by: Hans de Goede <hdegoede@redhat.com> Reviewed-by: Ilpo Järvinen <ilpo.jarvinen@linux.intel.com> Link: https://lore.kernel.org/r/20230822113451.13785-4-vadimp@nvidia.com Signed-off-by: Hans de Goede <hdegoede@redhat.com>
2023-08-23platform: mellanox: Add field upgrade capability registerVadim Pasternak
Add new register to indicate the method of FPGA/CPLD field upgrade supported on the specific system. Currently two masks are available: b00 - field upgrade through LPC gateway (new method introduced to accelerate field upgrade process). b11 - field upgrade through CPU GPIO pins (old method). Signed-off-by: Vadim Pasternak <vadimp@nvidia.com> Reviewed-by: Michael Shych <michaelsh@nvidia.com> Reviewed-by: Hans de Goede <hdegoede@redhat.com> Reviewed-by: Ilpo Järvinen <ilpo.jarvinen@linux.intel.com> Link: https://lore.kernel.org/r/20230822113451.13785-3-vadimp@nvidia.com Signed-off-by: Hans de Goede <hdegoede@redhat.com>
2023-08-23platform: mellanox: Add new attributesVadim Pasternak
Add new attribute: "lid_open" - to indicate system intrusion detection. "reset_long_pwr_pb" - to indicate that system has been reset due to long press of power button. Signed-off-by: Vadim Pasternak <vadimp@nvidia.com> Reviewed-by: Michael Shych <michaelsh@nvidia.com> Reviewed-by: Hans de Goede <hdegoede@redhat.com> Reviewed-by: Ilpo Järvinen <ilpo.jarvinen@linux.intel.com> Link: https://lore.kernel.org/r/20230822113451.13785-2-vadimp@nvidia.com Signed-off-by: Hans de Goede <hdegoede@redhat.com>
2023-08-13platform: mellanox: Change register offset addressesVadim Pasternak
Move debug register offsets to different location due to hardware changes. Fixes: dd635e33b5c9 ("platform: mellanox: Introduce support of new Nvidia L1 switch") Signed-off-by: Vadim Pasternak <vadimp@nvidia.com> Reviewed-by: Michael Shych <michaelsh@nvidia.com> Link: https://lore.kernel.org/r/20230813083735.39090-5-vadimp@nvidia.com Signed-off-by: Hans de Goede <hdegoede@redhat.com>
2023-08-13platform: mellanox: mlx-platform: Modify graceful shutdown callback and ↵Vadim Pasternak
power down mask Use kernel_power_off() instead of kernel_halt() to pass through machine_power_off() -> pm_power_off(), otherwise axillary power does not go off. Change "power down" bitmask. Fixes: dd635e33b5c9 ("platform: mellanox: Introduce support of new Nvidia L1 switch") Signed-off-by: Vadim Pasternak <vadimp@nvidia.com> Reviewed-by: Michael Shych <michaelsh@nvidia.com> Link: https://lore.kernel.org/r/20230813083735.39090-4-vadimp@nvidia.com Signed-off-by: Hans de Goede <hdegoede@redhat.com>
2023-08-13platform: mellanox: mlx-platform: Fix signals polarity and latch maskVadim Pasternak
Change polarity of chassis health and power signals and fix latch reset mask for L1 switch. Fixes: dd635e33b5c9 ("platform: mellanox: Introduce support of new Nvidia L1 switch") Signed-off-by: Vadim Pasternak <vadimp@nvidia.com> Reviewed-by: Michael Shych <michaelsh@nvidia.com> Link: https://lore.kernel.org/r/20230813083735.39090-3-vadimp@nvidia.com Signed-off-by: Hans de Goede <hdegoede@redhat.com>
2023-08-13platform: mellanox: Fix order in exit flowVadim Pasternak
Fix exit flow order: call mlxplat_post_exit() after mlxplat_i2c_main_exit() in order to unregister main i2c driver before to "mlxplat" driver. Fixes: 0170f616f496 ("platform: mellanox: Split initialization procedure") Signed-off-by: Vadim Pasternak <vadimp@nvidia.com> Reviewed-by: Michael Shych <michaelsh@nvidia.com> Link: https://lore.kernel.org/r/20230813083735.39090-2-vadimp@nvidia.com Signed-off-by: Hans de Goede <hdegoede@redhat.com>
2023-03-07platform: mellanox: mlx-platform: Initialize shift variable to 0Hans de Goede
Initialize shift variable in mlxplat_mlxcpld_verify_bus_topology() to 0 to avoid the following compile error: drivers/platform/x86/mlx-platform.c:6013 mlxplat_mlxcpld_verify_bus_topology() error: uninitialized symbol 'shift'. Fixes: 50b823fdd357 ("platform: mellanox: mlx-platform: Move bus shift assignment out of the loop") Cc: Vadim Pasternak <vadimp@nvidia.com> Cc: Michael Shych <michaelsh@nvidia.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com> Link: https://lore.kernel.org/r/20230307105842.286118-1-hdegoede@redhat.com
2023-02-13platform: mellanox: mlx-platform: Move bus shift assignment out of the loopVadim Pasternak
Move assignment of bus shift setting out of the loop to avoid redundant operation. Signed-off-by: Vadim Pasternak <vadimp@nvidia.com> Reviewed-by: Michael Shych <michaelsh@nvidia.com> Link: https://lore.kernel.org/r/20230208063331.15560-13-vadimp@nvidia.com Signed-off-by: Hans de Goede <hdegoede@redhat.com>
2023-02-13platform: mellanox: mlx-platform: Add mux selection register to regmapVadim Pasternak
Extend writeable, readable, volatile registers of the 'regmap' object with for I2C mux selector registers. The motivation is to pass this object extended with selector registers to I2C mux driver working over ‘regmap’. Signed-off-by: Vadim Pasternak <vadimp@nvidia.com> Reviewed-by: Michael Shych <michaelsh@nvidia.com> Link: https://lore.kernel.org/r/20230208063331.15560-12-vadimp@nvidia.com Signed-off-by: Hans de Goede <hdegoede@redhat.com>
2023-02-13platform: mellanox: Extend all systems with I2C notification callbackVadim Pasternak
Motivation is to provide synchronization between I2C main bus and other platform drivers using this notification callback. Signed-off-by: Vadim Pasternak <vadimp@nvidia.com> Reviewed-by: Michael Shych <michaelsh@nvidia.com> Link: https://lore.kernel.org/r/20230208063331.15560-9-vadimp@nvidia.com Signed-off-by: Hans de Goede <hdegoede@redhat.com>
2023-02-13platform: mellanox: Split logic in init and exit flowVadim Pasternak
Split logic in mlxplat_init()/mlxplat_exit() routines. Separate initialization of I2C infrastructure and others platform drivers. Motivation is to provide synchronization between I2C bus and mux drivers and other drivers using this infrastructure. I2C main bus and MUX busses are implemented in FPGA logic. On some new systems the numbers allocated for these busses could be variable depending on order of initialization of I2C native busses. Since bus numbers are passed to some other platform drivers during initialization flow, it is necessary to synchronize completion of I2C infrastructure drivers and activation of rest of drivers. Thus initialization flow will be performed in synchronized order. Signed-off-by: Vadim Pasternak <vadimp@nvidia.com> Reviewed-by: Michael Shych <michaelsh@nvidia.com> Link: https://lore.kernel.org/r/20230208063331.15560-8-vadimp@nvidia.com Signed-off-by: Hans de Goede <hdegoede@redhat.com>
2023-02-10platform: mellanox: Split initialization procedureVadim Pasternak
Split mlxplat_init() into two by adding mlxplat_pre_init(). Motivation is to prepare 'mlx-platform' driver to support systems equipped PCIe based programming logic device. Such systems are supposed to use different system resources, thus this commit separates resources allocation related code. Signed-off-by: Vadim Pasternak <vadimp@nvidia.com> Reviewed-by: Michael Shych <michaelsh@nvidia.com> Link: https://lore.kernel.org/r/20230208063331.15560-7-vadimp@nvidia.com Signed-off-by: Hans de Goede <hdegoede@redhat.com>
2023-02-10platform: mellanox: Introduce support of new Nvidia L1 switchVadim Pasternak
Add support for new L1 switch nodes providing L1 connectivity for multi-node networking chassis. The purpose is to provide compute server with full management and IO subsystems with connections to L1 switches. System contains the following components: - COMe module based on Intel Coffee Lake CPU - Switch baseboard with two ASICs, while 24 ports of each ASICs are connected to one backplane connector 32 ports of each ASIC are connected to 8 OSFPs - Integrated 60mm dual-rotor FANs inside L1 node (N+2 redundancy) - Support 48V or 54V DC input from the external power server. Add the structures related to the new systems to allow proper activation of the all required platform driver. Add poweroff callback to support deep power cycle flow, which should include special actions against CPLD device for performing graceful operation. Signed-off-by: Vadim Pasternak <vadimp@nvidia.com> Reviewed-by: Michael Shych <michaelsh@nvidia.com> Link: https://lore.kernel.org/r/20230208063331.15560-6-vadimp@nvidia.com Signed-off-by: Hans de Goede <hdegoede@redhat.com>
2023-02-10platform: mellanox: Introduce support for next-generation 800GB/s switchVadim Pasternak
Introduce support for Nvidia next-generation 800GB/s ethernet switch SN5600. SN5600 is 51.2 Tbps Ethernet switch based on Nvidia Spectrum-4 ASIC. It can provide up to 64x800Gb/s (ETH) full bidirectional bandwidth per port using PAM-4 modulations. The system supports 64 Belly to Belly 2x4 OSFP cages. The switch was designed to fit standard 2U racks. Features: - 64 OSFP ports support 800GbE - 10GbE speed. - Additional 25GbE - 1GbE service port on the front panel. - Air-cooled with 3 + 1 redundant fan units. - 1 + 1 redundant 3000W or 3600W PSUs. - System management board is based on Intel Coffee-lake CPU E-2276 with secure-boot support. Signed-off-by: Vadim Pasternak <vadimp@nvidia.com> Reviewed-by: Michael Shych <michaelsh@nvidia.com> Link: https://lore.kernel.org/r/20230208063331.15560-5-vadimp@nvidia.com Signed-off-by: Hans de Goede <hdegoede@redhat.com>
2023-02-10platform: mellanox: Cosmetic changes - rename to more common nameVadim Pasternak
Rename 'nvlink_blade' in several declaration to more common name "chassis_blade", since these names are going to be used for different kinds of blades. Fix 'swicth' to 'switch' in comment. Signed-off-by: Vadim Pasternak <vadimp@nvidia.com> Reviewed-by: Michael Shych <michaelsh@nvidia.com> Link: https://lore.kernel.org/r/20230208063331.15560-4-vadimp@nvidia.com Signed-off-by: Hans de Goede <hdegoede@redhat.com>
2023-02-10platform: mellanox: Change "reset_pwr_converter_fail" attributeVadim Pasternak
Change "reset_voltmon_upgrade_fail" attribute name to "reset_pwr_converter_fail". For systems using "mlxplat_mlxcpld_default_ng_regs_io_data", relevant CPLD 'register.bit' indicates the failure of power converter, while on older systems same 'register.bit' indicates failure of voltage monitor devices upgrade failure. Signed-off-by: Vadim Pasternak <vadimp@nvidia.com> Reviewed-by: Michael Shych <michaelsh@nvidia.com> Link: https://lore.kernel.org/r/20230208063331.15560-3-vadimp@nvidia.com Signed-off-by: Hans de Goede <hdegoede@redhat.com>
2023-02-10platform: mellanox: Introduce support for rack manager switchVadim Pasternak
The rack switch is designed to provide high bandwidth, low latency connectivity using optical fiber as the primary interconnect. System supports 32 OSFP ports, non-blocking switching capacity of 25.6Tbps. System equipped with: - 2 replaceable power supplies (AC) with 1+1 redundancy model. - 7 replaceable fan drawers with 6+1 redundancy model. - 2 External Root of Trust or EROT (Glacier) devices for securing ASICs firmware. Signed-off-by: Vadim Pasternak <vadimp@nvidia.com> Reviewed-by: Michael Shych <michaelsh@nvidia.com> Link: https://lore.kernel.org/r/20230208063331.15560-2-vadimp@nvidia.com Signed-off-by: Hans de Goede <hdegoede@redhat.com>
2022-10-03platform/x86: use PLATFORM_DEVID_NONE instead of -1Barnabás Pőcze
Use the `PLATFORM_DEVID_NONE` constant instead of hard-coding -1 when creating a platform device. No functional changes are intended. Signed-off-by: Barnabás Pőcze <pobrn@protonmail.com> Link: https://lore.kernel.org/r/20220930104857.2796923-1-pobrn@protonmail.com Reviewed-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com>
2022-07-14platform/x86: mlx-platform: Add COME board revision registerVadim Pasternak
Extend COME CPLD with board configuration register for getting board revision. The value of this register is pushed by hardware through GPIO pins. The purpose of it is to expose some minor BOM changes. Signed-off-by: Vadim Pasternak <vadimp@nvidia.com> Reviewed-by: Oleksandr Shamray <oleksandrs@nvidia.com> Link: https://lore.kernel.org/r/20220711084559.62447-7-vadimp@nvidia.com Reviewed-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com>
2022-07-14platform/x86: mlx-platform: Add support for new system XH3000Vadim Pasternak
Add support for new system type XH3000, which is a water cooling Ethernet switch blade equipped with 32x200G Ethernet ports. The system is recognized by "DMI_BOARD_NAME" and "DMI_PRODUCT_SKU" matches, when these fields are set to "VMOD0005" and "HI139" respectively. Signed-off-by: Vadim Pasternak <vadimp@nvidia.com> Reviewed-by: Felix Radensky <fradensky@nvidia.com> Link: https://lore.kernel.org/r/20220711084559.62447-6-vadimp@nvidia.com Reviewed-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com>
2022-07-14platform/x86: mlx-platform: Introduce support for COMe NVSwitch management ↵Vadim Pasternak
module for Vulcan chassis The Vulcan is chassis containing Nvidia's Hopper dGPU (GH100), NVswitch (LS10) based HGX baseboard and COMe NVSwitch management module. The system is built for artificial intelligence and accelerated analytics applications. Vulcan is offered as an HGX product to cloud service providers and OEMs, who intend to build fully interconnected GPU systems for large scale deployments. Driver is extended to support new COMe NVSwitch management module. Signed-off-by: Vadim Pasternak <vadimp@nvidia.com> Reviewed-by: Oleksandr Shamray <oleksandrs@nvidia.com> Link: https://lore.kernel.org/r/20220711084559.62447-5-vadimp@nvidia.com Reviewed-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com>
2022-07-14platform/x86: mlx-platform: Add support for systems equipped with two ASICsVadim Pasternak
Motivation is to support new systems equipped with two ASICs. Extend driver with: - The second ASIC health event. - Per ASIC reset control, triggering reset of ASIC internal resources and restarting ASIC initialization flow. Signed-off-by: Vadim Pasternak <vadimp@nvidia.com> Reviewed-by: Oleksandr Shamray <oleksandrs@nvidia.com> Link: https://lore.kernel.org/r/20220711084559.62447-4-vadimp@nvidia.com Reviewed-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com>
2022-07-14platform/x86: mlx-platform: Add cosmetic changes for alignmentVadim Pasternak
Align the first argument with open parenthesis for platform_device_register_resndata() calls. Signed-off-by: Vadim Pasternak <vadimp@nvidia.com> Reviewed-by: Oleksandr Shamray <oleksandrs@nvidia.com> Link: https://lore.kernel.org/r/20220711084559.62447-3-vadimp@nvidia.com Reviewed-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com>
2022-07-14platform/x86: mlx-platform: Make activation of some drivers conditionalVadim Pasternak
Current assumption in driver that any system is capable of LED, hotplug or watchdog support. It could be not true for some new coming systems. Add validation for LED, hotplug, watchdog configuration and skip activation of relevant drivers if not configured. Signed-off-by: Vadim Pasternak <vadimp@nvidia.com> Reviewed-by: Oleksandr Shamray <oleksandrs@nvidia.com> Link: https://lore.kernel.org/r/20220711084559.62447-2-vadimp@nvidia.com Reviewed-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com>
2021-10-27platform/x86: mlx-platform: Add support for new system SGN2410Vadim Pasternak
Add support for new system type, which is a water-cooling flavor of the VMOD001 system class, equipped with 48xSFP28 and 8xQSFP28 100G Ethernet ports. System is recognized by "DMI_BOARD_NAME" and " DMI_PRODUCT_SKU" matches, when these fields are set respectively to "VMOD001" and "HI138". Signed-off-by: Vadim Pasternak <vadimp@nvidia.com> Reviewed-by: Oleksandr Shamray <oleksandrs@nvidia.com> Link: https://lore.kernel.org/r/20211023094022.4193813-4-vadimp@nvidia.com Signed-off-by: Hans de Goede <hdegoede@redhat.com>
2021-10-27platform/x86: mlx-platform: Add BIOS attributes for CoffeeLake COMEx based ↵Vadim Pasternak
systems Extend systems of class VMOD0010 equipped with CoffeeLake COMEx module with BIOS related attributes to represent various BIOS statuses. These attributes "bios_active_image", "bios_auth_fail", "bios_upgrade_fail", "bios_safe_mode" has been already added to modular system. This all of them are already documented. - "bios_active_image" - location of current active BIOS image (0: Top, 1: Bottom. The reported value should correspond to value expected by OS in case of BIOS safe mode is 0. This bit is related to Intel top-swap feature of DualBios on the same flash. - "bios_auth_fail": BIOS upgrade is failed because provided BIOS image is not signed correctly. - "bios_upgrade_fail" BIOS upgrade is failed by some reason not related to authentication. For example, due to physical SPI flash problem. - "bios_safe_mod": - 0 : if BIOS is booted from a supposed active image; 1 : BIOS safe mechanism was enforced by hardware (CPLD). Signed-off-by: Vadim Pasternak <vadimp@nvidia.com> Reviewed-by: Oleksandr Shamray <oleksandrs@nvidia.com> Link: https://lore.kernel.org/r/20211023094022.4193813-3-vadimp@nvidia.com Signed-off-by: Hans de Goede <hdegoede@redhat.com>
2021-10-27platform/x86: mlx-platform: Extend FAN and LED configuration to support new ↵Vadim Pasternak
MQM97xx systems Add support for new system types "MQM97xx", which is based on Mellanox Quantum-2 ASIC. It provides up to 64x400GB/s (IB) full bidirectional bandwidth per port using PAM-4 modulation. The system support 32 OSFP cages that can provide 64x400GB/s per port (two ports/cage). The system fits standard 1U racks. System is equipped with seven fan drawers and with per fan drawer LED on backport panel and uses two-bytes for exposing CPLD Part Number versions. System is recognized by "DMI_BOARD_NAME" match, when this field is set to "VMOD0010". Signed-off-by: Vadim Pasternak <vadimp@nvidia.com> Reviewed-by: Oleksandr Shamray <oleksandrs@nvidia.com> Link: https://lore.kernel.org/r/20211023094022.4193813-2-vadimp@nvidia.com Signed-off-by: Hans de Goede <hdegoede@redhat.com>
2021-10-19platform/x86: mlx-platform: Add support for multiply cooling devicesVadim Pasternak
Add new registers to support systems with multiply cooling devices. Modular systems support up-to four cooling devices. This capability is detected according to the registers initial setting. Signed-off-by: Vadim Pasternak <vadimp@nvidia.com> Reviewed-by: Michael <michaelsh@nvidia.com> Link: https://lore.kernel.org/r/20211002093609.3771576-1-vadimp@nvidia.com Signed-off-by: Hans de Goede <hdegoede@redhat.com>
2021-10-19platform/x86: mlx-platform: Configure notifier callbacks for modular systemVadim Pasternak
Add event notifier callbacks for modular system line cards. These callbacks are to be passed to "mlxreg-hotplug" driver by line card driver during probing. Then, when any line card related hotplug event is received (insertion ,power, synch, ready), hotplug driver will invoke callback for the relevant line card. Signed-off-by: Vadim Pasternak <vadimp@nvidia.com> Reviewed-by: Michael Shych <michaelsh@nvidia.com> Link: https://lore.kernel.org/r/20211002093238.3771419-5-vadimp@nvidia.com Signed-off-by: Hans de Goede <hdegoede@redhat.com>
2021-10-19platform/x86: mlx-platform: Add initial support for new modular systemVadim Pasternak
Add initial chassis management support for Nvidia modular Ethernet switch systems MSN4800, providing a high performance switching solution for Enterprise Data Centers (EDC) for building Ethernet based clusters, High-Performance Computing (HPC) and embedded environments. This system could be equipped with the different types of replaceable line cards and management board. The first system flavor will support the line card type MSN4800-C16 equipped with Lattice CPLD devices aimed for system and ASIC control, one Nvidia FPGA for gearboxes (PHYs) management, and four Nvidia gearboxes for the port control and with 16x100GbE QSFP28 ports and also with various devices for electrical control. The system is equipped with eight slots for line cards, four slots for power supplies and six slots for fans. It could be configured as fully populated or with even only one line card. The line cards are hot-pluggable. In the future when more line card flavors are to be available (for example line cards with 8x200Gb Eth port, with 4x400 Eth ports, or with some kind of smart cards for offloading purpose), any type of line card could be inserted at any slot. The system is based on Nvidia Spectrum-3 ASIC. The switch height is 4U and it fits standard rack size. System could be configured as fully populated or with even only one line card. The line cards are hot-pluggable. Line cards are connected to the chassis through I2C interface for the chassis management operations and through PCIe for the networking operations. Future line cards could be connected to the chassis through InfiniBand fabric, instead of PCIe. The first type of line card supports 16x100GbE QSFP28 Ethernet ports. Those line cards equipped with the programmable devices aimed for system control of Nvidia Ethernet switch ASIC control, Nvidia FPGA, Nvidia gearboxes (PHYs). The next coming card generations are supposed to support: - Line cards with 8x200Gbe QSFP28 Ethernet ports. - Line cards with 4x400Gbe QSFP-DD Ethernet ports. - Smart cards equipped with Nvidia ARM CPU for offloading and for fast access to the storage (EBoF). - Fabric cards for inter-connection. The basic system initialization flow with input signals from the programmable device to kernel hotplug driver and with OS response to some of these signals is depicted below. lc#n_prsnt *-> Input: line card presence in/out events. Informational event. Required action - 'udev' event generation for logging. lc#n_verified *-> Input: line card verification status events coming after line card security signature validation by hardware. Required action - connect line card driver and initialized line card devices feeding from system auxiliary power domain. lc#n_pwr <-* Output: line card power on / off from OS. Action should be performed by platform power management driver. lc#n_powered *-> Input: line card power on/off events coming after line card "power good" on/off events, mean that line card power up sequence has been successfully completed or line card "power good" status has been dropped. Required action - connect line card devices feeding from system main power domain. lc#n_synced *-> Input: line card synchronization events, coming after hardware-firmware synchronization handshake. Required action - to enable line card, in case lc#n_ready has been received before. lc#n_ready *-> Input: line card ready events, indicating line card PHYs ready / unready states. Required action - enable line card, in case lc#n_synced has been received before. lc#n_enable <-* Output: line card enable from OS - release FPGA and PHYs line card devices from reset state. Action should be performed by platform power management driver. lc#n_active *-> Input: when line card "active event" is received for particular line card, its network, hardware monitoring and thermal interfaces should be configured according to the configuration obtained from the firmware. When opposite "inactive event" is received all the above interfaces should be teared down. Required action - connect / disconnect the above line card interfaces through ASIC I2C chassis management driver. For initial support: - Define new system type 'VMOD0011' to support new modular system. - Provide initial platform configuration for new system type. - Extend the registers definitions. - Add support for modular system registers related to line card specific events - insertion/removal, power on/off, verification and activation. - Add hotplug configuration for the above events. - Add configurations for hotplug actions for the modular system. Signed-off-by: Vadim Pasternak <vadimp@nvidia.com> Reviewed-by: Michael Shych <michaelsh@nvidia.com> Link: https://lore.kernel.org/r/20211002093238.3771419-3-vadimp@nvidia.com Signed-off-by: Hans de Goede <hdegoede@redhat.com>
2020-12-08platform/x86: mlx-platform: Fix item counter assignment for MSN2700/ComEx systemVadim Pasternak
Fix array names to match assignments for data items and data items counter in 'mlxplat_mlxcpld_comex_items' structure for: .data = mlxplat_mlxcpld_default_pwr_items_data, .count = ARRAY_SIZE(mlxplat_mlxcpld_pwr), and .data = mlxplat_mlxcpld_default_fan_items_data, .count = ARRAY_SIZE(mlxplat_mlxcpld_fan), Replace: - 'mlxplat_mlxcpld_pwr' by 'mlxplat_mlxcpld_default_pwr_items_data' for ARRAY_SIZE() calculation. - 'mlxplat_mlxcpld_fan' by 'mlxplat_mlxcpld_default_fan_items_data' for ARRAY_SIZE() calculation. Fixes: bdd6e155e0d6 ("platform/x86: mlx-platform: Add support for new system type") Signed-off-by: Vadim Pasternak <vadimp@nvidia.com> Link: https://lore.kernel.org/r/20201207174745.22889-3-vadimp@nvidia.com Signed-off-by: Hans de Goede <hdegoede@redhat.com>
2020-12-08platform/x86: mlx-platform: Fix item counter assignment for MSN2700, MSN24xx ↵Vadim Pasternak
systems Fix array names to match assignments for data items and data items counter in 'mlxplat_mlxcpld_default_items' structure for: .data = mlxplat_mlxcpld_default_pwr_items_data, .count = ARRAY_SIZE(mlxplat_mlxcpld_pwr), and .data = mlxplat_mlxcpld_default_fan_items_data, .count = ARRAY_SIZE(mlxplat_mlxcpld_fan), Replace: - 'mlxplat_mlxcpld_pwr' by 'mlxplat_mlxcpld_default_pwr_items_data' for ARRAY_SIZE() calculation. - 'mlxplat_mlxcpld_fan' by 'mlxplat_mlxcpld_default_fan_items_data' for ARRAY_SIZE() calculation. Fixes: c6acad68eb2d ("platform/mellanox: mlxreg-hotplug: Modify to use a regmap interface") Signed-off-by: Vadim Pasternak <vadimp@nvidia.com> Link: https://lore.kernel.org/r/20201207174745.22889-2-vadimp@nvidia.com Signed-off-by: Hans de Goede <hdegoede@redhat.com>
2020-12-07platform/x86: mlx-platform: remove an unused variableArnd Bergmann
The only reference to the mlxplat_mlxcpld_psu[] array got removed, so there is now a warning from clang: drivers/platform/x86/mlx-platform.c:322:30: error: variable 'mlxplat_mlxcpld_psu' is not needed and will not be emitted [-Werror,-Wunneeded-internal-declaration] static struct i2c_board_info mlxplat_mlxcpld_psu[] = { Remove the array as well and adapt the ARRAY_SIZE() call accordingly. Fixes: 912b341585e3 ("platform/x86: mlx-platform: Remove PSU EEPROM from MSN274x platform configuration") Signed-off-by: Arnd Bergmann <arnd@arndb.de> Acked-by: Vadim Pasternak <vadimp@nvidia.com> Link: https://lore.kernel.org/r/20201203223105.1195709-1-arnd@kernel.org Signed-off-by: Hans de Goede <hdegoede@redhat.com>
generated by cgit (git 2.34.1) at 2024-06-20 06:07:57 +0000