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2019-03-06Merge tag 'armsoc-drivers' of ↵Linus Torvalds
git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc Pull ARM SoC driver updates from Arnd Bergmann: "As usual, the drivers/tee and drivers/reset subsystems get merged here, with the expected set of smaller updates and some new hardware support. The tee subsystem now supports device drivers to be attached to a tee, the first example here is a random number driver with its implementation in the secure world. Three new power domain drivers get added for specific chip families: - Broadcom BCM283x chips (used in Raspberry Pi) - Qualcomm Snapdragon phone chips - Xilinx ZynqMP FPGA SoCs One new driver is added to talk to the BPMP firmware on NVIDIA Tegra210 Existing drivers are extended for new SoC variants from NXP, NVIDIA, Amlogic and Qualcomm" * tag 'armsoc-drivers' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (113 commits) tee: optee: update optee_msg.h and optee_smc.h to dual license tee: add cancellation support to client interface dpaa2-eth: configure the cache stashing amount on a queue soc: fsl: dpio: configure cache stashing destination soc: fsl: dpio: enable frame data cache stashing per software portal soc: fsl: guts: make fsl_guts_get_svr() static hwrng: make symbol 'optee_rng_id_table' static tee: optee: Fix unsigned comparison with less than zero hwrng: Fix unsigned comparison with less than zero tee: fix possible error pointer ctx dereferencing hwrng: optee: Initialize some structs using memset instead of braces tee: optee: Initialize some structs using memset instead of braces soc: fsl: dpio: fix memory leak of a struct qbman on error exit path clk: tegra: dfll: Make symbol 'tegra210_cpu_cvb_tables' static soc: qcom: llcc-slice: Fix typos qcom: soc: llcc-slice: Consolidate some code qcom: soc: llcc-slice: Clear the global drv_data pointer on error drivers: soc: xilinx: Add ZynqMP power domain driver firmware: xilinx: Add APIs to control node status/power dt-bindings: power: Add ZynqMP power domain bindings ...
2019-03-05Merge branch 'timers-core-for-linus' of ↵Linus Torvalds
git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip Pull timer and clockevent updates from Thomas Gleixner: "The time(r) core and clockevent updates are mostly boring this time: - A new driver for the Tegra210 timer - Small fixes and improvements alll over the place - Documentation updates and cleanups" * 'timers-core-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip: (22 commits) soc/tegra: default select TEGRA_TIMER for Tegra210 clocksource/drivers/tegra: Add Tegra210 timer support dt-bindings: timer: add Tegra210 timer clocksource/drivers/timer-cs5535: Rename the file for consistency clocksource/drivers/timer-pxa: Rename the file for consistency clocksource/drivers/tango-xtal: Rename the file for consistency dt-bindings: timer: gpt: update binding doc clocksource/drivers/exynos_mct: Remove unused header includes dt-bindings: timer: mediatek: update bindings for MT7629 SoC clocksource/drivers/exynos_mct: Fix error path in timer resources initialization clocksource/drivers/exynos_mct: Remove dead code clocksource/drivers/riscv: Add required checks during clock source init dt-bindings: timer: renesas: tmu: Document r8a774c0 bindings dt-bindings: timer: renesas, cmt: Document r8a774c0 CMT support clocksource/drivers/exynos_mct: Clear timer interrupt when shutdown clocksource/drivers/exynos_mct: Move one-shot check from tick clear to ISR clocksource/drivers/arch_timer: Workaround for Allwinner A64 timer instability clocksource/drivers/sun5i: Fail gracefully when clock rate is unavailable timers: Mark expected switch fall-throughs timekeeping/debug: No need to check return value of debugfs_create functions ...
2019-03-05Merge tag 'mips_5.1' of git://git.kernel.org/pub/scm/linux/kernel/git/mips/linuxLinus Torvalds
Pull MIPS updates from Paul Burton: - Support for the MIPSr6 MemoryMapID register & Global INValidate TLB (GINVT) instructions, allowing for more efficient TLB maintenance when running on a CPU such as the I6500 that supports these. - Enable huge page support for MIPS64r6. - Optimize post-DMA cache sync by removing that code entirely for kernel configurations in which we know it won't be needed. - The number of pages allocated for interrupt stacks is now calculated correctly, where before we would wastefully allocate too much memory in some configurations. - The ath79 platform migrates to devicetree. - The bcm47xx platform sees fixes for the Buffalo WHR-G54S board. - The ingenic/jz4740 platform gains support for appended devicetrees. - The cavium_octeon, lantiq, loongson32 & sgi-ip27 platforms all see cleanups as do various pieces of core architecture code. * tag 'mips_5.1' of git://git.kernel.org/pub/scm/linux/kernel/git/mips/linux: (66 commits) MIPS: lantiq: Remove separate GPHY Firmware loader MIPS: ingenic: Add support for appended devicetree MIPS: SGI-IP27: rework HUB interrupts MIPS: SGI-IP27: do boot CPU init later MIPS: SGI-IP27: do xtalk scanning later MIPS: SGI-IP27: use pr_info/pr_emerg and pr_cont to fix output MIPS: SGI-IP27: clean up bridge access and header files MIPS: SGI-IP27: get rid of volatile and hubreg_t MIPS: irq: Allocate accurate order pages for irq stack MIPS: dma-noncoherent: Remove bogus condition in dma_sync_phys() MIPS: eBPF: Remove REG_32BIT_ZERO_EX MIPS: eBPF: Always return sign extended 32b values MIPS: CM: Fix indentation MIPS: BCM47XX: Fix/improve Buffalo WHR-G54S support MIPS: OCTEON: program rx/tx-delay always from DT MIPS: OCTEON: delete board-specific link status MIPS: OCTEON: don't lie about interface type of CN3005 board MIPS: OCTEON: warn if deprecated link status is being used MIPS: OCTEON: add fixed-link nodes to in-kernel device tree MIPS: Delete unused flush_cache_sigtramp() ...
2019-03-05Merge branch 'linus' of ↵Linus Torvalds
git://git.kernel.org/pub/scm/linux/kernel/git/herbert/crypto-2.6 Pull crypto update from Herbert Xu: "API: - Add helper for simple skcipher modes. - Add helper to register multiple templates. - Set CRYPTO_TFM_NEED_KEY when setkey fails. - Require neither or both of export/import in shash. - AEAD decryption test vectors are now generated from encryption ones. - New option CONFIG_CRYPTO_MANAGER_EXTRA_TESTS that includes random fuzzing. Algorithms: - Conversions to skcipher and helper for many templates. - Add more test vectors for nhpoly1305 and adiantum. Drivers: - Add crypto4xx prng support. - Add xcbc/cmac/ecb support in caam. - Add AES support for Exynos5433 in s5p. - Remove sha384/sha512 from artpec7 as hardware cannot do partial hash" [ There is a merge of the Freescale SoC tree in order to pull in changes required by patches to the caam/qi2 driver. ] * 'linus' of git://git.kernel.org/pub/scm/linux/kernel/git/herbert/crypto-2.6: (174 commits) crypto: s5p - add AES support for Exynos5433 dt-bindings: crypto: document Exynos5433 SlimSSS crypto: crypto4xx - add missing of_node_put after of_device_is_available crypto: cavium/zip - fix collision with generic cra_driver_name crypto: af_alg - use struct_size() in sock_kfree_s() crypto: caam - remove redundant likely/unlikely annotation crypto: s5p - update iv after AES-CBC op end crypto: x86/poly1305 - Clear key material from stack in SSE2 variant crypto: caam - generate hash keys in-place crypto: caam - fix DMA mapping xcbc key twice crypto: caam - fix hash context DMA unmap size hwrng: bcm2835 - fix probe as platform device crypto: s5p-sss - Use AES_BLOCK_SIZE define instead of number crypto: stm32 - drop pointless static qualifier in stm32_hash_remove() crypto: chelsio - Fixed Traffic Stall crypto: marvell - Remove set but not used variable 'ivsize' crypto: ccp - Update driver messages to remove some confusion crypto: adiantum - add 1536 and 4096-byte test vectors crypto: nhpoly1305 - add a test vector with len % 16 != 0 crypto: arm/aes-ce - update IV after partial final CTR block ...
2019-03-01Merge tag 'soc-fsl-next-v5.1-4' of ↵Arnd Bergmann
git://git.kernel.org/pub/scm/linux/kernel/git/leo/linux into arm/drivers NXP/FSL SoC driver updates for v5.1 take4 DPIO driver - Add support for cache stashing and enable it in dpaa2-eth driver GUTS driver - Make fsl_guts_get_svr() API internal in favor of more generic soc_device_match() * tag 'soc-fsl-next-v5.1-4' of git://git.kernel.org/pub/scm/linux/kernel/git/leo/linux: dpaa2-eth: configure the cache stashing amount on a queue soc: fsl: dpio: configure cache stashing destination soc: fsl: dpio: enable frame data cache stashing per software portal soc: fsl: guts: make fsl_guts_get_svr() static Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2019-02-26soc: fsl: dpio: configure cache stashing destinationIoana Ciornei
Depending on the SoC version and the CPU id, configure the cache stashing destination for a specific dpio. Signed-off-by: Ioana Ciornei <ioana.ciornei@nxp.com> Signed-off-by: Li Yang <leoyang.li@nxp.com>
2019-02-26soc: fsl: dpio: enable frame data cache stashing per software portalIoana Ciornei
Enable cache stashing on the frame data dequeued using this software portal. Also, enable dropping a stash request transaction when the target request queue is almost full. Signed-off-by: Ioana Ciornei <ioana.ciornei@nxp.com> Signed-off-by: Li Yang <leoyang.li@nxp.com>
2019-02-26soc: fsl: guts: make fsl_guts_get_svr() staticHoria Geantă
The export of fsl_guts_get_svr() is a left-over, it's currently used only internally and users needing SoC information should use the generic soc_device infrastructure. Signed-off-by: Horia Geantă <horia.geanta@nxp.com> Acked-by: Yangbo Lu <yangbo.lu@nxp.com> Signed-off-by: Li Yang <leoyang.li@nxp.com>
2019-02-25MIPS: lantiq: Remove separate GPHY Firmware loaderHauke Mehrtens
The separate GPHY Firmware loader driver is not used any more, the GPHY firmware is now loaded by the GSWIP switch driver which also makes use of the GPHY. Remove the old unused GPHY firmware loader driver. The GPHY firmware is useless without an Ethernet and switch driver, it should not harm if loading this does not work for system using an old device tree. I am not aware of any vendor separating the device tree from the kernel binary, it should be ok to remove this. The code and the functionality form this separate GPHY firmware loader was added to the gswip driver in commit 14fceff4771e ("net: dsa: Add Lantiq / Intel DSA driver for vrx200") Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de> Signed-off-by: Paul Burton <paul.burton@mips.com> Cc: linux-mips@vger.kernel.org Cc: devicetree@vger.kernel.org Cc: john@phrozen.org Cc: netdev@vger.kernel.org
2019-02-23soc/tegra: default select TEGRA_TIMER for Tegra210Joseph Lo
The tegra timer is necessary for Tegra210 to support CPU idle power-down state. So select it by default. Signed-off-by: Joseph Lo <josephl@nvidia.com> Acked-by: Thierry Reding <treding@nvidia.com> Acked-by: Jon Hunter <jonathanh@nvidia.com> Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
2019-02-20Merge tag 'soc-fsl-next-v5.1-3' of ↵Arnd Bergmann
git://git.kernel.org/pub/scm/linux/kernel/git/leo/linux into arm/drivers NXP/FSL SoC driver updates for v5.1 take3 DPIO driver - fixed a use after free problem - fixed a memory leak on error path * tag 'soc-fsl-next-v5.1-3' of git://git.kernel.org/pub/scm/linux/kernel/git/leo/linux: soc: fsl: dpio: fix memory leak of a struct qbman on error exit path soc: fsl: dpio: Use after free in dpaa2_dpio_remove() Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2019-02-19soc: fsl: dpio: fix memory leak of a struct qbman on error exit pathColin Ian King
Currently the error check for a null reg leaks a struct qbman that was allocated earlier. Fix this by kfree'ing p on the error exit path. Signed-off-by: Colin Ian King <colin.king@canonical.com> Signed-off-by: Li Yang <leoyang.li@nxp.com>
2019-02-16Merge tag 'qcom-drivers-for-5.1-3' of ↵Arnd Bergmann
git://git.kernel.org/pub/scm/linux/kernel/git/agross/linux into arm/drivers Qualcomm ARM Based Driver Updates for v5.1 - Part 3 * Fixup types in Qualcomm LLCC patch * tag 'qcom-drivers-for-5.1-3' of git://git.kernel.org/pub/scm/linux/kernel/git/agross/linux: soc: qcom: llcc-slice: Fix typos Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2019-02-15soc: qcom: llcc-slice: Fix typosAndy Gross
This patch fixes typos in the llcc-slice driver. Fixes: 72d1cd033154 ("qcom: soc: llcc-slice: Clear the global drv_data pointer on error") Signed-off-by: Andy Gross <andy.gross@linaro.org>
2019-02-15Merge tag 'qcom-drivers-for-5.1-2' of ↵Arnd Bergmann
git://git.kernel.org/pub/scm/linux/kernel/git/agross/linux into arm/drivers Qualcomm ARM Based Driver Updates for v5.1 - Part 2 * Fixups/Cleanup for Qualcomm LLCC * tag 'qcom-drivers-for-5.1-2' of git://git.kernel.org/pub/scm/linux/kernel/git/agross/linux: qcom: soc: llcc-slice: Consolidate some code qcom: soc: llcc-slice: Clear the global drv_data pointer on error Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2019-02-15Merge tag 'drivers_soc_for_5.1' of ↵Arnd Bergmann
git://git.kernel.org/pub/scm/linux/kernel/git/ssantosh/linux-keystone into arm/drivers soc: ti: couple of non critical fixes for v5.1 - Fix the Clang warning for enum in Navigator dma - Simplify code in ti_sci with DEFINE_SHOW_ATTRIBUTE macro * tag 'drivers_soc_for_5.1' of git://git.kernel.org/pub/scm/linux/kernel/git/ssantosh/linux-keystone: soc: ti: knav_dma: Use proper enum in pktdma_init_chan firmware: ti_sci: Change to use DEFINE_SHOW_ATTRIBUTE macro Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2019-02-15Merge tag 'arm-soc/for-5.1/drivers' of https://github.com/Broadcom/stblinux ↵Arnd Bergmann
into arm/drivers This pull request contains Broadcom ARM/ARM64/MIPS based SoCs changes for 5.1, please pull the following: - Stefan updates the BCM2835 SoC driver with downstream properties and uses that to implement a reboot notifier to tell the VC4 firmware when Linux on the ARM CPU is rebooting - Eric adds a proper power domain driver for the BCM283x SoCs and updates a bunch of drivers to have a better and clearer Device Tree definition to support power domains/breaking up of functionality. This requires converting the existing watchdog driver into a MFD and then breaking up the functionality into separate drivers and finally updating the DTS files to leverage the power domains information. - Wei provides a fix for making a symbol static * tag 'arm-soc/for-5.1/drivers' of https://github.com/Broadcom/stblinux: ARM: bcm283x: Switch V3D over to using the PM driver instead of firmware. ARM: bcm283x: Extend the WDT DT node out to cover the whole PM block. (v4) soc: bcm: bcm2835-pm: Make local symbol static soc: bcm: Make PM driver default for BCM2835 soc: bcm: bcm2835-pm: Add support for power domains under a new binding. bcm2835-pm: Move bcm2835-watchdog's DT probe to an MFD. dt-bindings: soc: Add a new binding for the BCM2835 PM node. (v4) firmware: raspberrypi: notify VC4 firmware of a reboot soc: bcm2835: sync firmware properties with downstream Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2019-02-15Merge tag 'qcom-drivers-for-5.1' of ↵Arnd Bergmann
git://git.kernel.org/pub/scm/linux/kernel/git/agross/linux into arm/drivers Qualcomm ARM Based Driver Updates for v5.1 * Add Qualcomm RPMh power domain driver and related changes * Fix issues with sleep/wake sets and batch API in RPMh * Update MAINTAINERS Qualcomm entry * Fixup RMTFS-mem sysfs and uevents * Fix error handling in GSBI * Add SMD-RPM compatible entry for SDM660 * tag 'qcom-drivers-for-5.1' of git://git.kernel.org/pub/scm/linux/kernel/git/agross/linux: soc: qcom: smd-rpm: Add sdm660 compatible soc: qcom: gsbi: Fix error handling in gsbi_probe() soc: qcom: rpmh: Avoid accessing freed memory from batch API drivers: qcom: rpmh: avoid sending sleep/wake sets immediately soc: qcom: rmtfs-mem: Make sysfs attributes world-readable soc: qcom: rmtfs-mem: Add class to enable uevents soc: qcom: update config dependencies for QCOM_RPMPD soc: qcom: rpmpd: Drop family A RPM dependency MAINTAINERS: update list of qcom drivers soc: qcom: rpmhpd: Mark mx as a parent for cx soc: qcom: rpmhpd: Add RPMh power domain driver soc: qcom: rpmpd: Add support for get/set performance state soc: qcom: rpmpd: Add a Power domain driver to model corners dt-bindings: power: Add qcom rpm power domain driver bindings OPP: Add support for parsing the 'opp-level' property dt-bindings: opp: Introduce opp-level bindings Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2019-02-15Merge tag 'tegra-for-5.1-soc' of ↵Arnd Bergmann
git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into arm/drivers soc/tegra: Changes for v5.1-rc1 This contains a couple of miscellaneous fixes for minor issues and a largish rework of the PMC driver to make it work on systems where the PMC has been locked down and can only be accessed from secure firmware. * tag 'tegra-for-5.1-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux: soc/tegra: pmc: Support systems where PMC is marked secure soc/tegra: pmc: Explicitly initialize all fields soc/tegra: pmc: Make alignment consistent soc/tegra: pmc: Pass struct tegra_pmc * where possible soc/tegra: pmc: Make tegra_powergate_is_powered() a local function soc/tegra: pmc: Add missing kerneldoc soc/tegra: pmc: Sort includes alphabetically soc/tegra: pmc: Use TEGRA186_ prefix for GPIO names soc/tegra: fuse: Fix typo in tegra210_init_speedo_data soc/tegra: fuse: Fix illegal free of IO base address Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2019-02-15Merge tag 'amlogic-drivers' of ↵Arnd Bergmann
git://git.kernel.org/pub/scm/linux/kernel/git/khilman/linux-amlogic into arm/drivers Amlogic: driver updates for v5.1 - clock measure: add support for G12a SoC family - misc. fixes * tag 'amlogic-drivers' of git://git.kernel.org/pub/scm/linux/kernel/git/khilman/linux-amlogic: soc: amlogic: clk-measure: add axg and g12a support dt-bindings: amlogic: add new compatible devices to clk_measure soc: amlogic: canvas: Fix meson_canvas_get when probe failed soc: amlogic: add missing of_node_put() Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2019-02-15Merge tag 'imx-drivers-5.1' of ↵Arnd Bergmann
git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into arm/drivers i.MX drivers update for 5.1: - Do not get GPCv2 driver depend on SOC_IMX8MQ since the driver is going to be used on more SoCs than just i.MX8MQ. - Add power domain information into SCU bindings document. - Add support of start/stop a CPU into imx firmware driver. - Support multiple address ranges per child node for imx-weim bus driver. * tag 'imx-drivers-5.1' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux: firmware: imx: Add support to start/stop a CPU soc: imx: Break dependency on SOC_IMX8MQ for GPCv2 firmware: imx: scu-pd: add fallback compatible string support dt-bindings: fsl: scu: add imx8qm scu power domain support dt-bindings: fsl: scu: add fallback compatible string for power domain bus: imx-weim: guard against timing configuration conflicts bus: imx-weim: support multiple address ranges per child node dt-bindings: bus: imx-weim: document multiple address ranges per child node soc: imx: gpcv2: handle reset clocks soc: imx: gpcv2: handle additional power-down bits in handshake register Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2019-02-15Merge tag 'zynqmp-soc-for-v5.1' of https://github.com/Xilinx/linux-xlnx into ↵Arnd Bergmann
arm/drivers arm64: zynqmp: SoC changes for v5.1 - Extend firmware interface with reset, nvmem, power management and power domain support - Add reset, nvmem driver, power management and power domain drivers - * tag 'zynqmp-soc-for-v5.1' of https://github.com/Xilinx/linux-xlnx: drivers: soc: xilinx: Add ZynqMP power domain driver firmware: xilinx: Add APIs to control node status/power dt-bindings: power: Add ZynqMP power domain bindings drivers: soc: xilinx: Add ZynqMP PM driver firmware: xilinx: Implement ZynqMP power management APIs dt-bindings: soc: Add ZynqMP PM bindings nvmem: zynqmp: Added zynqmp nvmem firmware driver dt-bindings: nvmem: Add bindings for ZynqMP nvmem driver firmware: xilinx: Add zynqmp_pm_get_chipid() API reset: reset-zynqmp: Adding support for Xilinx zynqmp reset controller. dt-bindings: reset: Add bindings for ZynqMP reset driver firmware: xilinx: Add reset API's Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2019-02-12qcom: soc: llcc-slice: Consolidate some codeJordan Crouse
Make the code a little bit clearer (and use less gotos) by consolidating some of the initialization. Signed-off-by: Jordan Crouse <jcrouse@codeaurora.org> Reviewed-by: Douglas Anderson <dianders@chromium.org> Signed-off-by: Andy Gross <andy.gross@linaro.org>
2019-02-12qcom: soc: llcc-slice: Clear the global drv_data pointer on errorJordan Crouse
Currently the data structure for llc-slice is devm allocated and stored as a global but never cleared if the probe function fails. This is a problem because devm managed memory gets freed on probe failure the API functions could access the pointer after it has been freed. Initialize the drv_data pointer to an error and reset it to an error on probe failure or device destroy and add protection to the API functions to make sure the memory doesn't get accessed. Signed-off-by: Jordan Crouse <jcrouse@codeaurora.org> Signed-off-by: Andy Gross <andy.gross@linaro.org>
2019-02-12drivers: soc: xilinx: Add ZynqMP power domain driverJolly Shah
The zynqmp-genpd driver communicates the usage requirements for logical power domains / devices to the platform FW. FW is responsible for choosing appropriate power states, taking Linux' usage information into account. Signed-off-by: Rajan Vaja <rajan.vaja@xilinx.com> Signed-off-by: Jolly Shah <jolly.shah@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2019-02-12drivers: soc: xilinx: Add ZynqMP PM driverRajan Vaja
Add ZynqMP PM driver. PM driver provides power management support for ZynqMP. Signed-off-by: Rajan Vaja <rajan.vaja@xilinx.com> Signed-off-by: Jolly Shah <jolly.shah@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2019-02-07soc: amlogic: clk-measure: add axg and g12a supportJerome Brunet
Add support for the axg and g12a SoC family in amlogic clk measure Signed-off-by: Jerome Brunet <jbrunet@baylibre.com> Reviewed-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> [khilman: squashed some fixups from Martin] Signed-off-by: Kevin Hilman <khilman@baylibre.com>
2019-02-07soc: amlogic: canvas: Fix meson_canvas_get when probe failedNeil Armstrong
When probe fails, a platforn_device is still associated to the node, but dev_get_drvdata() returns NULL. Handle this case by returning a consistent error. Fixes: d4983983d987 ("soc: amlogic: add meson-canvas driver") Signed-off-by: Neil Armstrong <narmstrong@baylibre.com> Reviewed-by: Maxime Jourdan <mjourdan@baylibre.com> [khilman: fixed minor typo in comment ] Signed-off-by: Kevin Hilman <khilman@baylibre.com>
2019-02-06soc: amlogic: add missing of_node_put()wen yang
The call to of_parse_phandle returns a node pointer with refcount incremented thus it must be explicitly decremented here after the last usage. Signed-off-by: Wen Yang <yellowriver2010@hotmail.com> Reviewed-by: Neil Armstrong <narmstrong@baylibre.com> Fixes: d4983983d987 ("soc: amlogic: add meson-canvas driver") Signed-off-by: Kevin Hilman <khilman@baylibre.com>
2019-02-04soc: fsl: dpio: Use after free in dpaa2_dpio_remove()Dan Carpenter
The dpaa2_io_down(priv->io) call frees "priv->io" so I've shifted the code around a little bit to avoid the use after free. Fixes: 991e873223e9 ("soc: fsl: dpio: use a cpumask to identify which cpus are unused") Signed-off-by: Dan Carpenter <dan.carpenter@oracle.com> Signed-off-by: Li Yang <leoyang.li@nxp.com>
2019-02-01soc: qcom: smd-rpm: Add sdm660 compatibleCraig Tatlor
Add the compatible for the RPM in SDM660, so that rpm resources can be made available. Signed-off-by: Craig Tatlor <ctatlor97@gmail.com> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Signed-off-by: Andy Gross <andy.gross@linaro.org>
2019-02-01soc: qcom: gsbi: Fix error handling in gsbi_probe()Alexey Khoroshilov
If of_platform_populate() fails in gsbi_probe(), gsbi->hclk is left undisabled. Found by Linux Driver Verification project (linuxtesting.org). Signed-off-by: Alexey Khoroshilov <khoroshilov@ispras.ru> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Signed-off-by: Andy Gross <andy.gross@linaro.org>
2019-02-01soc: qcom: rpmh: Avoid accessing freed memory from batch APIStephen Boyd
Using the batch API from the interconnect driver sometimes leads to a KASAN error due to an access to freed memory. This is easier to trigger with threadirqs on the kernel commandline. BUG: KASAN: use-after-free in rpmh_tx_done+0x114/0x12c Read of size 1 at addr fffffff51414ad84 by task irq/110-apps_rs/57 CPU: 0 PID: 57 Comm: irq/110-apps_rs Tainted: G W 4.19.10 #72 Call trace: dump_backtrace+0x0/0x2f8 show_stack+0x20/0x2c __dump_stack+0x20/0x28 dump_stack+0xcc/0x10c print_address_description+0x74/0x240 kasan_report+0x250/0x26c __asan_report_load1_noabort+0x20/0x2c rpmh_tx_done+0x114/0x12c tcs_tx_done+0x450/0x768 irq_forced_thread_fn+0x58/0x9c irq_thread+0x120/0x1dc kthread+0x248/0x260 ret_from_fork+0x10/0x18 Allocated by task 385: kasan_kmalloc+0xac/0x148 __kmalloc+0x170/0x1e4 rpmh_write_batch+0x174/0x540 qcom_icc_set+0x8dc/0x9ac icc_set+0x288/0x2e8 a6xx_gmu_stop+0x320/0x3c0 a6xx_pm_suspend+0x108/0x124 adreno_suspend+0x50/0x60 pm_generic_runtime_suspend+0x60/0x78 __rpm_callback+0x214/0x32c rpm_callback+0x54/0x184 rpm_suspend+0x3f8/0xa90 pm_runtime_work+0xb4/0x178 process_one_work+0x544/0xbc0 worker_thread+0x514/0x7d0 kthread+0x248/0x260 ret_from_fork+0x10/0x18 Freed by task 385: __kasan_slab_free+0x12c/0x1e0 kasan_slab_free+0x10/0x1c kfree+0x134/0x588 rpmh_write_batch+0x49c/0x540 qcom_icc_set+0x8dc/0x9ac icc_set+0x288/0x2e8 a6xx_gmu_stop+0x320/0x3c0 a6xx_pm_suspend+0x108/0x124 adreno_suspend+0x50/0x60 cr50_spi spi5.0: SPI transfer timed out pm_generic_runtime_suspend+0x60/0x78 __rpm_callback+0x214/0x32c rpm_callback+0x54/0x184 rpm_suspend+0x3f8/0xa90 pm_runtime_work+0xb4/0x178 process_one_work+0x544/0xbc0 worker_thread+0x514/0x7d0 kthread+0x248/0x260 ret_from_fork+0x10/0x18 The buggy address belongs to the object at fffffff51414ac80 which belongs to the cache kmalloc-512 of size 512 The buggy address is located 260 bytes inside of 512-byte region [fffffff51414ac80, fffffff51414ae80) The buggy address belongs to the page: page:ffffffbfd4505200 count:1 mapcount:0 mapping:fffffff51e00c680 index:0x0 compound_mapcount: 0 flags: 0x4000000000008100(slab|head) raw: 4000000000008100 ffffffbfd4529008 ffffffbfd44f9208 fffffff51e00c680 raw: 0000000000000000 0000000000200020 00000001ffffffff 0000000000000000 page dumped because: kasan: bad access detected Memory state around the buggy address: fffffff51414ac80: fb fb fb fb fb fb fb fb fb fb fb fb fb fb fb fb fffffff51414ad00: fb fb fb fb fb fb fb fb fb fb fb fb fb fb fb fb >fffffff51414ad80: fb fb fb fb fb fb fb fb fb fb fb fb fb fb fb fb ^ fffffff51414ae00: fb fb fb fb fb fb fb fb fb fb fb fb fb fb fb fb fffffff51414ae80: fc fc fc fc fc fc fc fc fc fc fc fc fc fc fc fc The batch API sets the same completion for each rpmh message that's sent and then loops through all the messages and waits for that single completion declared on the stack to be completed before returning from the function and freeing the message structures. Unfortunately, some messages may still be in process and 'stuck' in the TCS. At some later point, the tcs_tx_done() interrupt will run and try to process messages that have already been freed at the end of rpmh_write_batch(). This will in turn access the 'needs_free' member of the rpmh_request structure and cause KASAN to complain. Furthermore, if there's a message that's completed in rpmh_tx_done() and freed immediately after the complete() call is made we'll be racing with potentially freed memory when accessing the 'needs_free' member: CPU0 CPU1 ---- ---- rpmh_tx_done() complete(&compl) wait_for_completion(&compl) kfree(rpm_msg) if (rpm_msg->needs_free) <KASAN warning splat> Let's fix this by allocating a chunk of completions for each message and waiting for all of them to be completed before returning from the batch API. Alternatively, we could wait for the last message in the batch, but that may be a more complicated change because it looks like tcs_tx_done() just iterates through the indices of the queue and completes each message instead of tracking the last inserted message and completing that first. Fixes: c8790cb6da58 ("drivers: qcom: rpmh: add support for batch RPMH request") Cc: Lina Iyer <ilina@codeaurora.org> Cc: "Raju P.L.S.S.S.N" <rplsssn@codeaurora.org> Cc: Matthias Kaehlcke <mka@chromium.org> Cc: Evan Green <evgreen@chromium.org> Cc: stable@vger.kernel.org Reviewed-by: Lina Iyer <ilina@codeaurora.org> Reviewed-by: Evan Green <evgreen@chromium.org> Signed-off-by: Stephen Boyd <swboyd@chromium.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Signed-off-by: Andy Gross <andy.gross@linaro.org>
2019-02-01drivers: qcom: rpmh: avoid sending sleep/wake sets immediatelyRaju P.L.S.S.S.N
Fix the redundant call being made to send the sleep and wake requests immediately to the controller. As per the patch [1], the sleep and wake request votes are cached in rpmh controller and sent during rpmh_flush(). These requests needs to be sent only during entry of deeper system low power modes or suspend. [1] https://patchwork.kernel.org/patch/10477533/ Reviewed-by: Lina Iyer <ilina@codeaurora.org> Reviewed-by: Evan Green <evgreen@chromium.org> Signed-off-by: Raju P.L.S.S.S.N <rplsssn@codeaurora.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Signed-off-by: Andy Gross <andy.gross@linaro.org>
2019-02-01soc: qcom: rmtfs-mem: Make sysfs attributes world-readableEvan Green
In order to run an rmtfs daemon as an unprivileged user, that user would need access to the phys_addr and size sysfs attributes. Sharing these attributes with unprivileged users doesn't really leak anything sensitive, since if you have access to physical memory, the jig is up anyway. Make those attributes readable by all. Reviewed-by: Brian Norris <briannorris@chromium.org> Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org> Signed-off-by: Evan Green <evgreen@chromium.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Signed-off-by: Andy Gross <andy.gross@linaro.org>
2019-02-01soc: qcom: rmtfs-mem: Add class to enable ueventsEvan Green
Currently the qcom_rmtfs_memN devices are entirely invisible to the udev world. Add a class to the rmtfs device so that uevents fire when the device is added. Reviewed-by: Brian Norris <briannorris@chromium.org> Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org> Signed-off-by: Evan Green <evgreen@chromium.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Signed-off-by: Andy Gross <andy.gross@linaro.org>
2019-01-31soc: bcm: bcm2835-pm: Make local symbol staticWei Yongjun
Fixes the following sparse warning: drivers/soc/bcm/bcm2835-power.c:556:32: warning: symbol 'bcm2835_reset_ops' was not declared. Should it be static? Fixes: 670c672608a1 ("soc: bcm: bcm2835-pm: Add support for power domains under a new binding.") Signed-off-by: Wei Yongjun <weiyongjun1@huawei.com> Acked-by: Scott Branden <scott.branden@broadcom.com> Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
2019-01-30Merge tag 'soc-fsl-next-v5.1-2' of ↵Arnd Bergmann
git://git.kernel.org/pub/scm/linux/kernel/git/leo/linux into arm/drivers NXP/FSL SoC driver updates for v5.1 DPIO driver - Clean up the remove path in the dpio driver so that successive bind/unbind commands behave properly - Add the ability to automatically create a device link between a consumer device on the fsl-mc bus and a supplier one - Add prefetch to dpio dequeue to improve performance - Update the type of dpio APIs to align with buffer pool id register field guts driver - Prevent allocation failure by reuse the machine type data from device tree directly * tag 'soc-fsl-next-v5.1-2' of git://git.kernel.org/pub/scm/linux/kernel/git/leo/linux: soc: fsl: guts: reuse machine name from device tree soc: fsl: dpio: Change bpid type to u16 soc: fsl: dpio: Add prefetch instruction bus: fsl-mc: automatically add a device_link on fsl_mc_[portal,object]_allocate soc: fsl: dpio: add a device_link at dpaa2_io_service_register soc: fsl: dpio: store a backpointer to the device backing the dpaa2_io soc: fsl: dpio: keep a per dpio device MC portal soc: fsl: dpio: perform DPIO Reset on Probe soc: fsl: dpio: use a cpumask to identify which cpus are unused soc: fsl: dpio: cleanup the cpu array on dpaa2_io_down Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2019-01-30soc: ti: knav_dma: Use proper enum in pktdma_init_chanNathan Chancellor
Clang warns when one enumerated type is implicitly converted to another: drivers/soc/ti/knav_dma.c:601:20: warning: implicit conversion from enumeration type 'enum dma_data_direction' to different enumeration type 'enum dma_transfer_direction' [-Wenum-conversion] chan->direction = DMA_NONE; ~ ^~~~~~~~ 1 warning generated. While DMA_NONE and DMA_TRANS_NONE have different values, there is no functional change because direction is never checked against DMA_NONE, only against DMA_MEM_TO_DEV and DMA_DEV_TO_MEM. Signed-off-by: Nathan Chancellor <natechancellor@gmail.com> Signed-off-by: Santosh Shilimkar <santosh.shilimkar@oracle.com>
2019-01-30Merge tag 'soc-fsl-fix-v5.0' of ↵Arnd Bergmann
git://git.kernel.org/pub/scm/linux/kernel/git/leo/linux into arm/fixes soc/fsl fixes for v5.0 - qbman: avoid missing interrupts by only clearing processed events * tag 'soc-fsl-fix-v5.0' of git://git.kernel.org/pub/scm/linux/kernel/git/leo/linux: soc: fsl: qbman: avoid race in clearing QMan interrupt Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2019-01-25soc/tegra: pmc: Support systems where PMC is marked secureMikko Perttunen
On Tegra210 systems with new enough boot software, direct register accesses to PMC register space from the non-secure world are not allowed. Instead a monitor call may be used to read and write PMC registers. Add code to detect such a system by attempting to write a scratch register and detecting if the write happened or not. If not, we switch to doing all register accesses through the monitor call. Signed-off-by: Mikko Perttunen <mperttunen@nvidia.com> Signed-off-by: Thierry Reding <treding@nvidia.com> Acked-by: Jon Hunter <jonathanh@nvidia.com>
2019-01-25soc/tegra: pmc: Explicitly initialize all fieldsThierry Reding
It's not strictly necessary to initialize the fields in struct tegra_pmc_soc if they are 0/false. However, we already initialize them explicitly even if unnecessary, so keep doing that for consistency. Signed-off-by: Thierry Reding <treding@nvidia.com> Acked-by: Jon Hunter <jonathanh@nvidia.com>
2019-01-25soc/tegra: pmc: Make alignment consistentThierry Reding
Some recently added code used weird alignment and indentation. Fix these occurrences to make them consistent with the rest of the code. Signed-off-by: Thierry Reding <treding@nvidia.com> Acked-by: Jon Hunter <jonathanh@nvidia.com>
2019-01-25soc/tegra: pmc: Pass struct tegra_pmc * where possibleThierry Reding
Instead of using the global pmc variable, pass around a pointer where possible. Also, replace most occurrences of pr_*() functions by their equivalent dev_*() functions, reusing the pmc->dev pointer. It's not possible to get completely rid of the global variable because some of the public API that this driver exposes still relies on it. Signed-off-by: Thierry Reding <treding@nvidia.com> Acked-by: Jon Hunter <jonathanh@nvidia.com>
2019-01-25soc/tegra: pmc: Make tegra_powergate_is_powered() a local functionJon Hunter
Now there are no more external users of tegra_powergate_is_powered(), make this a local function. Signed-off-by: Jon Hunter <jonathanh@nvidia.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
2019-01-25soc/tegra: pmc: Add missing kerneldocThierry Reding
Some of the fields in struct tegra_pmc had not been documented when they were added. Add the missing kerneldoc. Signed-off-by: Thierry Reding <treding@nvidia.com> Acked-by: Jon Hunter <jonathanh@nvidia.com>
2019-01-25soc/tegra: pmc: Sort includes alphabeticallyThierry Reding
This will make it easier to insert new includes in the right place in subsequent patches. Signed-off-by: Thierry Reding <treding@nvidia.com> Acked-by: Jon Hunter <jonathanh@nvidia.com>
2019-01-25soc/tegra: pmc: Use TEGRA186_ prefix for GPIO namesThierry Reding
The new prefix allows the GPIOs to be uniquely identified on a per-chip basis, which makes it easier to distinguish Tegra186 specific GPIOs from those of later chips such as Tegra194 which supports a very different set of GPIOs. Signed-off-by: Thierry Reding <treding@nvidia.com>
2019-01-25soc/tegra: fuse: Fix typo in tegra210_init_speedo_dataJoseph Lo
Fix typo when reading SoC speedo value from fuse SoC speedo register. Reported-by: Mark Zhang <markz@nvidia.com> Signed-off-by: Joseph Lo <josephl@nvidia.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
2019-01-25soc/tegra: fuse: Fix illegal free of IO base addressTimo Alho
On cases where device tree entries for fuse and clock provider are in different order, fuse driver needs to defer probing. This leads to freeing incorrect IO base address as the fuse->base variable gets overwritten once during first probe invocation. This leads to the following spew during boot: [ 3.082285] Trying to vfree() nonexistent vm area (00000000cfe8fd94) [ 3.082308] WARNING: CPU: 5 PID: 126 at /hdd/l4t/kernel/stable/mm/vmalloc.c:1511 __vunmap+0xcc/0xd8 [ 3.082318] Modules linked in: [ 3.082330] CPU: 5 PID: 126 Comm: kworker/5:1 Tainted: G S 4.19.7-tegra-gce119d3 #1 [ 3.082340] Hardware name: quill (DT) [ 3.082353] Workqueue: events deferred_probe_work_func [ 3.082364] pstate: 40000005 (nZcv daif -PAN -UAO) [ 3.082372] pc : __vunmap+0xcc/0xd8 [ 3.082379] lr : __vunmap+0xcc/0xd8 [ 3.082385] sp : ffff00000a1d3b60 [ 3.082391] x29: ffff00000a1d3b60 x28: 0000000000000000 [ 3.082402] x27: 0000000000000000 x26: ffff000008e8b610 [ 3.082413] x25: 0000000000000000 x24: 0000000000000009 [ 3.082423] x23: ffff000009221a90 x22: ffff000009f6d000 [ 3.082432] x21: 0000000000000000 x20: 0000000000000000 [ 3.082442] x19: ffff000009f6d000 x18: ffffffffffffffff [ 3.082452] x17: 0000000000000000 x16: 0000000000000000 [ 3.082462] x15: ffff0000091396c8 x14: 0720072007200720 [ 3.082471] x13: 0720072007200720 x12: 0720072907340739 [ 3.082481] x11: 0764076607380765 x10: 0766076307300730 [ 3.082491] x9 : 0730073007300730 x8 : 0730073007280720 [ 3.082501] x7 : 0761076507720761 x6 : 0000000000000102 [ 3.082510] x5 : 0000000000000000 x4 : 0000000000000000 [ 3.082519] x3 : ffffffffffffffff x2 : ffff000009150ff8 [ 3.082528] x1 : 3d95b1429fff5200 x0 : 0000000000000000 [ 3.082538] Call trace: [ 3.082545] __vunmap+0xcc/0xd8 [ 3.082552] vunmap+0x24/0x30 [ 3.082561] __iounmap+0x2c/0x38 [ 3.082569] tegra_fuse_probe+0xc8/0x118 [ 3.082577] platform_drv_probe+0x50/0xa0 [ 3.082585] really_probe+0x1b0/0x288 [ 3.082593] driver_probe_device+0x58/0x100 [ 3.082601] __device_attach_driver+0x98/0xf0 [ 3.082609] bus_for_each_drv+0x64/0xc8 [ 3.082616] __device_attach+0xd8/0x130 [ 3.082624] device_initial_probe+0x10/0x18 [ 3.082631] bus_probe_device+0x90/0x98 [ 3.082638] deferred_probe_work_func+0x74/0xb0 [ 3.082649] process_one_work+0x1e0/0x318 [ 3.082656] worker_thread+0x228/0x450 [ 3.082664] kthread+0x128/0x130 [ 3.082672] ret_from_fork+0x10/0x18 [ 3.082678] ---[ end trace 0810fe6ba772c1c7 ]--- Fix this by retaining the value of fuse->base until driver has successfully probed. Signed-off-by: Timo Alho <talho@nvidia.com> Acked-by: Jon Hunter <jonathanh@nvidia.com> Signed-off-by: Thierry Reding <treding@nvidia.com>